eos_s3/pmu/
audio_sw_pd.rs1#[doc = "Register `AUDIO_SW_PD` reader"]
2pub struct R(crate::R<AUDIO_SW_PD_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<AUDIO_SW_PD_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<AUDIO_SW_PD_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<AUDIO_SW_PD_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `AUDIO_SW_PD` writer"]
17pub struct W(crate::W<AUDIO_SW_PD_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<AUDIO_SW_PD_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<AUDIO_SW_PD_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<AUDIO_SW_PD_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Set to trigger a power down event. Bit will be cleared once power down sequence is finished\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum AUDIO_AD0_PD_A {
40 #[doc = "1: Put the power domain to shut down, HW will clear it once power down sequence is finished."]
41 POWER_DOWN = 1,
42}
43impl From<AUDIO_AD0_PD_A> for bool {
44 #[inline(always)]
45 fn from(variant: AUDIO_AD0_PD_A) -> Self {
46 variant as u8 != 0
47 }
48}
49#[doc = "Field `Audio_AD0_PD` reader - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
50pub struct AUDIO_AD0_PD_R(crate::FieldReader<bool, AUDIO_AD0_PD_A>);
51impl AUDIO_AD0_PD_R {
52 #[inline(always)]
53 pub(crate) fn new(bits: bool) -> Self {
54 AUDIO_AD0_PD_R(crate::FieldReader::new(bits))
55 }
56 #[doc = r"Get enumerated values variant"]
57 #[inline(always)]
58 pub fn variant(&self) -> Option<AUDIO_AD0_PD_A> {
59 match self.bits {
60 true => Some(AUDIO_AD0_PD_A::POWER_DOWN),
61 _ => None,
62 }
63 }
64 #[doc = "Checks if the value of the field is `POWER_DOWN`"]
65 #[inline(always)]
66 pub fn is_power_down(&self) -> bool {
67 **self == AUDIO_AD0_PD_A::POWER_DOWN
68 }
69}
70impl core::ops::Deref for AUDIO_AD0_PD_R {
71 type Target = crate::FieldReader<bool, AUDIO_AD0_PD_A>;
72 #[inline(always)]
73 fn deref(&self) -> &Self::Target {
74 &self.0
75 }
76}
77#[doc = "Field `Audio_AD0_PD` writer - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
78pub struct AUDIO_AD0_PD_W<'a> {
79 w: &'a mut W,
80}
81impl<'a> AUDIO_AD0_PD_W<'a> {
82 #[doc = r"Writes `variant` to the field"]
83 #[inline(always)]
84 pub fn variant(self, variant: AUDIO_AD0_PD_A) -> &'a mut W {
85 self.bit(variant.into())
86 }
87 #[doc = "Put the power domain to shut down, HW will clear it once power down sequence is finished."]
88 #[inline(always)]
89 pub fn power_down(self) -> &'a mut W {
90 self.variant(AUDIO_AD0_PD_A::POWER_DOWN)
91 }
92 #[doc = r"Sets the field bit"]
93 #[inline(always)]
94 pub fn set_bit(self) -> &'a mut W {
95 self.bit(true)
96 }
97 #[doc = r"Clears the field bit"]
98 #[inline(always)]
99 pub fn clear_bit(self) -> &'a mut W {
100 self.bit(false)
101 }
102 #[doc = r"Writes raw bits to the field"]
103 #[inline(always)]
104 pub fn bit(self, value: bool) -> &'a mut W {
105 self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
106 self.w
107 }
108}
109#[doc = "Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
110pub type AUDIO_AD1_PD_A = AUDIO_AD0_PD_A;
111#[doc = "Field `Audio_AD1_PD` reader - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
112pub type AUDIO_AD1_PD_R = AUDIO_AD0_PD_R;
113#[doc = "Field `Audio_AD1_PD` writer - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
114pub struct AUDIO_AD1_PD_W<'a> {
115 w: &'a mut W,
116}
117impl<'a> AUDIO_AD1_PD_W<'a> {
118 #[doc = r"Writes `variant` to the field"]
119 #[inline(always)]
120 pub fn variant(self, variant: AUDIO_AD1_PD_A) -> &'a mut W {
121 self.bit(variant.into())
122 }
123 #[doc = "Put the power domain to shut down, HW will clear it once power down sequence is finished."]
124 #[inline(always)]
125 pub fn power_down(self) -> &'a mut W {
126 self.variant(AUDIO_AD1_PD_A::POWER_DOWN)
127 }
128 #[doc = r"Sets the field bit"]
129 #[inline(always)]
130 pub fn set_bit(self) -> &'a mut W {
131 self.bit(true)
132 }
133 #[doc = r"Clears the field bit"]
134 #[inline(always)]
135 pub fn clear_bit(self) -> &'a mut W {
136 self.bit(false)
137 }
138 #[doc = r"Writes raw bits to the field"]
139 #[inline(always)]
140 pub fn bit(self, value: bool) -> &'a mut W {
141 self.w.bits =
142 (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
143 self.w
144 }
145}
146#[doc = "Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
147pub type AUDIO_AD2_PD_A = AUDIO_AD0_PD_A;
148#[doc = "Field `Audio_AD2_PD` reader - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
149pub type AUDIO_AD2_PD_R = AUDIO_AD0_PD_R;
150#[doc = "Field `Audio_AD2_PD` writer - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
151pub struct AUDIO_AD2_PD_W<'a> {
152 w: &'a mut W,
153}
154impl<'a> AUDIO_AD2_PD_W<'a> {
155 #[doc = r"Writes `variant` to the field"]
156 #[inline(always)]
157 pub fn variant(self, variant: AUDIO_AD2_PD_A) -> &'a mut W {
158 self.bit(variant.into())
159 }
160 #[doc = "Put the power domain to shut down, HW will clear it once power down sequence is finished."]
161 #[inline(always)]
162 pub fn power_down(self) -> &'a mut W {
163 self.variant(AUDIO_AD2_PD_A::POWER_DOWN)
164 }
165 #[doc = r"Sets the field bit"]
166 #[inline(always)]
167 pub fn set_bit(self) -> &'a mut W {
168 self.bit(true)
169 }
170 #[doc = r"Clears the field bit"]
171 #[inline(always)]
172 pub fn clear_bit(self) -> &'a mut W {
173 self.bit(false)
174 }
175 #[doc = r"Writes raw bits to the field"]
176 #[inline(always)]
177 pub fn bit(self, value: bool) -> &'a mut W {
178 self.w.bits =
179 (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
180 self.w
181 }
182}
183#[doc = "Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
184pub type AUDIO_AD3_PD_A = AUDIO_AD0_PD_A;
185#[doc = "Field `Audio_AD3_PD` reader - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
186pub type AUDIO_AD3_PD_R = AUDIO_AD0_PD_R;
187#[doc = "Field `Audio_AD3_PD` writer - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
188pub struct AUDIO_AD3_PD_W<'a> {
189 w: &'a mut W,
190}
191impl<'a> AUDIO_AD3_PD_W<'a> {
192 #[doc = r"Writes `variant` to the field"]
193 #[inline(always)]
194 pub fn variant(self, variant: AUDIO_AD3_PD_A) -> &'a mut W {
195 self.bit(variant.into())
196 }
197 #[doc = "Put the power domain to shut down, HW will clear it once power down sequence is finished."]
198 #[inline(always)]
199 pub fn power_down(self) -> &'a mut W {
200 self.variant(AUDIO_AD3_PD_A::POWER_DOWN)
201 }
202 #[doc = r"Sets the field bit"]
203 #[inline(always)]
204 pub fn set_bit(self) -> &'a mut W {
205 self.bit(true)
206 }
207 #[doc = r"Clears the field bit"]
208 #[inline(always)]
209 pub fn clear_bit(self) -> &'a mut W {
210 self.bit(false)
211 }
212 #[doc = r"Writes raw bits to the field"]
213 #[inline(always)]
214 pub fn bit(self, value: bool) -> &'a mut W {
215 self.w.bits =
216 (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
217 self.w
218 }
219}
220#[doc = "Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
221pub type AUDIO_AD4_PD_A = AUDIO_AD0_PD_A;
222#[doc = "Field `Audio_AD4_PD` reader - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
223pub type AUDIO_AD4_PD_R = AUDIO_AD0_PD_R;
224#[doc = "Field `Audio_AD4_PD` writer - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
225pub struct AUDIO_AD4_PD_W<'a> {
226 w: &'a mut W,
227}
228impl<'a> AUDIO_AD4_PD_W<'a> {
229 #[doc = r"Writes `variant` to the field"]
230 #[inline(always)]
231 pub fn variant(self, variant: AUDIO_AD4_PD_A) -> &'a mut W {
232 self.bit(variant.into())
233 }
234 #[doc = "Put the power domain to shut down, HW will clear it once power down sequence is finished."]
235 #[inline(always)]
236 pub fn power_down(self) -> &'a mut W {
237 self.variant(AUDIO_AD4_PD_A::POWER_DOWN)
238 }
239 #[doc = r"Sets the field bit"]
240 #[inline(always)]
241 pub fn set_bit(self) -> &'a mut W {
242 self.bit(true)
243 }
244 #[doc = r"Clears the field bit"]
245 #[inline(always)]
246 pub fn clear_bit(self) -> &'a mut W {
247 self.bit(false)
248 }
249 #[doc = r"Writes raw bits to the field"]
250 #[inline(always)]
251 pub fn bit(self, value: bool) -> &'a mut W {
252 self.w.bits =
253 (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
254 self.w
255 }
256}
257#[doc = "Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
258pub type AUDIO_AD5_PD_A = AUDIO_AD0_PD_A;
259#[doc = "Field `Audio_AD5_PD` reader - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
260pub type AUDIO_AD5_PD_R = AUDIO_AD0_PD_R;
261#[doc = "Field `Audio_AD5_PD` writer - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
262pub struct AUDIO_AD5_PD_W<'a> {
263 w: &'a mut W,
264}
265impl<'a> AUDIO_AD5_PD_W<'a> {
266 #[doc = r"Writes `variant` to the field"]
267 #[inline(always)]
268 pub fn variant(self, variant: AUDIO_AD5_PD_A) -> &'a mut W {
269 self.bit(variant.into())
270 }
271 #[doc = "Put the power domain to shut down, HW will clear it once power down sequence is finished."]
272 #[inline(always)]
273 pub fn power_down(self) -> &'a mut W {
274 self.variant(AUDIO_AD5_PD_A::POWER_DOWN)
275 }
276 #[doc = r"Sets the field bit"]
277 #[inline(always)]
278 pub fn set_bit(self) -> &'a mut W {
279 self.bit(true)
280 }
281 #[doc = r"Clears the field bit"]
282 #[inline(always)]
283 pub fn clear_bit(self) -> &'a mut W {
284 self.bit(false)
285 }
286 #[doc = r"Writes raw bits to the field"]
287 #[inline(always)]
288 pub fn bit(self, value: bool) -> &'a mut W {
289 self.w.bits =
290 (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
291 self.w
292 }
293}
294impl R {
295 #[doc = "Bit 0 - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
296 #[inline(always)]
297 pub fn audio_ad0_pd(&self) -> AUDIO_AD0_PD_R {
298 AUDIO_AD0_PD_R::new((self.bits & 0x01) != 0)
299 }
300 #[doc = "Bit 1 - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
301 #[inline(always)]
302 pub fn audio_ad1_pd(&self) -> AUDIO_AD1_PD_R {
303 AUDIO_AD1_PD_R::new(((self.bits >> 1) & 0x01) != 0)
304 }
305 #[doc = "Bit 2 - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
306 #[inline(always)]
307 pub fn audio_ad2_pd(&self) -> AUDIO_AD2_PD_R {
308 AUDIO_AD2_PD_R::new(((self.bits >> 2) & 0x01) != 0)
309 }
310 #[doc = "Bit 3 - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
311 #[inline(always)]
312 pub fn audio_ad3_pd(&self) -> AUDIO_AD3_PD_R {
313 AUDIO_AD3_PD_R::new(((self.bits >> 3) & 0x01) != 0)
314 }
315 #[doc = "Bit 4 - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
316 #[inline(always)]
317 pub fn audio_ad4_pd(&self) -> AUDIO_AD4_PD_R {
318 AUDIO_AD4_PD_R::new(((self.bits >> 4) & 0x01) != 0)
319 }
320 #[doc = "Bit 5 - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
321 #[inline(always)]
322 pub fn audio_ad5_pd(&self) -> AUDIO_AD5_PD_R {
323 AUDIO_AD5_PD_R::new(((self.bits >> 5) & 0x01) != 0)
324 }
325}
326impl W {
327 #[doc = "Bit 0 - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
328 #[inline(always)]
329 pub fn audio_ad0_pd(&mut self) -> AUDIO_AD0_PD_W {
330 AUDIO_AD0_PD_W { w: self }
331 }
332 #[doc = "Bit 1 - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
333 #[inline(always)]
334 pub fn audio_ad1_pd(&mut self) -> AUDIO_AD1_PD_W {
335 AUDIO_AD1_PD_W { w: self }
336 }
337 #[doc = "Bit 2 - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
338 #[inline(always)]
339 pub fn audio_ad2_pd(&mut self) -> AUDIO_AD2_PD_W {
340 AUDIO_AD2_PD_W { w: self }
341 }
342 #[doc = "Bit 3 - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
343 #[inline(always)]
344 pub fn audio_ad3_pd(&mut self) -> AUDIO_AD3_PD_W {
345 AUDIO_AD3_PD_W { w: self }
346 }
347 #[doc = "Bit 4 - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
348 #[inline(always)]
349 pub fn audio_ad4_pd(&mut self) -> AUDIO_AD4_PD_W {
350 AUDIO_AD4_PD_W { w: self }
351 }
352 #[doc = "Bit 5 - Set to trigger a power down event. Bit will be cleared once power down sequence is finished"]
353 #[inline(always)]
354 pub fn audio_ad5_pd(&mut self) -> AUDIO_AD5_PD_W {
355 AUDIO_AD5_PD_W { w: self }
356 }
357 #[doc = "Writes raw bits to the register."]
358 #[inline(always)]
359 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
360 self.0.bits(bits);
361 self
362 }
363}
364#[doc = "Register for triggering power-down events in Audio power domains. (RWHC)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [audio_sw_pd](index.html) module"]
365pub struct AUDIO_SW_PD_SPEC;
366impl crate::RegisterSpec for AUDIO_SW_PD_SPEC {
367 type Ux = u32;
368}
369#[doc = "`read()` method returns [audio_sw_pd::R](R) reader structure"]
370impl crate::Readable for AUDIO_SW_PD_SPEC {
371 type Reader = R;
372}
373#[doc = "`write(|w| ..)` method takes [audio_sw_pd::W](W) writer structure"]
374impl crate::Writable for AUDIO_SW_PD_SPEC {
375 type Writer = W;
376}
377#[doc = "`reset()` method sets AUDIO_SW_PD to value 0"]
378impl crate::Resettable for AUDIO_SW_PD_SPEC {
379 #[inline(always)]
380 fn reset_value() -> Self::Ux {
381 0
382 }
383}