eos_s3/pkfb/
pkfb_pf0pushctl.rs

1#[doc = "Register `PKFB_PF0PUSHCTL` reader"]
2pub struct R(crate::R<PKFB_PF0PUSHCTL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PKFB_PF0PUSHCTL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PKFB_PF0PUSHCTL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PKFB_PF0PUSHCTL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PKFB_PF0PUSHCTL` writer"]
17pub struct W(crate::W<PKFB_PF0PUSHCTL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PKFB_PF0PUSHCTL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PKFB_PF0PUSHCTL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PKFB_PF0PUSHCTL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `pf0_push_sleep_en` reader - Set this bit to enable sleep"]
38pub struct PF0_PUSH_SLEEP_EN_R(crate::FieldReader<bool, bool>);
39impl PF0_PUSH_SLEEP_EN_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        PF0_PUSH_SLEEP_EN_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for PF0_PUSH_SLEEP_EN_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `pf0_push_sleep_en` writer - Set this bit to enable sleep"]
53pub struct PF0_PUSH_SLEEP_EN_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> PF0_PUSH_SLEEP_EN_W<'a> {
57    #[doc = r"Sets the field bit"]
58    #[inline(always)]
59    pub fn set_bit(self) -> &'a mut W {
60        self.bit(true)
61    }
62    #[doc = r"Clears the field bit"]
63    #[inline(always)]
64    pub fn clear_bit(self) -> &'a mut W {
65        self.bit(false)
66    }
67    #[doc = r"Writes raw bits to the field"]
68    #[inline(always)]
69    pub fn bit(self, value: bool) -> &'a mut W {
70        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
71        self.w
72    }
73}
74#[doc = "Select the type of sleep mode\n\nValue on reset: 0"]
75#[derive(Clone, Copy, Debug, PartialEq)]
76pub enum PF0_PUSH_SLEEP_TYPE_A {
77    #[doc = "0: Select deep sleep as sleep type for the FIFO"]
78    DEEP_SLEEP = 0,
79    #[doc = "1: Select shutdown as the sleep type for the FIFO"]
80    SHUT_DOWN = 1,
81}
82impl From<PF0_PUSH_SLEEP_TYPE_A> for bool {
83    #[inline(always)]
84    fn from(variant: PF0_PUSH_SLEEP_TYPE_A) -> Self {
85        variant as u8 != 0
86    }
87}
88#[doc = "Field `pf0_push_sleep_type` reader - Select the type of sleep mode"]
89pub struct PF0_PUSH_SLEEP_TYPE_R(
90    crate::FieldReader<bool, PF0_PUSH_SLEEP_TYPE_A>,
91);
92impl PF0_PUSH_SLEEP_TYPE_R {
93    #[inline(always)]
94    pub(crate) fn new(bits: bool) -> Self {
95        PF0_PUSH_SLEEP_TYPE_R(crate::FieldReader::new(bits))
96    }
97    #[doc = r"Get enumerated values variant"]
98    #[inline(always)]
99    pub fn variant(&self) -> PF0_PUSH_SLEEP_TYPE_A {
100        match self.bits {
101            false => PF0_PUSH_SLEEP_TYPE_A::DEEP_SLEEP,
102            true => PF0_PUSH_SLEEP_TYPE_A::SHUT_DOWN,
103        }
104    }
105    #[doc = "Checks if the value of the field is `DEEP_SLEEP`"]
106    #[inline(always)]
107    pub fn is_deep_sleep(&self) -> bool {
108        **self == PF0_PUSH_SLEEP_TYPE_A::DEEP_SLEEP
109    }
110    #[doc = "Checks if the value of the field is `SHUT_DOWN`"]
111    #[inline(always)]
112    pub fn is_shut_down(&self) -> bool {
113        **self == PF0_PUSH_SLEEP_TYPE_A::SHUT_DOWN
114    }
115}
116impl core::ops::Deref for PF0_PUSH_SLEEP_TYPE_R {
117    type Target = crate::FieldReader<bool, PF0_PUSH_SLEEP_TYPE_A>;
118    #[inline(always)]
119    fn deref(&self) -> &Self::Target {
120        &self.0
121    }
122}
123#[doc = "Field `pf0_push_sleep_type` writer - Select the type of sleep mode"]
124pub struct PF0_PUSH_SLEEP_TYPE_W<'a> {
125    w: &'a mut W,
126}
127impl<'a> PF0_PUSH_SLEEP_TYPE_W<'a> {
128    #[doc = r"Writes `variant` to the field"]
129    #[inline(always)]
130    pub fn variant(self, variant: PF0_PUSH_SLEEP_TYPE_A) -> &'a mut W {
131        self.bit(variant.into())
132    }
133    #[doc = "Select deep sleep as sleep type for the FIFO"]
134    #[inline(always)]
135    pub fn deep_sleep(self) -> &'a mut W {
136        self.variant(PF0_PUSH_SLEEP_TYPE_A::DEEP_SLEEP)
137    }
138    #[doc = "Select shutdown as the sleep type for the FIFO"]
139    #[inline(always)]
140    pub fn shut_down(self) -> &'a mut W {
141        self.variant(PF0_PUSH_SLEEP_TYPE_A::SHUT_DOWN)
142    }
143    #[doc = r"Sets the field bit"]
144    #[inline(always)]
145    pub fn set_bit(self) -> &'a mut W {
146        self.bit(true)
147    }
148    #[doc = r"Clears the field bit"]
149    #[inline(always)]
150    pub fn clear_bit(self) -> &'a mut W {
151        self.bit(false)
152    }
153    #[doc = r"Writes raw bits to the field"]
154    #[inline(always)]
155    pub fn bit(self, value: bool) -> &'a mut W {
156        self.w.bits =
157            (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
158        self.w
159    }
160}
161#[doc = "Control whether the push interrupt for FIFO overflow is enabled or masked\n\nValue on reset: 0"]
162#[derive(Clone, Copy, Debug, PartialEq)]
163pub enum PF0_PUSH_INT_EN_OV_A {
164    #[doc = "0: Mask the interrupt event"]
165    MASK = 0,
166    #[doc = "1: Unmask the interrupt event"]
167    UNMASK = 1,
168}
169impl From<PF0_PUSH_INT_EN_OV_A> for bool {
170    #[inline(always)]
171    fn from(variant: PF0_PUSH_INT_EN_OV_A) -> Self {
172        variant as u8 != 0
173    }
174}
175#[doc = "Field `pf0_push_int_en_ov` reader - Control whether the push interrupt for FIFO overflow is enabled or masked"]
176pub struct PF0_PUSH_INT_EN_OV_R(crate::FieldReader<bool, PF0_PUSH_INT_EN_OV_A>);
177impl PF0_PUSH_INT_EN_OV_R {
178    #[inline(always)]
179    pub(crate) fn new(bits: bool) -> Self {
180        PF0_PUSH_INT_EN_OV_R(crate::FieldReader::new(bits))
181    }
182    #[doc = r"Get enumerated values variant"]
183    #[inline(always)]
184    pub fn variant(&self) -> PF0_PUSH_INT_EN_OV_A {
185        match self.bits {
186            false => PF0_PUSH_INT_EN_OV_A::MASK,
187            true => PF0_PUSH_INT_EN_OV_A::UNMASK,
188        }
189    }
190    #[doc = "Checks if the value of the field is `MASK`"]
191    #[inline(always)]
192    pub fn is_mask(&self) -> bool {
193        **self == PF0_PUSH_INT_EN_OV_A::MASK
194    }
195    #[doc = "Checks if the value of the field is `UNMASK`"]
196    #[inline(always)]
197    pub fn is_unmask(&self) -> bool {
198        **self == PF0_PUSH_INT_EN_OV_A::UNMASK
199    }
200}
201impl core::ops::Deref for PF0_PUSH_INT_EN_OV_R {
202    type Target = crate::FieldReader<bool, PF0_PUSH_INT_EN_OV_A>;
203    #[inline(always)]
204    fn deref(&self) -> &Self::Target {
205        &self.0
206    }
207}
208#[doc = "Field `pf0_push_int_en_ov` writer - Control whether the push interrupt for FIFO overflow is enabled or masked"]
209pub struct PF0_PUSH_INT_EN_OV_W<'a> {
210    w: &'a mut W,
211}
212impl<'a> PF0_PUSH_INT_EN_OV_W<'a> {
213    #[doc = r"Writes `variant` to the field"]
214    #[inline(always)]
215    pub fn variant(self, variant: PF0_PUSH_INT_EN_OV_A) -> &'a mut W {
216        self.bit(variant.into())
217    }
218    #[doc = "Mask the interrupt event"]
219    #[inline(always)]
220    pub fn mask(self) -> &'a mut W {
221        self.variant(PF0_PUSH_INT_EN_OV_A::MASK)
222    }
223    #[doc = "Unmask the interrupt event"]
224    #[inline(always)]
225    pub fn unmask(self) -> &'a mut W {
226        self.variant(PF0_PUSH_INT_EN_OV_A::UNMASK)
227    }
228    #[doc = r"Sets the field bit"]
229    #[inline(always)]
230    pub fn set_bit(self) -> &'a mut W {
231        self.bit(true)
232    }
233    #[doc = r"Clears the field bit"]
234    #[inline(always)]
235    pub fn clear_bit(self) -> &'a mut W {
236        self.bit(false)
237    }
238    #[doc = r"Writes raw bits to the field"]
239    #[inline(always)]
240    pub fn bit(self, value: bool) -> &'a mut W {
241        self.w.bits =
242            (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
243        self.w
244    }
245}
246#[doc = "Control whether the push interrupt for FIFO threshold is enabled or masked"]
247pub type PF0_PUSH_INT_EN_THRESH_A = PF0_PUSH_INT_EN_OV_A;
248#[doc = "Field `pf0_push_int_en_thresh` reader - Control whether the push interrupt for FIFO threshold is enabled or masked"]
249pub type PF0_PUSH_INT_EN_THRESH_R = PF0_PUSH_INT_EN_OV_R;
250#[doc = "Field `pf0_push_int_en_thresh` writer - Control whether the push interrupt for FIFO threshold is enabled or masked"]
251pub struct PF0_PUSH_INT_EN_THRESH_W<'a> {
252    w: &'a mut W,
253}
254impl<'a> PF0_PUSH_INT_EN_THRESH_W<'a> {
255    #[doc = r"Writes `variant` to the field"]
256    #[inline(always)]
257    pub fn variant(self, variant: PF0_PUSH_INT_EN_THRESH_A) -> &'a mut W {
258        self.bit(variant.into())
259    }
260    #[doc = "Mask the interrupt event"]
261    #[inline(always)]
262    pub fn mask(self) -> &'a mut W {
263        self.variant(PF0_PUSH_INT_EN_THRESH_A::MASK)
264    }
265    #[doc = "Unmask the interrupt event"]
266    #[inline(always)]
267    pub fn unmask(self) -> &'a mut W {
268        self.variant(PF0_PUSH_INT_EN_THRESH_A::UNMASK)
269    }
270    #[doc = r"Sets the field bit"]
271    #[inline(always)]
272    pub fn set_bit(self) -> &'a mut W {
273        self.bit(true)
274    }
275    #[doc = r"Clears the field bit"]
276    #[inline(always)]
277    pub fn clear_bit(self) -> &'a mut W {
278        self.bit(false)
279    }
280    #[doc = r"Writes raw bits to the field"]
281    #[inline(always)]
282    pub fn bit(self, value: bool) -> &'a mut W {
283        self.w.bits =
284            (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
285        self.w
286    }
287}
288#[doc = "Control whether the push interrupt for push on SRAM sleep is enabled or masked"]
289pub type PF0_PUSH_INT_EN_SRAM_SLEEP_A = PF0_PUSH_INT_EN_OV_A;
290#[doc = "Field `pf0_push_int_en_sram_sleep` reader - Control whether the push interrupt for push on SRAM sleep is enabled or masked"]
291pub type PF0_PUSH_INT_EN_SRAM_SLEEP_R = PF0_PUSH_INT_EN_OV_R;
292#[doc = "Field `pf0_push_int_en_sram_sleep` writer - Control whether the push interrupt for push on SRAM sleep is enabled or masked"]
293pub struct PF0_PUSH_INT_EN_SRAM_SLEEP_W<'a> {
294    w: &'a mut W,
295}
296impl<'a> PF0_PUSH_INT_EN_SRAM_SLEEP_W<'a> {
297    #[doc = r"Writes `variant` to the field"]
298    #[inline(always)]
299    pub fn variant(self, variant: PF0_PUSH_INT_EN_SRAM_SLEEP_A) -> &'a mut W {
300        self.bit(variant.into())
301    }
302    #[doc = "Mask the interrupt event"]
303    #[inline(always)]
304    pub fn mask(self) -> &'a mut W {
305        self.variant(PF0_PUSH_INT_EN_SRAM_SLEEP_A::MASK)
306    }
307    #[doc = "Unmask the interrupt event"]
308    #[inline(always)]
309    pub fn unmask(self) -> &'a mut W {
310        self.variant(PF0_PUSH_INT_EN_SRAM_SLEEP_A::UNMASK)
311    }
312    #[doc = r"Sets the field bit"]
313    #[inline(always)]
314    pub fn set_bit(self) -> &'a mut W {
315        self.bit(true)
316    }
317    #[doc = r"Clears the field bit"]
318    #[inline(always)]
319    pub fn clear_bit(self) -> &'a mut W {
320        self.bit(false)
321    }
322    #[doc = r"Writes raw bits to the field"]
323    #[inline(always)]
324    pub fn bit(self, value: bool) -> &'a mut W {
325        self.w.bits =
326            (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
327        self.w
328    }
329}
330#[doc = "Field `pf0_push_thresh` reader - PUSH counter threshold (x32 count)"]
331pub struct PF0_PUSH_THRESH_R(crate::FieldReader<u16, u16>);
332impl PF0_PUSH_THRESH_R {
333    #[inline(always)]
334    pub(crate) fn new(bits: u16) -> Self {
335        PF0_PUSH_THRESH_R(crate::FieldReader::new(bits))
336    }
337}
338impl core::ops::Deref for PF0_PUSH_THRESH_R {
339    type Target = crate::FieldReader<u16, u16>;
340    #[inline(always)]
341    fn deref(&self) -> &Self::Target {
342        &self.0
343    }
344}
345#[doc = "Field `pf0_push_thresh` writer - PUSH counter threshold (x32 count)"]
346pub struct PF0_PUSH_THRESH_W<'a> {
347    w: &'a mut W,
348}
349impl<'a> PF0_PUSH_THRESH_W<'a> {
350    #[doc = r"Writes raw bits to the field"]
351    #[inline(always)]
352    pub unsafe fn bits(self, value: u16) -> &'a mut W {
353        self.w.bits =
354            (self.w.bits & !(0x01ff << 16)) | ((value as u32 & 0x01ff) << 16);
355        self.w
356    }
357}
358impl R {
359    #[doc = "Bit 0 - Set this bit to enable sleep"]
360    #[inline(always)]
361    pub fn pf0_push_sleep_en(&self) -> PF0_PUSH_SLEEP_EN_R {
362        PF0_PUSH_SLEEP_EN_R::new((self.bits & 0x01) != 0)
363    }
364    #[doc = "Bit 1 - Select the type of sleep mode"]
365    #[inline(always)]
366    pub fn pf0_push_sleep_type(&self) -> PF0_PUSH_SLEEP_TYPE_R {
367        PF0_PUSH_SLEEP_TYPE_R::new(((self.bits >> 1) & 0x01) != 0)
368    }
369    #[doc = "Bit 2 - Control whether the push interrupt for FIFO overflow is enabled or masked"]
370    #[inline(always)]
371    pub fn pf0_push_int_en_ov(&self) -> PF0_PUSH_INT_EN_OV_R {
372        PF0_PUSH_INT_EN_OV_R::new(((self.bits >> 2) & 0x01) != 0)
373    }
374    #[doc = "Bit 3 - Control whether the push interrupt for FIFO threshold is enabled or masked"]
375    #[inline(always)]
376    pub fn pf0_push_int_en_thresh(&self) -> PF0_PUSH_INT_EN_THRESH_R {
377        PF0_PUSH_INT_EN_THRESH_R::new(((self.bits >> 3) & 0x01) != 0)
378    }
379    #[doc = "Bit 4 - Control whether the push interrupt for push on SRAM sleep is enabled or masked"]
380    #[inline(always)]
381    pub fn pf0_push_int_en_sram_sleep(&self) -> PF0_PUSH_INT_EN_SRAM_SLEEP_R {
382        PF0_PUSH_INT_EN_SRAM_SLEEP_R::new(((self.bits >> 4) & 0x01) != 0)
383    }
384    #[doc = "Bits 16:24 - PUSH counter threshold (x32 count)"]
385    #[inline(always)]
386    pub fn pf0_push_thresh(&self) -> PF0_PUSH_THRESH_R {
387        PF0_PUSH_THRESH_R::new(((self.bits >> 16) & 0x01ff) as u16)
388    }
389}
390impl W {
391    #[doc = "Bit 0 - Set this bit to enable sleep"]
392    #[inline(always)]
393    pub fn pf0_push_sleep_en(&mut self) -> PF0_PUSH_SLEEP_EN_W {
394        PF0_PUSH_SLEEP_EN_W { w: self }
395    }
396    #[doc = "Bit 1 - Select the type of sleep mode"]
397    #[inline(always)]
398    pub fn pf0_push_sleep_type(&mut self) -> PF0_PUSH_SLEEP_TYPE_W {
399        PF0_PUSH_SLEEP_TYPE_W { w: self }
400    }
401    #[doc = "Bit 2 - Control whether the push interrupt for FIFO overflow is enabled or masked"]
402    #[inline(always)]
403    pub fn pf0_push_int_en_ov(&mut self) -> PF0_PUSH_INT_EN_OV_W {
404        PF0_PUSH_INT_EN_OV_W { w: self }
405    }
406    #[doc = "Bit 3 - Control whether the push interrupt for FIFO threshold is enabled or masked"]
407    #[inline(always)]
408    pub fn pf0_push_int_en_thresh(&mut self) -> PF0_PUSH_INT_EN_THRESH_W {
409        PF0_PUSH_INT_EN_THRESH_W { w: self }
410    }
411    #[doc = "Bit 4 - Control whether the push interrupt for push on SRAM sleep is enabled or masked"]
412    #[inline(always)]
413    pub fn pf0_push_int_en_sram_sleep(
414        &mut self,
415    ) -> PF0_PUSH_INT_EN_SRAM_SLEEP_W {
416        PF0_PUSH_INT_EN_SRAM_SLEEP_W { w: self }
417    }
418    #[doc = "Bits 16:24 - PUSH counter threshold (x32 count)"]
419    #[inline(always)]
420    pub fn pf0_push_thresh(&mut self) -> PF0_PUSH_THRESH_W {
421        PF0_PUSH_THRESH_W { w: self }
422    }
423    #[doc = "Writes raw bits to the register."]
424    #[inline(always)]
425    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
426        self.0.bits(bits);
427        self
428    }
429}
430#[doc = "FIFO 0 Push Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pkfb_pf0pushctl](index.html) module"]
431pub struct PKFB_PF0PUSHCTL_SPEC;
432impl crate::RegisterSpec for PKFB_PF0PUSHCTL_SPEC {
433    type Ux = u32;
434}
435#[doc = "`read()` method returns [pkfb_pf0pushctl::R](R) reader structure"]
436impl crate::Readable for PKFB_PF0PUSHCTL_SPEC {
437    type Reader = R;
438}
439#[doc = "`write(|w| ..)` method takes [pkfb_pf0pushctl::W](W) writer structure"]
440impl crate::Writable for PKFB_PF0PUSHCTL_SPEC {
441    type Writer = W;
442}
443#[doc = "`reset()` method sets PKFB_PF0PUSHCTL to value 0"]
444impl crate::Resettable for PKFB_PF0PUSHCTL_SPEC {
445    #[inline(always)]
446    fn reset_value() -> Self::Ux {
447        0
448    }
449}
eos_s3/pkfb/pkfb_pf0pushctl.rs

eos_s3/pkfb/
pkfb_pf0pushctl.rs
