eos_s3/intr_ctrl/
gpio_intr_en_ffe1.rs1#[doc = "Register `GPIO_INTR_EN_FFE1` reader"]
2pub struct R(crate::R<GPIO_INTR_EN_FFE1_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<GPIO_INTR_EN_FFE1_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<GPIO_INTR_EN_FFE1_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<GPIO_INTR_EN_FFE1_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `GPIO_INTR_EN_FFE1` writer"]
17pub struct W(crate::W<GPIO_INTR_EN_FFE1_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<GPIO_INTR_EN_FFE1_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<GPIO_INTR_EN_FFE1_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<GPIO_INTR_EN_FFE1_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "GPIO_0 interrupt enable for FFE1\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum GPIO_0_INTR_EN_FFE1_A {
40 #[doc = "0: Disable the interrupt for the power domain"]
41 ENABLE = 0,
42 #[doc = "1: Enable the interrupt for the power domain"]
43 DISABLE = 1,
44}
45impl From<GPIO_0_INTR_EN_FFE1_A> for bool {
46 #[inline(always)]
47 fn from(variant: GPIO_0_INTR_EN_FFE1_A) -> Self {
48 variant as u8 != 0
49 }
50}
51#[doc = "Field `GPIO_0_INTR_EN_FFE1` reader - GPIO_0 interrupt enable for FFE1"]
52pub struct GPIO_0_INTR_EN_FFE1_R(
53 crate::FieldReader<bool, GPIO_0_INTR_EN_FFE1_A>,
54);
55impl GPIO_0_INTR_EN_FFE1_R {
56 #[inline(always)]
57 pub(crate) fn new(bits: bool) -> Self {
58 GPIO_0_INTR_EN_FFE1_R(crate::FieldReader::new(bits))
59 }
60 #[doc = r"Get enumerated values variant"]
61 #[inline(always)]
62 pub fn variant(&self) -> GPIO_0_INTR_EN_FFE1_A {
63 match self.bits {
64 false => GPIO_0_INTR_EN_FFE1_A::ENABLE,
65 true => GPIO_0_INTR_EN_FFE1_A::DISABLE,
66 }
67 }
68 #[doc = "Checks if the value of the field is `ENABLE`"]
69 #[inline(always)]
70 pub fn is_enable(&self) -> bool {
71 **self == GPIO_0_INTR_EN_FFE1_A::ENABLE
72 }
73 #[doc = "Checks if the value of the field is `DISABLE`"]
74 #[inline(always)]
75 pub fn is_disable(&self) -> bool {
76 **self == GPIO_0_INTR_EN_FFE1_A::DISABLE
77 }
78}
79impl core::ops::Deref for GPIO_0_INTR_EN_FFE1_R {
80 type Target = crate::FieldReader<bool, GPIO_0_INTR_EN_FFE1_A>;
81 #[inline(always)]
82 fn deref(&self) -> &Self::Target {
83 &self.0
84 }
85}
86#[doc = "Field `GPIO_0_INTR_EN_FFE1` writer - GPIO_0 interrupt enable for FFE1"]
87pub struct GPIO_0_INTR_EN_FFE1_W<'a> {
88 w: &'a mut W,
89}
90impl<'a> GPIO_0_INTR_EN_FFE1_W<'a> {
91 #[doc = r"Writes `variant` to the field"]
92 #[inline(always)]
93 pub fn variant(self, variant: GPIO_0_INTR_EN_FFE1_A) -> &'a mut W {
94 self.bit(variant.into())
95 }
96 #[doc = "Disable the interrupt for the power domain"]
97 #[inline(always)]
98 pub fn enable(self) -> &'a mut W {
99 self.variant(GPIO_0_INTR_EN_FFE1_A::ENABLE)
100 }
101 #[doc = "Enable the interrupt for the power domain"]
102 #[inline(always)]
103 pub fn disable(self) -> &'a mut W {
104 self.variant(GPIO_0_INTR_EN_FFE1_A::DISABLE)
105 }
106 #[doc = r"Sets the field bit"]
107 #[inline(always)]
108 pub fn set_bit(self) -> &'a mut W {
109 self.bit(true)
110 }
111 #[doc = r"Clears the field bit"]
112 #[inline(always)]
113 pub fn clear_bit(self) -> &'a mut W {
114 self.bit(false)
115 }
116 #[doc = r"Writes raw bits to the field"]
117 #[inline(always)]
118 pub fn bit(self, value: bool) -> &'a mut W {
119 self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
120 self.w
121 }
122}
123#[doc = "GPIO_1 interrupt enable for FFE1"]
124pub type GPIO_1_INTR_EN_FFE1_A = GPIO_0_INTR_EN_FFE1_A;
125#[doc = "Field `GPIO_1_INTR_EN_FFE1` reader - GPIO_1 interrupt enable for FFE1"]
126pub type GPIO_1_INTR_EN_FFE1_R = GPIO_0_INTR_EN_FFE1_R;
127#[doc = "Field `GPIO_1_INTR_EN_FFE1` writer - GPIO_1 interrupt enable for FFE1"]
128pub struct GPIO_1_INTR_EN_FFE1_W<'a> {
129 w: &'a mut W,
130}
131impl<'a> GPIO_1_INTR_EN_FFE1_W<'a> {
132 #[doc = r"Writes `variant` to the field"]
133 #[inline(always)]
134 pub fn variant(self, variant: GPIO_1_INTR_EN_FFE1_A) -> &'a mut W {
135 self.bit(variant.into())
136 }
137 #[doc = "Disable the interrupt for the power domain"]
138 #[inline(always)]
139 pub fn enable(self) -> &'a mut W {
140 self.variant(GPIO_1_INTR_EN_FFE1_A::ENABLE)
141 }
142 #[doc = "Enable the interrupt for the power domain"]
143 #[inline(always)]
144 pub fn disable(self) -> &'a mut W {
145 self.variant(GPIO_1_INTR_EN_FFE1_A::DISABLE)
146 }
147 #[doc = r"Sets the field bit"]
148 #[inline(always)]
149 pub fn set_bit(self) -> &'a mut W {
150 self.bit(true)
151 }
152 #[doc = r"Clears the field bit"]
153 #[inline(always)]
154 pub fn clear_bit(self) -> &'a mut W {
155 self.bit(false)
156 }
157 #[doc = r"Writes raw bits to the field"]
158 #[inline(always)]
159 pub fn bit(self, value: bool) -> &'a mut W {
160 self.w.bits =
161 (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
162 self.w
163 }
164}
165#[doc = "GPIO_2 interrupt enable for FFE1"]
166pub type GPIO_2_INTR_EN_FFE1_A = GPIO_0_INTR_EN_FFE1_A;
167#[doc = "Field `GPIO_2_INTR_EN_FFE1` reader - GPIO_2 interrupt enable for FFE1"]
168pub type GPIO_2_INTR_EN_FFE1_R = GPIO_0_INTR_EN_FFE1_R;
169#[doc = "Field `GPIO_2_INTR_EN_FFE1` writer - GPIO_2 interrupt enable for FFE1"]
170pub struct GPIO_2_INTR_EN_FFE1_W<'a> {
171 w: &'a mut W,
172}
173impl<'a> GPIO_2_INTR_EN_FFE1_W<'a> {
174 #[doc = r"Writes `variant` to the field"]
175 #[inline(always)]
176 pub fn variant(self, variant: GPIO_2_INTR_EN_FFE1_A) -> &'a mut W {
177 self.bit(variant.into())
178 }
179 #[doc = "Disable the interrupt for the power domain"]
180 #[inline(always)]
181 pub fn enable(self) -> &'a mut W {
182 self.variant(GPIO_2_INTR_EN_FFE1_A::ENABLE)
183 }
184 #[doc = "Enable the interrupt for the power domain"]
185 #[inline(always)]
186 pub fn disable(self) -> &'a mut W {
187 self.variant(GPIO_2_INTR_EN_FFE1_A::DISABLE)
188 }
189 #[doc = r"Sets the field bit"]
190 #[inline(always)]
191 pub fn set_bit(self) -> &'a mut W {
192 self.bit(true)
193 }
194 #[doc = r"Clears the field bit"]
195 #[inline(always)]
196 pub fn clear_bit(self) -> &'a mut W {
197 self.bit(false)
198 }
199 #[doc = r"Writes raw bits to the field"]
200 #[inline(always)]
201 pub fn bit(self, value: bool) -> &'a mut W {
202 self.w.bits =
203 (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
204 self.w
205 }
206}
207#[doc = "GPIO_3 interrupt enable for FFE1"]
208pub type GPIO_3_INTR_EN_FFE1_A = GPIO_0_INTR_EN_FFE1_A;
209#[doc = "Field `GPIO_3_INTR_EN_FFE1` reader - GPIO_3 interrupt enable for FFE1"]
210pub type GPIO_3_INTR_EN_FFE1_R = GPIO_0_INTR_EN_FFE1_R;
211#[doc = "Field `GPIO_3_INTR_EN_FFE1` writer - GPIO_3 interrupt enable for FFE1"]
212pub struct GPIO_3_INTR_EN_FFE1_W<'a> {
213 w: &'a mut W,
214}
215impl<'a> GPIO_3_INTR_EN_FFE1_W<'a> {
216 #[doc = r"Writes `variant` to the field"]
217 #[inline(always)]
218 pub fn variant(self, variant: GPIO_3_INTR_EN_FFE1_A) -> &'a mut W {
219 self.bit(variant.into())
220 }
221 #[doc = "Disable the interrupt for the power domain"]
222 #[inline(always)]
223 pub fn enable(self) -> &'a mut W {
224 self.variant(GPIO_3_INTR_EN_FFE1_A::ENABLE)
225 }
226 #[doc = "Enable the interrupt for the power domain"]
227 #[inline(always)]
228 pub fn disable(self) -> &'a mut W {
229 self.variant(GPIO_3_INTR_EN_FFE1_A::DISABLE)
230 }
231 #[doc = r"Sets the field bit"]
232 #[inline(always)]
233 pub fn set_bit(self) -> &'a mut W {
234 self.bit(true)
235 }
236 #[doc = r"Clears the field bit"]
237 #[inline(always)]
238 pub fn clear_bit(self) -> &'a mut W {
239 self.bit(false)
240 }
241 #[doc = r"Writes raw bits to the field"]
242 #[inline(always)]
243 pub fn bit(self, value: bool) -> &'a mut W {
244 self.w.bits =
245 (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
246 self.w
247 }
248}
249#[doc = "GPIO_4 interrupt enable for FFE1"]
250pub type GPIO_4_INTR_EN_FFE1_A = GPIO_0_INTR_EN_FFE1_A;
251#[doc = "Field `GPIO_4_INTR_EN_FFE1` reader - GPIO_4 interrupt enable for FFE1"]
252pub type GPIO_4_INTR_EN_FFE1_R = GPIO_0_INTR_EN_FFE1_R;
253#[doc = "Field `GPIO_4_INTR_EN_FFE1` writer - GPIO_4 interrupt enable for FFE1"]
254pub struct GPIO_4_INTR_EN_FFE1_W<'a> {
255 w: &'a mut W,
256}
257impl<'a> GPIO_4_INTR_EN_FFE1_W<'a> {
258 #[doc = r"Writes `variant` to the field"]
259 #[inline(always)]
260 pub fn variant(self, variant: GPIO_4_INTR_EN_FFE1_A) -> &'a mut W {
261 self.bit(variant.into())
262 }
263 #[doc = "Disable the interrupt for the power domain"]
264 #[inline(always)]
265 pub fn enable(self) -> &'a mut W {
266 self.variant(GPIO_4_INTR_EN_FFE1_A::ENABLE)
267 }
268 #[doc = "Enable the interrupt for the power domain"]
269 #[inline(always)]
270 pub fn disable(self) -> &'a mut W {
271 self.variant(GPIO_4_INTR_EN_FFE1_A::DISABLE)
272 }
273 #[doc = r"Sets the field bit"]
274 #[inline(always)]
275 pub fn set_bit(self) -> &'a mut W {
276 self.bit(true)
277 }
278 #[doc = r"Clears the field bit"]
279 #[inline(always)]
280 pub fn clear_bit(self) -> &'a mut W {
281 self.bit(false)
282 }
283 #[doc = r"Writes raw bits to the field"]
284 #[inline(always)]
285 pub fn bit(self, value: bool) -> &'a mut W {
286 self.w.bits =
287 (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
288 self.w
289 }
290}
291#[doc = "GPIO_5 interrupt enable for FFE1"]
292pub type GPIO_5_INTR_EN_FFE1_A = GPIO_0_INTR_EN_FFE1_A;
293#[doc = "Field `GPIO_5_INTR_EN_FFE1` reader - GPIO_5 interrupt enable for FFE1"]
294pub type GPIO_5_INTR_EN_FFE1_R = GPIO_0_INTR_EN_FFE1_R;
295#[doc = "Field `GPIO_5_INTR_EN_FFE1` writer - GPIO_5 interrupt enable for FFE1"]
296pub struct GPIO_5_INTR_EN_FFE1_W<'a> {
297 w: &'a mut W,
298}
299impl<'a> GPIO_5_INTR_EN_FFE1_W<'a> {
300 #[doc = r"Writes `variant` to the field"]
301 #[inline(always)]
302 pub fn variant(self, variant: GPIO_5_INTR_EN_FFE1_A) -> &'a mut W {
303 self.bit(variant.into())
304 }
305 #[doc = "Disable the interrupt for the power domain"]
306 #[inline(always)]
307 pub fn enable(self) -> &'a mut W {
308 self.variant(GPIO_5_INTR_EN_FFE1_A::ENABLE)
309 }
310 #[doc = "Enable the interrupt for the power domain"]
311 #[inline(always)]
312 pub fn disable(self) -> &'a mut W {
313 self.variant(GPIO_5_INTR_EN_FFE1_A::DISABLE)
314 }
315 #[doc = r"Sets the field bit"]
316 #[inline(always)]
317 pub fn set_bit(self) -> &'a mut W {
318 self.bit(true)
319 }
320 #[doc = r"Clears the field bit"]
321 #[inline(always)]
322 pub fn clear_bit(self) -> &'a mut W {
323 self.bit(false)
324 }
325 #[doc = r"Writes raw bits to the field"]
326 #[inline(always)]
327 pub fn bit(self, value: bool) -> &'a mut W {
328 self.w.bits =
329 (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
330 self.w
331 }
332}
333#[doc = "GPIO_6 interrupt enable for FFE1"]
334pub type GPIO_6_INTR_EN_FFE1_A = GPIO_0_INTR_EN_FFE1_A;
335#[doc = "Field `GPIO_6_INTR_EN_FFE1` reader - GPIO_6 interrupt enable for FFE1"]
336pub type GPIO_6_INTR_EN_FFE1_R = GPIO_0_INTR_EN_FFE1_R;
337#[doc = "Field `GPIO_6_INTR_EN_FFE1` writer - GPIO_6 interrupt enable for FFE1"]
338pub struct GPIO_6_INTR_EN_FFE1_W<'a> {
339 w: &'a mut W,
340}
341impl<'a> GPIO_6_INTR_EN_FFE1_W<'a> {
342 #[doc = r"Writes `variant` to the field"]
343 #[inline(always)]
344 pub fn variant(self, variant: GPIO_6_INTR_EN_FFE1_A) -> &'a mut W {
345 self.bit(variant.into())
346 }
347 #[doc = "Disable the interrupt for the power domain"]
348 #[inline(always)]
349 pub fn enable(self) -> &'a mut W {
350 self.variant(GPIO_6_INTR_EN_FFE1_A::ENABLE)
351 }
352 #[doc = "Enable the interrupt for the power domain"]
353 #[inline(always)]
354 pub fn disable(self) -> &'a mut W {
355 self.variant(GPIO_6_INTR_EN_FFE1_A::DISABLE)
356 }
357 #[doc = r"Sets the field bit"]
358 #[inline(always)]
359 pub fn set_bit(self) -> &'a mut W {
360 self.bit(true)
361 }
362 #[doc = r"Clears the field bit"]
363 #[inline(always)]
364 pub fn clear_bit(self) -> &'a mut W {
365 self.bit(false)
366 }
367 #[doc = r"Writes raw bits to the field"]
368 #[inline(always)]
369 pub fn bit(self, value: bool) -> &'a mut W {
370 self.w.bits =
371 (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
372 self.w
373 }
374}
375#[doc = "GPIO_7 interrupt enable for FFE1"]
376pub type GPIO_7_INTR_EN_FFE1_A = GPIO_0_INTR_EN_FFE1_A;
377#[doc = "Field `GPIO_7_INTR_EN_FFE1` reader - GPIO_7 interrupt enable for FFE1"]
378pub type GPIO_7_INTR_EN_FFE1_R = GPIO_0_INTR_EN_FFE1_R;
379#[doc = "Field `GPIO_7_INTR_EN_FFE1` writer - GPIO_7 interrupt enable for FFE1"]
380pub struct GPIO_7_INTR_EN_FFE1_W<'a> {
381 w: &'a mut W,
382}
383impl<'a> GPIO_7_INTR_EN_FFE1_W<'a> {
384 #[doc = r"Writes `variant` to the field"]
385 #[inline(always)]
386 pub fn variant(self, variant: GPIO_7_INTR_EN_FFE1_A) -> &'a mut W {
387 self.bit(variant.into())
388 }
389 #[doc = "Disable the interrupt for the power domain"]
390 #[inline(always)]
391 pub fn enable(self) -> &'a mut W {
392 self.variant(GPIO_7_INTR_EN_FFE1_A::ENABLE)
393 }
394 #[doc = "Enable the interrupt for the power domain"]
395 #[inline(always)]
396 pub fn disable(self) -> &'a mut W {
397 self.variant(GPIO_7_INTR_EN_FFE1_A::DISABLE)
398 }
399 #[doc = r"Sets the field bit"]
400 #[inline(always)]
401 pub fn set_bit(self) -> &'a mut W {
402 self.bit(true)
403 }
404 #[doc = r"Clears the field bit"]
405 #[inline(always)]
406 pub fn clear_bit(self) -> &'a mut W {
407 self.bit(false)
408 }
409 #[doc = r"Writes raw bits to the field"]
410 #[inline(always)]
411 pub fn bit(self, value: bool) -> &'a mut W {
412 self.w.bits =
413 (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
414 self.w
415 }
416}
417impl R {
418 #[doc = "Bit 0 - GPIO_0 interrupt enable for FFE1"]
419 #[inline(always)]
420 pub fn gpio_0_intr_en_ffe1(&self) -> GPIO_0_INTR_EN_FFE1_R {
421 GPIO_0_INTR_EN_FFE1_R::new((self.bits & 0x01) != 0)
422 }
423 #[doc = "Bit 1 - GPIO_1 interrupt enable for FFE1"]
424 #[inline(always)]
425 pub fn gpio_1_intr_en_ffe1(&self) -> GPIO_1_INTR_EN_FFE1_R {
426 GPIO_1_INTR_EN_FFE1_R::new(((self.bits >> 1) & 0x01) != 0)
427 }
428 #[doc = "Bit 2 - GPIO_2 interrupt enable for FFE1"]
429 #[inline(always)]
430 pub fn gpio_2_intr_en_ffe1(&self) -> GPIO_2_INTR_EN_FFE1_R {
431 GPIO_2_INTR_EN_FFE1_R::new(((self.bits >> 2) & 0x01) != 0)
432 }
433 #[doc = "Bit 3 - GPIO_3 interrupt enable for FFE1"]
434 #[inline(always)]
435 pub fn gpio_3_intr_en_ffe1(&self) -> GPIO_3_INTR_EN_FFE1_R {
436 GPIO_3_INTR_EN_FFE1_R::new(((self.bits >> 3) & 0x01) != 0)
437 }
438 #[doc = "Bit 4 - GPIO_4 interrupt enable for FFE1"]
439 #[inline(always)]
440 pub fn gpio_4_intr_en_ffe1(&self) -> GPIO_4_INTR_EN_FFE1_R {
441 GPIO_4_INTR_EN_FFE1_R::new(((self.bits >> 4) & 0x01) != 0)
442 }
443 #[doc = "Bit 5 - GPIO_5 interrupt enable for FFE1"]
444 #[inline(always)]
445 pub fn gpio_5_intr_en_ffe1(&self) -> GPIO_5_INTR_EN_FFE1_R {
446 GPIO_5_INTR_EN_FFE1_R::new(((self.bits >> 5) & 0x01) != 0)
447 }
448 #[doc = "Bit 6 - GPIO_6 interrupt enable for FFE1"]
449 #[inline(always)]
450 pub fn gpio_6_intr_en_ffe1(&self) -> GPIO_6_INTR_EN_FFE1_R {
451 GPIO_6_INTR_EN_FFE1_R::new(((self.bits >> 6) & 0x01) != 0)
452 }
453 #[doc = "Bit 7 - GPIO_7 interrupt enable for FFE1"]
454 #[inline(always)]
455 pub fn gpio_7_intr_en_ffe1(&self) -> GPIO_7_INTR_EN_FFE1_R {
456 GPIO_7_INTR_EN_FFE1_R::new(((self.bits >> 7) & 0x01) != 0)
457 }
458}
459impl W {
460 #[doc = "Bit 0 - GPIO_0 interrupt enable for FFE1"]
461 #[inline(always)]
462 pub fn gpio_0_intr_en_ffe1(&mut self) -> GPIO_0_INTR_EN_FFE1_W {
463 GPIO_0_INTR_EN_FFE1_W { w: self }
464 }
465 #[doc = "Bit 1 - GPIO_1 interrupt enable for FFE1"]
466 #[inline(always)]
467 pub fn gpio_1_intr_en_ffe1(&mut self) -> GPIO_1_INTR_EN_FFE1_W {
468 GPIO_1_INTR_EN_FFE1_W { w: self }
469 }
470 #[doc = "Bit 2 - GPIO_2 interrupt enable for FFE1"]
471 #[inline(always)]
472 pub fn gpio_2_intr_en_ffe1(&mut self) -> GPIO_2_INTR_EN_FFE1_W {
473 GPIO_2_INTR_EN_FFE1_W { w: self }
474 }
475 #[doc = "Bit 3 - GPIO_3 interrupt enable for FFE1"]
476 #[inline(always)]
477 pub fn gpio_3_intr_en_ffe1(&mut self) -> GPIO_3_INTR_EN_FFE1_W {
478 GPIO_3_INTR_EN_FFE1_W { w: self }
479 }
480 #[doc = "Bit 4 - GPIO_4 interrupt enable for FFE1"]
481 #[inline(always)]
482 pub fn gpio_4_intr_en_ffe1(&mut self) -> GPIO_4_INTR_EN_FFE1_W {
483 GPIO_4_INTR_EN_FFE1_W { w: self }
484 }
485 #[doc = "Bit 5 - GPIO_5 interrupt enable for FFE1"]
486 #[inline(always)]
487 pub fn gpio_5_intr_en_ffe1(&mut self) -> GPIO_5_INTR_EN_FFE1_W {
488 GPIO_5_INTR_EN_FFE1_W { w: self }
489 }
490 #[doc = "Bit 6 - GPIO_6 interrupt enable for FFE1"]
491 #[inline(always)]
492 pub fn gpio_6_intr_en_ffe1(&mut self) -> GPIO_6_INTR_EN_FFE1_W {
493 GPIO_6_INTR_EN_FFE1_W { w: self }
494 }
495 #[doc = "Bit 7 - GPIO_7 interrupt enable for FFE1"]
496 #[inline(always)]
497 pub fn gpio_7_intr_en_ffe1(&mut self) -> GPIO_7_INTR_EN_FFE1_W {
498 GPIO_7_INTR_EN_FFE1_W { w: self }
499 }
500 #[doc = "Writes raw bits to the register."]
501 #[inline(always)]
502 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
503 self.0.bits(bits);
504 self
505 }
506}
507#[doc = "GPIO interrupt enable for FFE1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gpio_intr_en_ffe1](index.html) module"]
508pub struct GPIO_INTR_EN_FFE1_SPEC;
509impl crate::RegisterSpec for GPIO_INTR_EN_FFE1_SPEC {
510 type Ux = u32;
511}
512#[doc = "`read()` method returns [gpio_intr_en_ffe1::R](R) reader structure"]
513impl crate::Readable for GPIO_INTR_EN_FFE1_SPEC {
514 type Reader = R;
515}
516#[doc = "`write(|w| ..)` method takes [gpio_intr_en_ffe1::W](W) writer structure"]
517impl crate::Writable for GPIO_INTR_EN_FFE1_SPEC {
518 type Writer = W;
519}
520#[doc = "`reset()` method sets GPIO_INTR_EN_FFE1 to value 0"]
521impl crate::Resettable for GPIO_INTR_EN_FFE1_SPEC {
522 #[inline(always)]
523 fn reset_value() -> Self::Ux {
524 0
525 }
526}