1#[doc = "Register `GPIO_INTR` reader"]
2pub struct R(crate::R<GPIO_INTR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<GPIO_INTR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<GPIO_INTR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<GPIO_INTR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `GPIO_INTR` writer"]
17pub struct W(crate::W<GPIO_INTR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<GPIO_INTR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<GPIO_INTR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<GPIO_INTR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `GPIO_0_INTR` reader - Active high edge interrupt detected for GPIO_0. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
38pub struct GPIO_0_INTR_R(crate::FieldReader<bool, bool>);
39impl GPIO_0_INTR_R {
40 #[inline(always)]
41 pub(crate) fn new(bits: bool) -> Self {
42 GPIO_0_INTR_R(crate::FieldReader::new(bits))
43 }
44}
45impl core::ops::Deref for GPIO_0_INTR_R {
46 type Target = crate::FieldReader<bool, bool>;
47 #[inline(always)]
48 fn deref(&self) -> &Self::Target {
49 &self.0
50 }
51}
52#[doc = "Field `GPIO_0_INTR` writer - Active high edge interrupt detected for GPIO_0. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
53pub struct GPIO_0_INTR_W<'a> {
54 w: &'a mut W,
55}
56impl<'a> GPIO_0_INTR_W<'a> {
57 #[doc = r"Sets the field bit"]
58 #[inline(always)]
59 pub fn set_bit(self) -> &'a mut W {
60 self.bit(true)
61 }
62 #[doc = r"Clears the field bit"]
63 #[inline(always)]
64 pub fn clear_bit(self) -> &'a mut W {
65 self.bit(false)
66 }
67 #[doc = r"Writes raw bits to the field"]
68 #[inline(always)]
69 pub fn bit(self, value: bool) -> &'a mut W {
70 self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
71 self.w
72 }
73}
74#[doc = "Field `GPIO_1_INTR` reader - Active high edge interrupt detected for GPIO_1. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
75pub struct GPIO_1_INTR_R(crate::FieldReader<bool, bool>);
76impl GPIO_1_INTR_R {
77 #[inline(always)]
78 pub(crate) fn new(bits: bool) -> Self {
79 GPIO_1_INTR_R(crate::FieldReader::new(bits))
80 }
81}
82impl core::ops::Deref for GPIO_1_INTR_R {
83 type Target = crate::FieldReader<bool, bool>;
84 #[inline(always)]
85 fn deref(&self) -> &Self::Target {
86 &self.0
87 }
88}
89#[doc = "Field `GPIO_1_INTR` writer - Active high edge interrupt detected for GPIO_1. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
90pub struct GPIO_1_INTR_W<'a> {
91 w: &'a mut W,
92}
93impl<'a> GPIO_1_INTR_W<'a> {
94 #[doc = r"Sets the field bit"]
95 #[inline(always)]
96 pub fn set_bit(self) -> &'a mut W {
97 self.bit(true)
98 }
99 #[doc = r"Clears the field bit"]
100 #[inline(always)]
101 pub fn clear_bit(self) -> &'a mut W {
102 self.bit(false)
103 }
104 #[doc = r"Writes raw bits to the field"]
105 #[inline(always)]
106 pub fn bit(self, value: bool) -> &'a mut W {
107 self.w.bits =
108 (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
109 self.w
110 }
111}
112#[doc = "Field `GPIO_2_INTR` reader - Active high edge interrupt detected for GPIO_2. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
113pub struct GPIO_2_INTR_R(crate::FieldReader<bool, bool>);
114impl GPIO_2_INTR_R {
115 #[inline(always)]
116 pub(crate) fn new(bits: bool) -> Self {
117 GPIO_2_INTR_R(crate::FieldReader::new(bits))
118 }
119}
120impl core::ops::Deref for GPIO_2_INTR_R {
121 type Target = crate::FieldReader<bool, bool>;
122 #[inline(always)]
123 fn deref(&self) -> &Self::Target {
124 &self.0
125 }
126}
127#[doc = "Field `GPIO_2_INTR` writer - Active high edge interrupt detected for GPIO_2. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
128pub struct GPIO_2_INTR_W<'a> {
129 w: &'a mut W,
130}
131impl<'a> GPIO_2_INTR_W<'a> {
132 #[doc = r"Sets the field bit"]
133 #[inline(always)]
134 pub fn set_bit(self) -> &'a mut W {
135 self.bit(true)
136 }
137 #[doc = r"Clears the field bit"]
138 #[inline(always)]
139 pub fn clear_bit(self) -> &'a mut W {
140 self.bit(false)
141 }
142 #[doc = r"Writes raw bits to the field"]
143 #[inline(always)]
144 pub fn bit(self, value: bool) -> &'a mut W {
145 self.w.bits =
146 (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
147 self.w
148 }
149}
150#[doc = "Field `GPIO_3_INTR` reader - Active high edge interrupt detected for GPIO_3. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
151pub struct GPIO_3_INTR_R(crate::FieldReader<bool, bool>);
152impl GPIO_3_INTR_R {
153 #[inline(always)]
154 pub(crate) fn new(bits: bool) -> Self {
155 GPIO_3_INTR_R(crate::FieldReader::new(bits))
156 }
157}
158impl core::ops::Deref for GPIO_3_INTR_R {
159 type Target = crate::FieldReader<bool, bool>;
160 #[inline(always)]
161 fn deref(&self) -> &Self::Target {
162 &self.0
163 }
164}
165#[doc = "Field `GPIO_3_INTR` writer - Active high edge interrupt detected for GPIO_3. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
166pub struct GPIO_3_INTR_W<'a> {
167 w: &'a mut W,
168}
169impl<'a> GPIO_3_INTR_W<'a> {
170 #[doc = r"Sets the field bit"]
171 #[inline(always)]
172 pub fn set_bit(self) -> &'a mut W {
173 self.bit(true)
174 }
175 #[doc = r"Clears the field bit"]
176 #[inline(always)]
177 pub fn clear_bit(self) -> &'a mut W {
178 self.bit(false)
179 }
180 #[doc = r"Writes raw bits to the field"]
181 #[inline(always)]
182 pub fn bit(self, value: bool) -> &'a mut W {
183 self.w.bits =
184 (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
185 self.w
186 }
187}
188#[doc = "Field `GPIO_4_INTR` reader - Active high edge interrupt detected for GPIO_4. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
189pub struct GPIO_4_INTR_R(crate::FieldReader<bool, bool>);
190impl GPIO_4_INTR_R {
191 #[inline(always)]
192 pub(crate) fn new(bits: bool) -> Self {
193 GPIO_4_INTR_R(crate::FieldReader::new(bits))
194 }
195}
196impl core::ops::Deref for GPIO_4_INTR_R {
197 type Target = crate::FieldReader<bool, bool>;
198 #[inline(always)]
199 fn deref(&self) -> &Self::Target {
200 &self.0
201 }
202}
203#[doc = "Field `GPIO_4_INTR` writer - Active high edge interrupt detected for GPIO_4. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
204pub struct GPIO_4_INTR_W<'a> {
205 w: &'a mut W,
206}
207impl<'a> GPIO_4_INTR_W<'a> {
208 #[doc = r"Sets the field bit"]
209 #[inline(always)]
210 pub fn set_bit(self) -> &'a mut W {
211 self.bit(true)
212 }
213 #[doc = r"Clears the field bit"]
214 #[inline(always)]
215 pub fn clear_bit(self) -> &'a mut W {
216 self.bit(false)
217 }
218 #[doc = r"Writes raw bits to the field"]
219 #[inline(always)]
220 pub fn bit(self, value: bool) -> &'a mut W {
221 self.w.bits =
222 (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
223 self.w
224 }
225}
226#[doc = "Field `GPIO_5_INTR` reader - Active high edge interrupt detected for GPIO_5. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
227pub struct GPIO_5_INTR_R(crate::FieldReader<bool, bool>);
228impl GPIO_5_INTR_R {
229 #[inline(always)]
230 pub(crate) fn new(bits: bool) -> Self {
231 GPIO_5_INTR_R(crate::FieldReader::new(bits))
232 }
233}
234impl core::ops::Deref for GPIO_5_INTR_R {
235 type Target = crate::FieldReader<bool, bool>;
236 #[inline(always)]
237 fn deref(&self) -> &Self::Target {
238 &self.0
239 }
240}
241#[doc = "Field `GPIO_5_INTR` writer - Active high edge interrupt detected for GPIO_5. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
242pub struct GPIO_5_INTR_W<'a> {
243 w: &'a mut W,
244}
245impl<'a> GPIO_5_INTR_W<'a> {
246 #[doc = r"Sets the field bit"]
247 #[inline(always)]
248 pub fn set_bit(self) -> &'a mut W {
249 self.bit(true)
250 }
251 #[doc = r"Clears the field bit"]
252 #[inline(always)]
253 pub fn clear_bit(self) -> &'a mut W {
254 self.bit(false)
255 }
256 #[doc = r"Writes raw bits to the field"]
257 #[inline(always)]
258 pub fn bit(self, value: bool) -> &'a mut W {
259 self.w.bits =
260 (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
261 self.w
262 }
263}
264#[doc = "Field `GPIO_6_INTR` reader - Active high edge interrupt detected for GPIO_6. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
265pub struct GPIO_6_INTR_R(crate::FieldReader<bool, bool>);
266impl GPIO_6_INTR_R {
267 #[inline(always)]
268 pub(crate) fn new(bits: bool) -> Self {
269 GPIO_6_INTR_R(crate::FieldReader::new(bits))
270 }
271}
272impl core::ops::Deref for GPIO_6_INTR_R {
273 type Target = crate::FieldReader<bool, bool>;
274 #[inline(always)]
275 fn deref(&self) -> &Self::Target {
276 &self.0
277 }
278}
279#[doc = "Field `GPIO_6_INTR` writer - Active high edge interrupt detected for GPIO_6. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
280pub struct GPIO_6_INTR_W<'a> {
281 w: &'a mut W,
282}
283impl<'a> GPIO_6_INTR_W<'a> {
284 #[doc = r"Sets the field bit"]
285 #[inline(always)]
286 pub fn set_bit(self) -> &'a mut W {
287 self.bit(true)
288 }
289 #[doc = r"Clears the field bit"]
290 #[inline(always)]
291 pub fn clear_bit(self) -> &'a mut W {
292 self.bit(false)
293 }
294 #[doc = r"Writes raw bits to the field"]
295 #[inline(always)]
296 pub fn bit(self, value: bool) -> &'a mut W {
297 self.w.bits =
298 (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
299 self.w
300 }
301}
302#[doc = "Field `GPIO_7_INTR` reader - Active high edge interrupt detected for GPIO_7. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
303pub struct GPIO_7_INTR_R(crate::FieldReader<bool, bool>);
304impl GPIO_7_INTR_R {
305 #[inline(always)]
306 pub(crate) fn new(bits: bool) -> Self {
307 GPIO_7_INTR_R(crate::FieldReader::new(bits))
308 }
309}
310impl core::ops::Deref for GPIO_7_INTR_R {
311 type Target = crate::FieldReader<bool, bool>;
312 #[inline(always)]
313 fn deref(&self) -> &Self::Target {
314 &self.0
315 }
316}
317#[doc = "Field `GPIO_7_INTR` writer - Active high edge interrupt detected for GPIO_7. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
318pub struct GPIO_7_INTR_W<'a> {
319 w: &'a mut W,
320}
321impl<'a> GPIO_7_INTR_W<'a> {
322 #[doc = r"Sets the field bit"]
323 #[inline(always)]
324 pub fn set_bit(self) -> &'a mut W {
325 self.bit(true)
326 }
327 #[doc = r"Clears the field bit"]
328 #[inline(always)]
329 pub fn clear_bit(self) -> &'a mut W {
330 self.bit(false)
331 }
332 #[doc = r"Writes raw bits to the field"]
333 #[inline(always)]
334 pub fn bit(self, value: bool) -> &'a mut W {
335 self.w.bits =
336 (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
337 self.w
338 }
339}
340impl R {
341 #[doc = "Bit 0 - Active high edge interrupt detected for GPIO_0. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
342 #[inline(always)]
343 pub fn gpio_0_intr(&self) -> GPIO_0_INTR_R {
344 GPIO_0_INTR_R::new((self.bits & 0x01) != 0)
345 }
346 #[doc = "Bit 1 - Active high edge interrupt detected for GPIO_1. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
347 #[inline(always)]
348 pub fn gpio_1_intr(&self) -> GPIO_1_INTR_R {
349 GPIO_1_INTR_R::new(((self.bits >> 1) & 0x01) != 0)
350 }
351 #[doc = "Bit 2 - Active high edge interrupt detected for GPIO_2. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
352 #[inline(always)]
353 pub fn gpio_2_intr(&self) -> GPIO_2_INTR_R {
354 GPIO_2_INTR_R::new(((self.bits >> 2) & 0x01) != 0)
355 }
356 #[doc = "Bit 3 - Active high edge interrupt detected for GPIO_3. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
357 #[inline(always)]
358 pub fn gpio_3_intr(&self) -> GPIO_3_INTR_R {
359 GPIO_3_INTR_R::new(((self.bits >> 3) & 0x01) != 0)
360 }
361 #[doc = "Bit 4 - Active high edge interrupt detected for GPIO_4. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
362 #[inline(always)]
363 pub fn gpio_4_intr(&self) -> GPIO_4_INTR_R {
364 GPIO_4_INTR_R::new(((self.bits >> 4) & 0x01) != 0)
365 }
366 #[doc = "Bit 5 - Active high edge interrupt detected for GPIO_5. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
367 #[inline(always)]
368 pub fn gpio_5_intr(&self) -> GPIO_5_INTR_R {
369 GPIO_5_INTR_R::new(((self.bits >> 5) & 0x01) != 0)
370 }
371 #[doc = "Bit 6 - Active high edge interrupt detected for GPIO_6. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
372 #[inline(always)]
373 pub fn gpio_6_intr(&self) -> GPIO_6_INTR_R {
374 GPIO_6_INTR_R::new(((self.bits >> 6) & 0x01) != 0)
375 }
376 #[doc = "Bit 7 - Active high edge interrupt detected for GPIO_7. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
377 #[inline(always)]
378 pub fn gpio_7_intr(&self) -> GPIO_7_INTR_R {
379 GPIO_7_INTR_R::new(((self.bits >> 7) & 0x01) != 0)
380 }
381}
382impl W {
383 #[doc = "Bit 0 - Active high edge interrupt detected for GPIO_0. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
384 #[inline(always)]
385 pub fn gpio_0_intr(&mut self) -> GPIO_0_INTR_W {
386 GPIO_0_INTR_W { w: self }
387 }
388 #[doc = "Bit 1 - Active high edge interrupt detected for GPIO_1. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
389 #[inline(always)]
390 pub fn gpio_1_intr(&mut self) -> GPIO_1_INTR_W {
391 GPIO_1_INTR_W { w: self }
392 }
393 #[doc = "Bit 2 - Active high edge interrupt detected for GPIO_2. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
394 #[inline(always)]
395 pub fn gpio_2_intr(&mut self) -> GPIO_2_INTR_W {
396 GPIO_2_INTR_W { w: self }
397 }
398 #[doc = "Bit 3 - Active high edge interrupt detected for GPIO_3. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
399 #[inline(always)]
400 pub fn gpio_3_intr(&mut self) -> GPIO_3_INTR_W {
401 GPIO_3_INTR_W { w: self }
402 }
403 #[doc = "Bit 4 - Active high edge interrupt detected for GPIO_4. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
404 #[inline(always)]
405 pub fn gpio_4_intr(&mut self) -> GPIO_4_INTR_W {
406 GPIO_4_INTR_W { w: self }
407 }
408 #[doc = "Bit 5 - Active high edge interrupt detected for GPIO_5. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
409 #[inline(always)]
410 pub fn gpio_5_intr(&mut self) -> GPIO_5_INTR_W {
411 GPIO_5_INTR_W { w: self }
412 }
413 #[doc = "Bit 6 - Active high edge interrupt detected for GPIO_6. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
414 #[inline(always)]
415 pub fn gpio_6_intr(&mut self) -> GPIO_6_INTR_W {
416 GPIO_6_INTR_W { w: self }
417 }
418 #[doc = "Bit 7 - Active high edge interrupt detected for GPIO_7. When interrupt type is selected as edge detect, this register will return high when triggered, write 1 to clear."]
419 #[inline(always)]
420 pub fn gpio_7_intr(&mut self) -> GPIO_7_INTR_W {
421 GPIO_7_INTR_W { w: self }
422 }
423 #[doc = "Writes raw bits to the register."]
424 #[inline(always)]
425 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
426 self.0.bits(bits);
427 self
428 }
429}
430#[doc = "Indicators of interrupt triggers detected\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gpio_intr](index.html) module"]
431pub struct GPIO_INTR_SPEC;
432impl crate::RegisterSpec for GPIO_INTR_SPEC {
433 type Ux = u32;
434}
435#[doc = "`read()` method returns [gpio_intr::R](R) reader structure"]
436impl crate::Readable for GPIO_INTR_SPEC {
437 type Reader = R;
438}
439#[doc = "`write(|w| ..)` method takes [gpio_intr::W](W) writer structure"]
440impl crate::Writable for GPIO_INTR_SPEC {
441 type Writer = W;
442}
443#[doc = "`reset()` method sets GPIO_INTR to value 0"]
444impl crate::Resettable for GPIO_INTR_SPEC {
445 #[inline(always)]
446 fn reset_value() -> Self::Ux {
447 0
448 }
449}