eos_s3/extm4regs/
config_mem3.rs

1#[doc = "Register `CONFIG_MEM3` reader"]
2pub struct R(crate::R<CONFIG_MEM3_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CONFIG_MEM3_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CONFIG_MEM3_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CONFIG_MEM3_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CONFIG_MEM3` writer"]
17pub struct W(crate::W<CONFIG_MEM3_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CONFIG_MEM3_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CONFIG_MEM3_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CONFIG_MEM3_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `MEM0_32K_RM` reader - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
38pub struct MEM0_32K_RM_R(crate::FieldReader<u8, u8>);
39impl MEM0_32K_RM_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: u8) -> Self {
42        MEM0_32K_RM_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for MEM0_32K_RM_R {
46    type Target = crate::FieldReader<u8, u8>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `MEM0_32K_RM` writer - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
53pub struct MEM0_32K_RM_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> MEM0_32K_RM_W<'a> {
57    #[doc = r"Writes raw bits to the field"]
58    #[inline(always)]
59    pub unsafe fn bits(self, value: u8) -> &'a mut W {
60        self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03);
61        self.w
62    }
63}
64#[doc = "Field `MEM0_32K_DST` reader - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
65to be set to 2’b00. This pin is intended for debug/FA purposes only."]
66pub struct MEM0_32K_DST_R(crate::FieldReader<bool, bool>);
67impl MEM0_32K_DST_R {
68    #[inline(always)]
69    pub(crate) fn new(bits: bool) -> Self {
70        MEM0_32K_DST_R(crate::FieldReader::new(bits))
71    }
72}
73impl core::ops::Deref for MEM0_32K_DST_R {
74    type Target = crate::FieldReader<bool, bool>;
75    #[inline(always)]
76    fn deref(&self) -> &Self::Target {
77        &self.0
78    }
79}
80#[doc = "Field `MEM0_32K_DST` writer - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
81to be set to 2’b00. This pin is intended for debug/FA purposes only."]
82pub struct MEM0_32K_DST_W<'a> {
83    w: &'a mut W,
84}
85impl<'a> MEM0_32K_DST_W<'a> {
86    #[doc = r"Sets the field bit"]
87    #[inline(always)]
88    pub fn set_bit(self) -> &'a mut W {
89        self.bit(true)
90    }
91    #[doc = r"Clears the field bit"]
92    #[inline(always)]
93    pub fn clear_bit(self) -> &'a mut W {
94        self.bit(false)
95    }
96    #[doc = r"Writes raw bits to the field"]
97    #[inline(always)]
98    pub fn bit(self, value: bool) -> &'a mut W {
99        self.w.bits =
100            (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
101        self.w
102    }
103}
104#[doc = "Field `MEM1_32K_RM` reader - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
105pub struct MEM1_32K_RM_R(crate::FieldReader<u8, u8>);
106impl MEM1_32K_RM_R {
107    #[inline(always)]
108    pub(crate) fn new(bits: u8) -> Self {
109        MEM1_32K_RM_R(crate::FieldReader::new(bits))
110    }
111}
112impl core::ops::Deref for MEM1_32K_RM_R {
113    type Target = crate::FieldReader<u8, u8>;
114    #[inline(always)]
115    fn deref(&self) -> &Self::Target {
116        &self.0
117    }
118}
119#[doc = "Field `MEM1_32K_RM` writer - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
120pub struct MEM1_32K_RM_W<'a> {
121    w: &'a mut W,
122}
123impl<'a> MEM1_32K_RM_W<'a> {
124    #[doc = r"Writes raw bits to the field"]
125    #[inline(always)]
126    pub unsafe fn bits(self, value: u8) -> &'a mut W {
127        self.w.bits =
128            (self.w.bits & !(0x03 << 5)) | ((value as u32 & 0x03) << 5);
129        self.w
130    }
131}
132#[doc = "Field `MEM1_32K_DST` reader - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
133to be set to 2’b00. This pin is intended for debug/FA purposes only."]
134pub struct MEM1_32K_DST_R(crate::FieldReader<bool, bool>);
135impl MEM1_32K_DST_R {
136    #[inline(always)]
137    pub(crate) fn new(bits: bool) -> Self {
138        MEM1_32K_DST_R(crate::FieldReader::new(bits))
139    }
140}
141impl core::ops::Deref for MEM1_32K_DST_R {
142    type Target = crate::FieldReader<bool, bool>;
143    #[inline(always)]
144    fn deref(&self) -> &Self::Target {
145        &self.0
146    }
147}
148#[doc = "Field `MEM1_32K_DST` writer - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
149to be set to 2’b00. This pin is intended for debug/FA purposes only."]
150pub struct MEM1_32K_DST_W<'a> {
151    w: &'a mut W,
152}
153impl<'a> MEM1_32K_DST_W<'a> {
154    #[doc = r"Sets the field bit"]
155    #[inline(always)]
156    pub fn set_bit(self) -> &'a mut W {
157        self.bit(true)
158    }
159    #[doc = r"Clears the field bit"]
160    #[inline(always)]
161    pub fn clear_bit(self) -> &'a mut W {
162        self.bit(false)
163    }
164    #[doc = r"Writes raw bits to the field"]
165    #[inline(always)]
166    pub fn bit(self, value: bool) -> &'a mut W {
167        self.w.bits =
168            (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
169        self.w
170    }
171}
172#[doc = "Field `MEM2_32K_RM` reader - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
173pub struct MEM2_32K_RM_R(crate::FieldReader<u8, u8>);
174impl MEM2_32K_RM_R {
175    #[inline(always)]
176    pub(crate) fn new(bits: u8) -> Self {
177        MEM2_32K_RM_R(crate::FieldReader::new(bits))
178    }
179}
180impl core::ops::Deref for MEM2_32K_RM_R {
181    type Target = crate::FieldReader<u8, u8>;
182    #[inline(always)]
183    fn deref(&self) -> &Self::Target {
184        &self.0
185    }
186}
187#[doc = "Field `MEM2_32K_RM` writer - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
188pub struct MEM2_32K_RM_W<'a> {
189    w: &'a mut W,
190}
191impl<'a> MEM2_32K_RM_W<'a> {
192    #[doc = r"Writes raw bits to the field"]
193    #[inline(always)]
194    pub unsafe fn bits(self, value: u8) -> &'a mut W {
195        self.w.bits =
196            (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10);
197        self.w
198    }
199}
200#[doc = "Field `MEM2_32K_DST` reader - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
201to be set to 2’b00. This pin is intended for debug/FA purposes only."]
202pub struct MEM2_32K_DST_R(crate::FieldReader<bool, bool>);
203impl MEM2_32K_DST_R {
204    #[inline(always)]
205    pub(crate) fn new(bits: bool) -> Self {
206        MEM2_32K_DST_R(crate::FieldReader::new(bits))
207    }
208}
209impl core::ops::Deref for MEM2_32K_DST_R {
210    type Target = crate::FieldReader<bool, bool>;
211    #[inline(always)]
212    fn deref(&self) -> &Self::Target {
213        &self.0
214    }
215}
216#[doc = "Field `MEM2_32K_DST` writer - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
217to be set to 2’b00. This pin is intended for debug/FA purposes only."]
218pub struct MEM2_32K_DST_W<'a> {
219    w: &'a mut W,
220}
221impl<'a> MEM2_32K_DST_W<'a> {
222    #[doc = r"Sets the field bit"]
223    #[inline(always)]
224    pub fn set_bit(self) -> &'a mut W {
225        self.bit(true)
226    }
227    #[doc = r"Clears the field bit"]
228    #[inline(always)]
229    pub fn clear_bit(self) -> &'a mut W {
230        self.bit(false)
231    }
232    #[doc = r"Writes raw bits to the field"]
233    #[inline(always)]
234    pub fn bit(self, value: bool) -> &'a mut W {
235        self.w.bits =
236            (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
237        self.w
238    }
239}
240#[doc = "Field `MEM3_32K_RM` reader - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
241pub struct MEM3_32K_RM_R(crate::FieldReader<u8, u8>);
242impl MEM3_32K_RM_R {
243    #[inline(always)]
244    pub(crate) fn new(bits: u8) -> Self {
245        MEM3_32K_RM_R(crate::FieldReader::new(bits))
246    }
247}
248impl core::ops::Deref for MEM3_32K_RM_R {
249    type Target = crate::FieldReader<u8, u8>;
250    #[inline(always)]
251    fn deref(&self) -> &Self::Target {
252        &self.0
253    }
254}
255#[doc = "Field `MEM3_32K_RM` writer - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
256pub struct MEM3_32K_RM_W<'a> {
257    w: &'a mut W,
258}
259impl<'a> MEM3_32K_RM_W<'a> {
260    #[doc = r"Writes raw bits to the field"]
261    #[inline(always)]
262    pub unsafe fn bits(self, value: u8) -> &'a mut W {
263        self.w.bits =
264            (self.w.bits & !(0x03 << 15)) | ((value as u32 & 0x03) << 15);
265        self.w
266    }
267}
268#[doc = "Field `MEM4_32K_DST` reader - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
269to be set to 2’b00. This pin is intended for debug/FA purposes only."]
270pub struct MEM4_32K_DST_R(crate::FieldReader<bool, bool>);
271impl MEM4_32K_DST_R {
272    #[inline(always)]
273    pub(crate) fn new(bits: bool) -> Self {
274        MEM4_32K_DST_R(crate::FieldReader::new(bits))
275    }
276}
277impl core::ops::Deref for MEM4_32K_DST_R {
278    type Target = crate::FieldReader<bool, bool>;
279    #[inline(always)]
280    fn deref(&self) -> &Self::Target {
281        &self.0
282    }
283}
284#[doc = "Field `MEM4_32K_DST` writer - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
285to be set to 2’b00. This pin is intended for debug/FA purposes only."]
286pub struct MEM4_32K_DST_W<'a> {
287    w: &'a mut W,
288}
289impl<'a> MEM4_32K_DST_W<'a> {
290    #[doc = r"Sets the field bit"]
291    #[inline(always)]
292    pub fn set_bit(self) -> &'a mut W {
293        self.bit(true)
294    }
295    #[doc = r"Clears the field bit"]
296    #[inline(always)]
297    pub fn clear_bit(self) -> &'a mut W {
298        self.bit(false)
299    }
300    #[doc = r"Writes raw bits to the field"]
301    #[inline(always)]
302    pub fn bit(self, value: bool) -> &'a mut W {
303        self.w.bits =
304            (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
305        self.w
306    }
307}
308impl R {
309    #[doc = "Bits 0:1 - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
310    #[inline(always)]
311    pub fn mem0_32k_rm(&self) -> MEM0_32K_RM_R {
312        MEM0_32K_RM_R::new((self.bits & 0x03) as u8)
313    }
314    #[doc = "Bit 4 - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
315to be set to 2’b00. This pin is intended for debug/FA purposes only."]
316    #[inline(always)]
317    pub fn mem0_32k_dst(&self) -> MEM0_32K_DST_R {
318        MEM0_32K_DST_R::new(((self.bits >> 4) & 0x01) != 0)
319    }
320    #[doc = "Bits 5:6 - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
321    #[inline(always)]
322    pub fn mem1_32k_rm(&self) -> MEM1_32K_RM_R {
323        MEM1_32K_RM_R::new(((self.bits >> 5) & 0x03) as u8)
324    }
325    #[doc = "Bit 9 - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
326to be set to 2’b00. This pin is intended for debug/FA purposes only."]
327    #[inline(always)]
328    pub fn mem1_32k_dst(&self) -> MEM1_32K_DST_R {
329        MEM1_32K_DST_R::new(((self.bits >> 9) & 0x01) != 0)
330    }
331    #[doc = "Bits 10:11 - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
332    #[inline(always)]
333    pub fn mem2_32k_rm(&self) -> MEM2_32K_RM_R {
334        MEM2_32K_RM_R::new(((self.bits >> 10) & 0x03) as u8)
335    }
336    #[doc = "Bit 14 - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
337to be set to 2’b00. This pin is intended for debug/FA purposes only."]
338    #[inline(always)]
339    pub fn mem2_32k_dst(&self) -> MEM2_32K_DST_R {
340        MEM2_32K_DST_R::new(((self.bits >> 14) & 0x01) != 0)
341    }
342    #[doc = "Bits 15:16 - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
343    #[inline(always)]
344    pub fn mem3_32k_rm(&self) -> MEM3_32K_RM_R {
345        MEM3_32K_RM_R::new(((self.bits >> 15) & 0x03) as u8)
346    }
347    #[doc = "Bit 19 - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
348to be set to 2’b00. This pin is intended for debug/FA purposes only."]
349    #[inline(always)]
350    pub fn mem4_32k_dst(&self) -> MEM4_32K_DST_R {
351        MEM4_32K_DST_R::new(((self.bits >> 19) & 0x01) != 0)
352    }
353}
354impl W {
355    #[doc = "Bits 0:1 - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
356    #[inline(always)]
357    pub fn mem0_32k_rm(&mut self) -> MEM0_32K_RM_W {
358        MEM0_32K_RM_W { w: self }
359    }
360    #[doc = "Bit 4 - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
361to be set to 2’b00. This pin is intended for debug/FA purposes only."]
362    #[inline(always)]
363    pub fn mem0_32k_dst(&mut self) -> MEM0_32K_DST_W {
364        MEM0_32K_DST_W { w: self }
365    }
366    #[doc = "Bits 5:6 - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
367    #[inline(always)]
368    pub fn mem1_32k_rm(&mut self) -> MEM1_32K_RM_W {
369        MEM1_32K_RM_W { w: self }
370    }
371    #[doc = "Bit 9 - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
372to be set to 2’b00. This pin is intended for debug/FA purposes only."]
373    #[inline(always)]
374    pub fn mem1_32k_dst(&mut self) -> MEM1_32K_DST_W {
375        MEM1_32K_DST_W { w: self }
376    }
377    #[doc = "Bits 10:11 - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
378    #[inline(always)]
379    pub fn mem2_32k_rm(&mut self) -> MEM2_32K_RM_W {
380        MEM2_32K_RM_W { w: self }
381    }
382    #[doc = "Bit 14 - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
383to be set to 2’b00. This pin is intended for debug/FA purposes only."]
384    #[inline(always)]
385    pub fn mem2_32k_dst(&mut self) -> MEM2_32K_DST_W {
386        MEM2_32K_DST_W { w: self }
387    }
388    #[doc = "Bits 15:16 - Read and write margin control. Recommended setting is 2’b10. 2’b00 provides the most margin (slowest speed). 2’b11 provides the least margin (fastest speed) memory. This setting is required for VDDMIN operation."]
389    #[inline(always)]
390    pub fn mem3_32k_rm(&mut self) -> MEM3_32K_RM_W {
391        MEM3_32K_RM_W { w: self }
392    }
393    #[doc = "Bit 19 - ‘Disable-Self-Time’. When asserted high, overrides the self-timed circuitry and causes the read margin to be controlled by the falling clk edge. Requires margin\\[\\]
394to be set to 2’b00. This pin is intended for debug/FA purposes only."]
395    #[inline(always)]
396    pub fn mem4_32k_dst(&mut self) -> MEM4_32K_DST_W {
397        MEM4_32K_DST_W { w: self }
398    }
399    #[doc = "Writes raw bits to the register."]
400    #[inline(always)]
401    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
402        self.0.bits(bits);
403        self
404    }
405}
406#[doc = "Memory configuration register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [config_mem3](index.html) module"]
407pub struct CONFIG_MEM3_SPEC;
408impl crate::RegisterSpec for CONFIG_MEM3_SPEC {
409    type Ux = u32;
410}
411#[doc = "`read()` method returns [config_mem3::R](R) reader structure"]
412impl crate::Readable for CONFIG_MEM3_SPEC {
413    type Reader = R;
414}
415#[doc = "`write(|w| ..)` method takes [config_mem3::W](W) writer structure"]
416impl crate::Writable for CONFIG_MEM3_SPEC {
417    type Writer = W;
418}
419#[doc = "`reset()` method sets CONFIG_MEM3 to value 0x0001_0842"]
420impl crate::Resettable for CONFIG_MEM3_SPEC {
421    #[inline(always)]
422    fn reset_value() -> Self::Ux {
423        0x0001_0842
424    }
425}
eos_s3/extm4regs/config_mem3.rs

eos_s3/extm4regs/
config_mem3.rs
