1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - Wishbone master address selection"]
5 pub addr: crate::Reg<addr::ADDR_SPEC>,
6 #[doc = "0x04 - I2C slave data register via WishBone master"]
7 pub wdata: crate::Reg<wdata::WDATA_SPEC>,
8 #[doc = "0x08 - Control and status register"]
9 pub csr: crate::Reg<csr::CSR_SPEC>,
10 #[doc = "0x0c - Read data from I2C to Wishbone master is registered"]
11 pub rdata: crate::Reg<rdata::RDATA_SPEC>,
12 _reserved4: [u8; 0x04],
13 #[doc = "0x14 - SRAM test control register 1"]
14 pub sram_test_reg1: crate::Reg<sram_test_reg1::SRAM_TEST_REG1_SPEC>,
15 #[doc = "0x18 - SRAM test control register 2"]
16 pub sram_test_reg2: crate::Reg<sram_test_reg2::SRAM_TEST_REG2_SPEC>,
17 _reserved6: [u8; 0x04],
18 #[doc = "0x20 - Flexible Fusion Engine status and control register"]
19 pub ffe_csr: crate::Reg<ffe_csr::FFE_CSR_SPEC>,
20 _reserved7: [u8; 0x14],
21 #[doc = "0x38 - Combined Flexible Fusion Engine debug signals"]
22 pub ffe_dbg_combined: crate::Reg<ffe_dbg_combined::FFE_DBG_COMBINED_SPEC>,
23 _reserved8: [u8; 0xc4],
24 #[doc = "0x100 - Commands for the Flexible Fusion Engine"]
25 pub cmd: crate::Reg<cmd::CMD_SPEC>,
26 _reserved9: [u8; 0x04],
27 #[doc = "0x108 - Varied interrupt configurations"]
28 pub interrupt: crate::Reg<interrupt::INTERRUPT_SPEC>,
29 #[doc = "0x10c - Control the masking for different Flexible Fusion Engine interrupts"]
30 pub interrupt_en: crate::Reg<interrupt_en::INTERRUPT_EN_SPEC>,
31 #[doc = "0x110 - FFE status register"]
32 pub status: crate::Reg<status::STATUS_SPEC>,
33 #[doc = "0x114 - Mailbox register to the FFE. This register can be set by system software to send a message or configuration information to the FFE as it runs its algorithm, thus affecting the algorithm while it is running. A special instruction may be used in the algorithm to read this mailbox register."]
34 pub mailbox_to_ffe0: crate::Reg<mailbox_to_ffe0::MAILBOX_TO_FFE0_SPEC>,
35 _reserved13: [u8; 0x08],
36 #[doc = "0x120 - SM0/SM1 run time address"]
37 pub sm_runtime_addr: crate::Reg<sm_runtime_addr::SM_RUNTIME_ADDR_SPEC>,
38 #[doc = "0x124 - Used to toggle signal used to signal when a new value has been written."]
39 pub sm0_runtime_addr_ctrl:
40 crate::Reg<sm0_runtime_addr_ctrl::SM0_RUNTIME_ADDR_CTRL_SPEC>,
41 #[doc = "0x128 - Used to toggle signal used to signal when a new value has been written."]
42 pub sm1_runtime_addr_ctrl:
43 crate::Reg<sm1_runtime_addr_ctrl::SM1_RUNTIME_ADDR_CTRL_SPEC>,
44 #[doc = "0x12c - SM current program counter"]
45 pub sm0_runtime_addr_cur:
46 crate::Reg<sm0_runtime_addr_cur::SM0_RUNTIME_ADDR_CUR_SPEC>,
47 #[doc = "0x130 - SM current program counter"]
48 pub sm1_runtime_addr_cur:
49 crate::Reg<sm1_runtime_addr_cur::SM1_RUNTIME_ADDR_CUR_SPEC>,
50 _reserved18: [u8; 0x0c],
51 #[doc = "0x140 - SM Debug selection"]
52 pub sm0_debug_sel: crate::Reg<sm0_debug_sel::SM0_DEBUG_SEL_SPEC>,
53 #[doc = "0x144 - SM Debug selection"]
54 pub sm1_debug_sel: crate::Reg<sm1_debug_sel::SM1_DEBUG_SEL_SPEC>,
55 #[doc = "0x148 - Debug Selection"]
56 pub ffe_debug_sel: crate::Reg<ffe_debug_sel::FFE_DEBUG_SEL_SPEC>,
57 _reserved21: [u8; 0x04],
58 #[doc = "0x150 - Break point control"]
59 pub ffe0_break_point_cfg:
60 crate::Reg<ffe0_break_point_cfg::FFE0_BREAK_POINT_CFG_SPEC>,
61 #[doc = "0x154 - Seems to be another breakpoint control register"]
62 pub ffe0_break_point_cont:
63 crate::Reg<ffe0_break_point_cont::FFE0_BREAK_POINT_CONT_SPEC>,
64 #[doc = "0x158 - FFE break point status register"]
65 pub ffe0_break_point_stat:
66 crate::Reg<ffe0_break_point_stat::FFE0_BREAK_POINT_STAT_SPEC>,
67 _reserved24: [u8; 0x04],
68 #[doc = "0x160 - These registers hold the xPC (program counter) address 'break points'."]
69 pub ffe0_bp_xpc_0: crate::Reg<ffe0_bp_xpc_0::FFE0_BP_XPC_0_SPEC>,
70 #[doc = "0x164 - These registers hold the xPC (program counter) address 'break points'."]
71 pub ffe0_bp_xpc_1: crate::Reg<ffe0_bp_xpc_1::FFE0_BP_XPC_1_SPEC>,
72 #[doc = "0x168 - These registers hold the xPC (program counter) address 'break points'."]
73 pub ffe0_bp_xpc_2: crate::Reg<ffe0_bp_xpc_2::FFE0_BP_XPC_2_SPEC>,
74 #[doc = "0x16c - These registers hold the xPC (program counter) address 'break points'."]
75 pub ffe0_bp_xpc_3: crate::Reg<ffe0_bp_xpc_3::FFE0_BP_XPC_3_SPEC>,
76}
77#[doc = "ADDR register accessor: an alias for `Reg<ADDR_SPEC>`"]
78pub type ADDR = crate::Reg<addr::ADDR_SPEC>;
79#[doc = "Wishbone master address selection"]
80pub mod addr;
81#[doc = "WDATA register accessor: an alias for `Reg<WDATA_SPEC>`"]
82pub type WDATA = crate::Reg<wdata::WDATA_SPEC>;
83#[doc = "I2C slave data register via WishBone master"]
84pub mod wdata;
85#[doc = "CSR register accessor: an alias for `Reg<CSR_SPEC>`"]
86pub type CSR = crate::Reg<csr::CSR_SPEC>;
87#[doc = "Control and status register"]
88pub mod csr;
89#[doc = "RDATA register accessor: an alias for `Reg<RDATA_SPEC>`"]
90pub type RDATA = crate::Reg<rdata::RDATA_SPEC>;
91#[doc = "Read data from I2C to Wishbone master is registered"]
92pub mod rdata;
93#[doc = "SRAM_TEST_REG1 register accessor: an alias for `Reg<SRAM_TEST_REG1_SPEC>`"]
94pub type SRAM_TEST_REG1 = crate::Reg<sram_test_reg1::SRAM_TEST_REG1_SPEC>;
95#[doc = "SRAM test control register 1"]
96pub mod sram_test_reg1;
97#[doc = "SRAM_TEST_REG2 register accessor: an alias for `Reg<SRAM_TEST_REG2_SPEC>`"]
98pub type SRAM_TEST_REG2 = crate::Reg<sram_test_reg2::SRAM_TEST_REG2_SPEC>;
99#[doc = "SRAM test control register 2"]
100pub mod sram_test_reg2;
101#[doc = "FFE_CSR register accessor: an alias for `Reg<FFE_CSR_SPEC>`"]
102pub type FFE_CSR = crate::Reg<ffe_csr::FFE_CSR_SPEC>;
103#[doc = "Flexible Fusion Engine status and control register"]
104pub mod ffe_csr;
105#[doc = "FFE_DBG_COMBINED register accessor: an alias for `Reg<FFE_DBG_COMBINED_SPEC>`"]
106pub type FFE_DBG_COMBINED = crate::Reg<ffe_dbg_combined::FFE_DBG_COMBINED_SPEC>;
107#[doc = "Combined Flexible Fusion Engine debug signals"]
108pub mod ffe_dbg_combined;
109#[doc = "CMD register accessor: an alias for `Reg<CMD_SPEC>`"]
110pub type CMD = crate::Reg<cmd::CMD_SPEC>;
111#[doc = "Commands for the Flexible Fusion Engine"]
112pub mod cmd;
113#[doc = "INTERRUPT register accessor: an alias for `Reg<INTERRUPT_SPEC>`"]
114pub type INTERRUPT = crate::Reg<interrupt::INTERRUPT_SPEC>;
115#[doc = "Varied interrupt configurations"]
116pub mod interrupt;
117#[doc = "INTERRUPT_EN register accessor: an alias for `Reg<INTERRUPT_EN_SPEC>`"]
118pub type INTERRUPT_EN = crate::Reg<interrupt_en::INTERRUPT_EN_SPEC>;
119#[doc = "Control the masking for different Flexible Fusion Engine interrupts"]
120pub mod interrupt_en;
121#[doc = "STATUS register accessor: an alias for `Reg<STATUS_SPEC>`"]
122pub type STATUS = crate::Reg<status::STATUS_SPEC>;
123#[doc = "FFE status register"]
124pub mod status;
125#[doc = "MAILBOX_TO_FFE0 register accessor: an alias for `Reg<MAILBOX_TO_FFE0_SPEC>`"]
126pub type MAILBOX_TO_FFE0 = crate::Reg<mailbox_to_ffe0::MAILBOX_TO_FFE0_SPEC>;
127#[doc = "Mailbox register to the FFE. This register can be set by system software to send a message or configuration information to the FFE as it runs its algorithm, thus affecting the algorithm while it is running. A special instruction may be used in the algorithm to read this mailbox register."]
128pub mod mailbox_to_ffe0;
129#[doc = "SM_RUNTIME_ADDR register accessor: an alias for `Reg<SM_RUNTIME_ADDR_SPEC>`"]
130pub type SM_RUNTIME_ADDR = crate::Reg<sm_runtime_addr::SM_RUNTIME_ADDR_SPEC>;
131#[doc = "SM0/SM1 run time address"]
132pub mod sm_runtime_addr;
133#[doc = "SM0_RUNTIME_ADDR_CTRL register accessor: an alias for `Reg<SM0_RUNTIME_ADDR_CTRL_SPEC>`"]
134pub type SM0_RUNTIME_ADDR_CTRL =
135 crate::Reg<sm0_runtime_addr_ctrl::SM0_RUNTIME_ADDR_CTRL_SPEC>;
136#[doc = "Used to toggle signal used to signal when a new value has been written."]
137pub mod sm0_runtime_addr_ctrl;
138#[doc = "SM1_RUNTIME_ADDR_CTRL register accessor: an alias for `Reg<SM1_RUNTIME_ADDR_CTRL_SPEC>`"]
139pub type SM1_RUNTIME_ADDR_CTRL =
140 crate::Reg<sm1_runtime_addr_ctrl::SM1_RUNTIME_ADDR_CTRL_SPEC>;
141#[doc = "Used to toggle signal used to signal when a new value has been written."]
142pub mod sm1_runtime_addr_ctrl;
143#[doc = "SM0_RUNTIME_ADDR_CUR register accessor: an alias for `Reg<SM0_RUNTIME_ADDR_CUR_SPEC>`"]
144pub type SM0_RUNTIME_ADDR_CUR =
145 crate::Reg<sm0_runtime_addr_cur::SM0_RUNTIME_ADDR_CUR_SPEC>;
146#[doc = "SM current program counter"]
147pub mod sm0_runtime_addr_cur;
148#[doc = "SM1_RUNTIME_ADDR_CUR register accessor: an alias for `Reg<SM1_RUNTIME_ADDR_CUR_SPEC>`"]
149pub type SM1_RUNTIME_ADDR_CUR =
150 crate::Reg<sm1_runtime_addr_cur::SM1_RUNTIME_ADDR_CUR_SPEC>;
151#[doc = "SM current program counter"]
152pub mod sm1_runtime_addr_cur;
153#[doc = "SM0_DEBUG_SEL register accessor: an alias for `Reg<SM0_DEBUG_SEL_SPEC>`"]
154pub type SM0_DEBUG_SEL = crate::Reg<sm0_debug_sel::SM0_DEBUG_SEL_SPEC>;
155#[doc = "SM Debug selection"]
156pub mod sm0_debug_sel;
157#[doc = "SM1_DEBUG_SEL register accessor: an alias for `Reg<SM1_DEBUG_SEL_SPEC>`"]
158pub type SM1_DEBUG_SEL = crate::Reg<sm1_debug_sel::SM1_DEBUG_SEL_SPEC>;
159#[doc = "SM Debug selection"]
160pub mod sm1_debug_sel;
161#[doc = "FFE_DEBUG_SEL register accessor: an alias for `Reg<FFE_DEBUG_SEL_SPEC>`"]
162pub type FFE_DEBUG_SEL = crate::Reg<ffe_debug_sel::FFE_DEBUG_SEL_SPEC>;
163#[doc = "Debug Selection"]
164pub mod ffe_debug_sel;
165#[doc = "FFE0_BREAK_POINT_CFG register accessor: an alias for `Reg<FFE0_BREAK_POINT_CFG_SPEC>`"]
166pub type FFE0_BREAK_POINT_CFG =
167 crate::Reg<ffe0_break_point_cfg::FFE0_BREAK_POINT_CFG_SPEC>;
168#[doc = "Break point control"]
169pub mod ffe0_break_point_cfg;
170#[doc = "FFE0_BREAK_POINT_CONT register accessor: an alias for `Reg<FFE0_BREAK_POINT_CONT_SPEC>`"]
171pub type FFE0_BREAK_POINT_CONT =
172 crate::Reg<ffe0_break_point_cont::FFE0_BREAK_POINT_CONT_SPEC>;
173#[doc = "Seems to be another breakpoint control register"]
174pub mod ffe0_break_point_cont;
175#[doc = "FFE0_BREAK_POINT_STAT register accessor: an alias for `Reg<FFE0_BREAK_POINT_STAT_SPEC>`"]
176pub type FFE0_BREAK_POINT_STAT =
177 crate::Reg<ffe0_break_point_stat::FFE0_BREAK_POINT_STAT_SPEC>;
178#[doc = "FFE break point status register"]
179pub mod ffe0_break_point_stat;
180#[doc = "FFE0_BP_XPC_0 register accessor: an alias for `Reg<FFE0_BP_XPC_0_SPEC>`"]
181pub type FFE0_BP_XPC_0 = crate::Reg<ffe0_bp_xpc_0::FFE0_BP_XPC_0_SPEC>;
182#[doc = "These registers hold the xPC (program counter) address 'break points'."]
183pub mod ffe0_bp_xpc_0;
184#[doc = "FFE0_BP_XPC_1 register accessor: an alias for `Reg<FFE0_BP_XPC_1_SPEC>`"]
185pub type FFE0_BP_XPC_1 = crate::Reg<ffe0_bp_xpc_1::FFE0_BP_XPC_1_SPEC>;
186#[doc = "These registers hold the xPC (program counter) address 'break points'."]
187pub mod ffe0_bp_xpc_1;
188#[doc = "FFE0_BP_XPC_2 register accessor: an alias for `Reg<FFE0_BP_XPC_2_SPEC>`"]
189pub type FFE0_BP_XPC_2 = crate::Reg<ffe0_bp_xpc_2::FFE0_BP_XPC_2_SPEC>;
190#[doc = "These registers hold the xPC (program counter) address 'break points'."]
191pub mod ffe0_bp_xpc_2;
192#[doc = "FFE0_BP_XPC_3 register accessor: an alias for `Reg<FFE0_BP_XPC_3_SPEC>`"]
193pub type FFE0_BP_XPC_3 = crate::Reg<ffe0_bp_xpc_3::FFE0_BP_XPC_3_SPEC>;
194#[doc = "These registers hold the xPC (program counter) address 'break points'."]
195pub mod ffe0_bp_xpc_3;