1#[doc = "Register `OSC_CTRL_0` reader"]
2pub struct R(crate::R<OSC_CTRL_0_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<OSC_CTRL_0_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<OSC_CTRL_0_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<OSC_CTRL_0_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `OSC_CTRL_0` writer"]
17pub struct W(crate::W<OSC_CTRL_0_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<OSC_CTRL_0_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<OSC_CTRL_0_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<OSC_CTRL_0_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "1'b0 : OSC OFF -- 1'b1 : OSC ON , (NO SYNC needed, OSC guarantee there is no Glitch)\n\nValue on reset: 1"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum EN_A {
40 #[doc = "0: Disable the oscillator"]
41 OSCILLATOR_OFF = 0,
42 #[doc = "1: Enable the oscillator"]
43 OSCILLATOR_ON = 1,
44}
45impl From<EN_A> for bool {
46 #[inline(always)]
47 fn from(variant: EN_A) -> Self {
48 variant as u8 != 0
49 }
50}
51#[doc = "Field `en` reader - 1'b0 : OSC OFF -- 1'b1 : OSC ON , (NO SYNC needed, OSC guarantee there is no Glitch)"]
52pub struct EN_R(crate::FieldReader<bool, EN_A>);
53impl EN_R {
54 #[inline(always)]
55 pub(crate) fn new(bits: bool) -> Self {
56 EN_R(crate::FieldReader::new(bits))
57 }
58 #[doc = r"Get enumerated values variant"]
59 #[inline(always)]
60 pub fn variant(&self) -> EN_A {
61 match self.bits {
62 false => EN_A::OSCILLATOR_OFF,
63 true => EN_A::OSCILLATOR_ON,
64 }
65 }
66 #[doc = "Checks if the value of the field is `OSCILLATOR_OFF`"]
67 #[inline(always)]
68 pub fn is_oscillator_off(&self) -> bool {
69 **self == EN_A::OSCILLATOR_OFF
70 }
71 #[doc = "Checks if the value of the field is `OSCILLATOR_ON`"]
72 #[inline(always)]
73 pub fn is_oscillator_on(&self) -> bool {
74 **self == EN_A::OSCILLATOR_ON
75 }
76}
77impl core::ops::Deref for EN_R {
78 type Target = crate::FieldReader<bool, EN_A>;
79 #[inline(always)]
80 fn deref(&self) -> &Self::Target {
81 &self.0
82 }
83}
84#[doc = "Field `en` writer - 1'b0 : OSC OFF -- 1'b1 : OSC ON , (NO SYNC needed, OSC guarantee there is no Glitch)"]
85pub struct EN_W<'a> {
86 w: &'a mut W,
87}
88impl<'a> EN_W<'a> {
89 #[doc = r"Writes `variant` to the field"]
90 #[inline(always)]
91 pub fn variant(self, variant: EN_A) -> &'a mut W {
92 self.bit(variant.into())
93 }
94 #[doc = "Disable the oscillator"]
95 #[inline(always)]
96 pub fn oscillator_off(self) -> &'a mut W {
97 self.variant(EN_A::OSCILLATOR_OFF)
98 }
99 #[doc = "Enable the oscillator"]
100 #[inline(always)]
101 pub fn oscillator_on(self) -> &'a mut W {
102 self.variant(EN_A::OSCILLATOR_ON)
103 }
104 #[doc = r"Sets the field bit"]
105 #[inline(always)]
106 pub fn set_bit(self) -> &'a mut W {
107 self.bit(true)
108 }
109 #[doc = r"Clears the field bit"]
110 #[inline(always)]
111 pub fn clear_bit(self) -> &'a mut W {
112 self.bit(false)
113 }
114 #[doc = r"Writes raw bits to the field"]
115 #[inline(always)]
116 pub fn bit(self, value: bool) -> &'a mut W {
117 self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
118 self.w
119 }
120}
121#[doc = "Reference clock selection\n\nValue on reset: 0"]
122#[derive(Clone, Copy, Debug, PartialEq)]
123pub enum FREF16K_SEL_A {
124 #[doc = "0: Reference clock is 32KHz"]
125 WITH_32K_OSC = 0,
126 #[doc = "1: Reference clock is 16KHz"]
127 WITH_16K_OSC = 1,
128}
129impl From<FREF16K_SEL_A> for bool {
130 #[inline(always)]
131 fn from(variant: FREF16K_SEL_A) -> Self {
132 variant as u8 != 0
133 }
134}
135#[doc = "Field `fref16k_sel` reader - Reference clock selection"]
136pub struct FREF16K_SEL_R(crate::FieldReader<bool, FREF16K_SEL_A>);
137impl FREF16K_SEL_R {
138 #[inline(always)]
139 pub(crate) fn new(bits: bool) -> Self {
140 FREF16K_SEL_R(crate::FieldReader::new(bits))
141 }
142 #[doc = r"Get enumerated values variant"]
143 #[inline(always)]
144 pub fn variant(&self) -> FREF16K_SEL_A {
145 match self.bits {
146 false => FREF16K_SEL_A::WITH_32K_OSC,
147 true => FREF16K_SEL_A::WITH_16K_OSC,
148 }
149 }
150 #[doc = "Checks if the value of the field is `WITH_32K_OSC`"]
151 #[inline(always)]
152 pub fn is_with_32k_osc(&self) -> bool {
153 **self == FREF16K_SEL_A::WITH_32K_OSC
154 }
155 #[doc = "Checks if the value of the field is `WITH_16K_OSC`"]
156 #[inline(always)]
157 pub fn is_with_16k_osc(&self) -> bool {
158 **self == FREF16K_SEL_A::WITH_16K_OSC
159 }
160}
161impl core::ops::Deref for FREF16K_SEL_R {
162 type Target = crate::FieldReader<bool, FREF16K_SEL_A>;
163 #[inline(always)]
164 fn deref(&self) -> &Self::Target {
165 &self.0
166 }
167}
168#[doc = "Field `fref16k_sel` writer - Reference clock selection"]
169pub struct FREF16K_SEL_W<'a> {
170 w: &'a mut W,
171}
172impl<'a> FREF16K_SEL_W<'a> {
173 #[doc = r"Writes `variant` to the field"]
174 #[inline(always)]
175 pub fn variant(self, variant: FREF16K_SEL_A) -> &'a mut W {
176 self.bit(variant.into())
177 }
178 #[doc = "Reference clock is 32KHz"]
179 #[inline(always)]
180 pub fn with_32k_osc(self) -> &'a mut W {
181 self.variant(FREF16K_SEL_A::WITH_32K_OSC)
182 }
183 #[doc = "Reference clock is 16KHz"]
184 #[inline(always)]
185 pub fn with_16k_osc(self) -> &'a mut W {
186 self.variant(FREF16K_SEL_A::WITH_16K_OSC)
187 }
188 #[doc = r"Sets the field bit"]
189 #[inline(always)]
190 pub fn set_bit(self) -> &'a mut W {
191 self.bit(true)
192 }
193 #[doc = r"Clears the field bit"]
194 #[inline(always)]
195 pub fn clear_bit(self) -> &'a mut W {
196 self.bit(false)
197 }
198 #[doc = r"Writes raw bits to the field"]
199 #[inline(always)]
200 pub fn bit(self, value: bool) -> &'a mut W {
201 self.w.bits =
202 (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
203 self.w
204 }
205}
206impl R {
207 #[doc = "Bit 0 - 1'b0 : OSC OFF -- 1'b1 : OSC ON , (NO SYNC needed, OSC guarantee there is no Glitch)"]
208 #[inline(always)]
209 pub fn en(&self) -> EN_R {
210 EN_R::new((self.bits & 0x01) != 0)
211 }
212 #[doc = "Bit 1 - Reference clock selection"]
213 #[inline(always)]
214 pub fn fref16k_sel(&self) -> FREF16K_SEL_R {
215 FREF16K_SEL_R::new(((self.bits >> 1) & 0x01) != 0)
216 }
217}
218impl W {
219 #[doc = "Bit 0 - 1'b0 : OSC OFF -- 1'b1 : OSC ON , (NO SYNC needed, OSC guarantee there is no Glitch)"]
220 #[inline(always)]
221 pub fn en(&mut self) -> EN_W {
222 EN_W { w: self }
223 }
224 #[doc = "Bit 1 - Reference clock selection"]
225 #[inline(always)]
226 pub fn fref16k_sel(&mut self) -> FREF16K_SEL_W {
227 FREF16K_SEL_W { w: self }
228 }
229 #[doc = "Writes raw bits to the register."]
230 #[inline(always)]
231 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
232 self.0.bits(bits);
233 self
234 }
235}
236#[doc = "Oscilator control register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [osc_ctrl_0](index.html) module"]
237pub struct OSC_CTRL_0_SPEC;
238impl crate::RegisterSpec for OSC_CTRL_0_SPEC {
239 type Ux = u32;
240}
241#[doc = "`read()` method returns [osc_ctrl_0::R](R) reader structure"]
242impl crate::Readable for OSC_CTRL_0_SPEC {
243 type Reader = R;
244}
245#[doc = "`write(|w| ..)` method takes [osc_ctrl_0::W](W) writer structure"]
246impl crate::Writable for OSC_CTRL_0_SPEC {
247 type Writer = W;
248}
249#[doc = "`reset()` method sets OSC_CTRL_0 to value 0x01"]
250impl crate::Resettable for OSC_CTRL_0_SPEC {
251 #[inline(always)]
252 fn reset_value() -> Self::Ux {
253 0x01
254 }
255}