Expand description
Peripheral access API for EOS-S3 microcontrollers (generated using svd2rust v0.20.0 ( ))
You can find an overview of the generated API here.
API features to be included in the next
svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.
Modules§
- a1_regs
- Selects source APB Master to SPI Master between M4/AP and Fabric
- adc
- Analog-to-Digital Converter
- aip
- Analog IP block
- aud
- Audio Subsystem
- cfg_ctl
- PIF Register (FPGA Programming interface)
- cru
- Clock Reset Unit
- dma
- Direct Memory Access peripheral
- ext_
regs_ ffe - Flexible Fusion Engine registers
- extm4regs
- External registers to control M4 Subsystem (not a core peripheral)
- generic
- Common register and bit access and modify traits
- i2s_
slave - I2S Slave
- intr_
ctrl - Interrupt Controller
- iomux
- IO Multiplexing Control
- misc
- MISC registers
- pkfb
- Packet FFO Bank control
- pmu
- Power Management Unit
- sdma
- System Direct Access Memory
- sdma_
bridge - System Direct Memory Access Bridge
- sdma_
sram - System DMA SRAM
- spi
- SPI peripheral control
- spi_tlc
- Communication Manager - Top Level controller
- spt
- Simple Periodic Timer
- timer
- Timer peripheral
- uart
- Universal Asynchronous Receiver Transmitter
- wdt
- WatchDog Timer
Structs§
- A1_REGS
- Selects source APB Master to SPI Master between M4/AP and Fabric
- ADC
- Analog-to-Digital Converter
- AIP
- Analog IP block
- AUD
- Audio Subsystem
- CBP
- Cache and branch predictor maintenance operations
- CFG_CTL
- PIF Register (FPGA Programming interface)
- CPUID
- CPUID
- CRU
- Clock Reset Unit
- Core
Peripherals - Core peripherals
- DCB
- Debug Control Block
- DMA
- Direct Memory Access peripheral
- DWT
- Data Watchpoint and Trace unit
- EXTM4REGS
- External registers to control M4 Subsystem (not a core peripheral)
- EXTREGSFFE
- Flexible Fusion Engine registers
- FPB
- Flash Patch and Breakpoint unit
- FPU
- Floating Point Unit
- I2S_
SLAVE - I2S Slave
- INTR_
CTRL - Interrupt Controller
- IOMUX
- IO Multiplexing Control
- ITM
- Instrumentation Trace Macrocell
- MISC
- MISC registers
- MPU
- Memory Protection Unit
- NVIC
- Nested Vector Interrupt Controller
- PKFB
- Packet FFO Bank control
- PMU
- Power Management Unit
- Peripherals
- All the peripherals
- SCB
- System Control Block
- SDMA
- System Direct Access Memory
- SDMA_
BRIDGE - System Direct Memory Access Bridge
- SDMA_
SRAM - System DMA SRAM
- SPI
- SPI peripheral control
- SPI_TLC
- Communication Manager - Top Level controller
- SPT
- Simple Periodic Timer
- SYST
- SysTick: System Timer
- TIMER
- Timer peripheral
- TPIU
- Trace Port Interface Unit
- UART
- Universal Asynchronous Receiver Transmitter
- WDT
- WatchDog Timer
Enums§
- Interrupt
- Enumeration of all the interrupts.
Constants§
- NVIC_
PRIO_ BITS - Number available in the NVIC for configuring priority