endbasic_std/
spi.rs

1// EndBASIC
2// Copyright 2025 Julio Merino
3//
4// Licensed under the Apache License, Version 2.0 (the "License"); you may not
5// use this file except in compliance with the License.  You may obtain a copy
6// of the License at:
7//
8//     http://www.apache.org/licenses/LICENSE-2.0
9//
10// Unless required by applicable law or agreed to in writing, software
11// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
12// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
13// License for the specific language governing permissions and limitations
14// under the License.
15
16//! SPI bus abstractions for EndBASIC.
17
18use std::io::Write;
19
20/// Defines the SPI clock polarity and phase.
21#[derive(Debug, PartialEq)]
22pub enum SpiMode {
23    /// CPOL 0, CPHA 0
24    Mode0 = 0,
25    /// CPOL 0, CPHA 1
26    Mode1 = 1,
27    /// CPOL 1, CPHA 0
28    Mode2 = 2,
29    /// CPOL 1, CPHA 1
30    Mode3 = 3,
31}
32
33/// A trait abstracting access to an SPI bus.
34pub trait SpiBus: Write {
35    /// Returns the maximum transfer size for the bus.
36    fn max_size(&self) -> usize;
37}
endbasic_std/spi.rs

endbasic_std/
spi.rs
