Trait embedded_nrf24l01::Device [] [src]

pub trait Device {
    type Error;
    fn ce_enable(&mut self);
fn ce_disable(&mut self);
fn send_command<C: Command>(
        &mut self,
        command: &C
    ) -> Result<(Status, C::Response), Self::Error>;
fn write_register<R: Register>(
        &mut self,
        register: R
    ) -> Result<Status, Self::Error>;
fn read_register<R: Register>(&mut self) -> Result<(Status, R), Self::Error>;
fn update_config<F, R>(&mut self, f: F) -> Result<R, Self::Error>
    where
        F: FnOnce(&mut Config) -> R
; fn with_ce_disabled<F, R>(&mut self, f: F) -> R
    where
        F: FnOnce(&mut Self) -> R
, { ... }
fn update_register<Reg, F, R>(&mut self, f: F) -> Result<R, Self::Error>
    where
        Reg: Register + PartialEq + Clone,
        F: FnOnce(&mut Reg) -> R
, { ... } }

Trait that hides all the GPIO/SPI type parameters for use by the operation modes

Associated Types

Error from the SPI implementation

Required Methods

Set CE pin high

Set CE pin low

Send a command via SPI

Send W_REGISTER command

Send R_REGISTER command

Modify the (cached) CONFIG register and write if it has changed.

Provided Methods

Helper; the receiving during RX and sending during TX require CE to be low.

Read, and modify a register, and write it back if it has been changed.

Implementors