Module embedded_hal_async::spi
source · Expand description
SPI master mode traits.
Structs
SpiDevice
implementation with exclusive access to the bus (not shared).- SPI mode
Enums
- SPI error kind
- Error type for
ExclusiveDevice
operations. - SPI transaction operation.
- Clock phase
- Clock polarity
Constants
- Helper for CPOL = 0, CPHA = 0
- Helper for CPOL = 0, CPHA = 1
- Helper for CPOL = 1, CPHA = 0
- Helper for CPOL = 1, CPHA = 1
Traits
- SPI error
- SPI error type trait
- Read-write SPI bus
- Flush support for SPI bus
- Read-only SPI bus
- Write-only SPI
- SPI device trait
- SPI read-only device trait
- SPI write-only device trait