embedded_c_sdk_bind_hal/
ll_api.rs

1//GPIO
2#[derive(Clone, Copy, PartialEq, Eq, Debug)]
3#[repr(u8)]
4pub enum PortNum {
5    PA = 0,
6    PB = 1,
7    PC = 2,
8    PD = 3,
9    PE = 4,
10    PF = 5,
11    PG = 6,
12    PH = 7,
13}
14
15#[derive(Clone, Copy, PartialEq, Eq, Debug)]
16#[repr(u8)]
17pub enum PinNum {
18    Pin0 = 0,
19    Pin1 = 1,
20    Pin2 = 2,
21    Pin3 = 3,
22    Pin4 = 4,
23    Pin5 = 5,
24    Pin6 = 6,
25    Pin7 = 7,
26    Pin8 = 8,
27    Pin9 = 9,
28    Pin10 = 10,
29    Pin11 = 11,
30    Pin12 = 12,
31    Pin13 = 13,
32    Pin14 = 14,
33    Pin15 = 15,
34}
35
36#[derive(Clone, Copy, PartialEq, Eq, Debug)]
37pub(crate) enum GpioInitParam {
38    InFloating, //0x00, Input Floating
39    InPU,       //0x01, Input Pull-Up
40    InPD,       //0x02, Input Pull-Down
41    OutPP,      //0x03, Output Push-Pull
42    OutOD,      //0x04, Output Open-Drain
43    Analog,     //0x05, Analog Input
44    AFOD,       //0x40, Alternate Function Open-Drain
45    AFPP,       //0x41, Alternate Function Push-Pull
46    AFIN,       //0x42, Alternate Function Input
47    AF(u8),     //0x80+   Alternate Function
48}
49
50impl GpioInitParam {
51    pub(crate) const fn param(self) -> u32 {
52        match self {
53            GpioInitParam::InFloating => 0x00,
54            GpioInitParam::InPU => 0x01,
55            GpioInitParam::InPD => 0x02,
56            GpioInitParam::OutPP => 0x03,
57            GpioInitParam::OutOD => 0x04,
58            GpioInitParam::Analog => 0x05,
59            GpioInitParam::AFOD => 0x40,
60            GpioInitParam::AFPP => 0x41,
61            GpioInitParam::AFIN => 0x42,
62            GpioInitParam::AF(idx) => (0x80 | idx) as u32,
63        }
64    }
65}
66
67#[derive(Clone, Copy, PartialEq, Eq, Debug)]
68#[repr(u32)]
69pub(crate) enum GpioExtiFlag {
70    Rising = 1,
71    Falling = 2,
72    RisingFalling = 3,
73    Enable = 4,
74    Disable = 5,
75}
76
77//SPI BUS
78#[derive(Clone, Copy, PartialEq, Eq, Debug)]
79#[repr(u8)]
80pub enum SpiBusId {
81    Bus0 = 0,
82    Bus1 = 1,
83    Bus2 = 2,
84    Bus3 = 3,
85}
86
87#[derive(Clone, Copy, PartialEq, Eq, Debug)]
88#[repr(u8)]
89pub enum SpiBusDataSize {
90    DataSize8 = 0,  // Data size is 8 bits
91    DataSize16 = 1, // Data size is 16 bits
92}
93
94#[derive(Clone, Copy, PartialEq, Eq, Debug)]
95#[repr(u8)]
96pub enum SpiBusBitOrder {
97    MsbFirst = 0, // Most Significant Bit first
98    LsbFirst = 2, // Least Significant Bit first
99}
100
101#[derive(Clone, Copy, PartialEq, Eq, Debug)]
102#[repr(u8)]
103pub enum SpiBusMode {
104    Mode0 = 0,
105    Mode1 = 1,
106    Mode2 = 2,
107    Mode3 = 3,
108}
109
110//USART
111#[derive(Clone, Copy, PartialEq, Eq, Debug)]
112#[repr(u8)]
113pub enum UsartId {
114    USART0,
115    USART1,
116    USART2,
117    USART3,
118    USART4,
119    USART5,
120    USART6,
121    USART7,
122}
123
124#[derive(Clone, Copy, PartialEq, Eq, Debug)]
125#[repr(u32)]
126/// Number of data bits
127pub enum UsartDataBits {
128    /// 8 Data Bits
129    DataBits8 = 0,
130    /// 9 Data Bits
131    DataBits9 = 256,
132}
133
134#[derive(Clone, Copy, PartialEq, Eq, Debug)]
135#[repr(u32)]
136/// Parity
137pub enum UsartParity {
138    /// No parity
139    ParityNone = 0,
140    /// Even Parity
141    ParityEven = 4,
142    /// Odd Parity
143    ParityOdd = 8,
144}
145
146#[derive(Clone, Copy, PartialEq, Eq, Debug)]
147#[repr(u32)]
148/// Number of stop bits
149pub enum UsartStopBits {
150    STOP0P5 = 0,
151    STOP1 = 1,
152    STOP1P5 = 2,
153    STOP2 = 3,
154}
155
156#[derive(Clone, Copy, PartialEq, Eq, Debug)]
157#[repr(u32)]
158pub enum UsartMode {
159    ///Loop back
160    LoopBack = 0,
161    ///Read only
162    RxOnly = 16,
163    ///Write only
164    TxOnly = 32,
165    ///Read/Write
166    TxRx = 16 + 32,
167}
168
169#[derive(Clone, Copy, PartialEq, Eq, Debug)]
170#[repr(u32)]
171pub enum UsartHwFlowCtrl {
172    None = 0,
173    Cts = 128,
174    Rts = 64,
175    CtsRts = 192,
176}
177
178//PWM
179#[derive(Clone, Copy, PartialEq, Eq, Debug)]
180#[repr(u8)]
181pub enum PwmChannel {
182    CH0,
183    CH1,
184    CH2,
185    CH3,
186    CH4,
187    CH5,
188    CH6,
189    CH7,
190}
191
192#[derive(Clone, Copy, Debug, PartialEq, Eq)]
193#[repr(u32)]
194pub enum PwmCtrl {
195    On = 0,
196    Off = 1,
197    SetDuty = 2,
198    GetDuty = 3,
199    GetMaxDuty = 4,
200    SetPeriod = 5,
201    GetPeriod = 6,
202}
203
204#[derive(Clone, Copy, Debug, PartialEq, Eq)]
205#[repr(u32)]
206pub enum PwmPolarity {
207    ActiveHigh = 10,
208    ActiveLow = 11,
209}
210
211//ADC
212#[derive(Clone, Copy, PartialEq, Eq, Debug)]
213#[repr(u8)]
214pub enum AdcChannel {
215    CH0,
216    CH1,
217    CH2,
218    CH3,
219    CH4,
220    CH5,
221    CH6,
222    CH7,
223}
224#[derive(Clone, Copy, Debug, PartialEq, Eq)]
225#[repr(u32)]
226pub enum AdcCtrl {
227    Start = 0,
228    Stop = 1,
229    Convert = 2,
230}
231
232//I2C BUS
233#[derive(Clone, Copy, PartialEq, Eq, Debug)]
234#[repr(u8)]
235pub enum I2CBusId {
236    Bus0 = 0,
237    Bus1 = 1,
238    Bus2 = 2,
239    Bus3 = 3,
240}
241
242#[derive(Clone, Copy, PartialEq, Eq, Debug)]
243#[repr(u8)]
244pub enum I2CBusAddrBits {
245    SevenBitAddr = 0,
246    TenBitAddr = 1,
247}
248
249//DMA
250#[derive(Clone, Copy, PartialEq, Eq, Debug)]
251#[repr(u8)]
252pub enum DmaChannel {
253    CH0,
254    CH1,
255    CH2,
256    CH3,
257    CH4,
258    CH5,
259    CH6,
260    CH7,
261}
262
263#[derive(Clone, Copy, Debug, PartialEq, Eq)]
264#[repr(u32)]
265pub(crate) enum DmaCtrl {
266    Start = 0,
267    Stop = 1,
268    Wait = 2,
269}
270
271#[derive(Clone, Copy, Debug, PartialEq, Eq)]
272#[repr(u32)]
273pub(crate) enum DmaFlags {
274    None = 0,
275
276    SrcByte = 1 << 0,
277    SrcHalfWord = 2 << 0,
278    SrcWord = 3 << 0,
279
280    DstByte = 1 << 2,
281    DstHalfWord = 2 << 2,
282    DstWord = 3 << 2,
283
284    MemToMem = 1 << 4,
285    PeriphToMem = 2 << 4,
286    MemToPeriph = 3 << 4,
287
288    //NoneInc = 0 << 6,
289    SrcInc = 1 << 6,
290    DstInc = 2 << 6,
291    BothInc = 3 << 6,
292
293    //CircularOff = 0 << 8,
294    CircularOn = 1 << 8,
295}
296
297pub mod ll_cmd {
298    //INVOKE
299    pub type InvokeParam = ::core::ffi::c_uint;
300    pub const INVOKE_ID_SYSTEM_INIT: InvokeParam = 100;
301    pub const INVOKE_ID_SYSTEM_RESET: InvokeParam = 101;
302    pub const INVOKE_ID_LL_DRV_INIT: InvokeParam = 200;
303    pub const INVOKE_ID_DELAY_NANO: InvokeParam = 201;
304    pub const INVOKE_ID_LOG_PUTS: InvokeParam = 202;
305    pub const INVOKE_ID_LOG_PRINT: InvokeParam = 203;
306    pub const INVOKE_ID_GPIO_INIT: InvokeParam = 300;
307    pub const INVOKE_ID_GPIO_SET: InvokeParam = 301;
308    pub const INVOKE_ID_GPIO_GET_INPUT: InvokeParam = 302;
309    pub const INVOKE_ID_GPIO_GET_OUTPUT: InvokeParam = 303;
310    pub const INVOKE_ID_GPIO_GET_PORT_REG: InvokeParam = 304;
311    pub const INVOKE_ID_GPIO_EXTI: InvokeParam = 305;
312    pub const INVOKE_ID_GPIO_CUSTOM_BASE: InvokeParam = 350;
313    pub const INVOKE_ID_SPI_INIT: InvokeParam = 400;
314    pub const INVOKE_ID_SPI_DEINIT: InvokeParam = 401;
315    pub const INVOKE_ID_SPI_BLOCKING_RW: InvokeParam = 402;
316    pub const INVOKE_ID_SPI_CUSTOM_BASE: InvokeParam = 450;
317    pub const INVOKE_ID_USART_INIT: InvokeParam = 500;
318    pub const INVOKE_ID_USART_DEINIT: InvokeParam = 501;
319    pub const INVOKE_ID_USART_WRITE: InvokeParam = 502;
320    pub const INVOKE_ID_USART_CUSTOM_BASE: InvokeParam = 550;
321    pub const INVOKE_ID_PWM_INIT: InvokeParam = 600;
322    pub const INVOKE_ID_PWM_DEINIT: InvokeParam = 601;
323    pub const INVOKE_ID_PWM_CTRL: InvokeParam = 602;
324    pub const INVOKE_ID_PWM_CUSTOM_BASE: InvokeParam = 650;
325    pub const INVOKE_ID_ADC_INIT: InvokeParam = 700;
326    pub const INVOKE_ID_ADC_DEINIT: InvokeParam = 701;
327    pub const INVOKE_ID_ADC_CTRL: InvokeParam = 702;
328    pub const INVOKE_ID_ADC_CUSTOM_BASE: InvokeParam = 750;
329    pub const INVOKE_ID_I2C_INIT: InvokeParam = 800;
330    pub const INVOKE_ID_I2C_DEINIT: InvokeParam = 801;
331    pub const INVOKE_ID_I2C_READ: InvokeParam = 802;
332    pub const INVOKE_ID_I2C_WRITE: InvokeParam = 803;
333    pub const INVOKE_ID_I2C_WRITE_READ: InvokeParam = 804;
334    pub const INVOKE_ID_I2C_CUSTOM_BASE: InvokeParam = 850;
335    pub const INVOKE_ID_DMA_INIT: InvokeParam = 900;
336    pub const INVOKE_ID_DMA_DEINIT: InvokeParam = 901;
337    pub const INVOKE_ID_DMA_CTRL: InvokeParam = 902;
338
339    //For user custom
340    pub const INVOKE_ID_DEV_CUSTOM_BASE: InvokeParam = 10_000;
341
342    extern "C" {
343        pub fn ll_invoke(invoke_id: InvokeParam, ...) -> ::core::ffi::c_int;
344    }
345}
embedded_c_sdk_bind_hal/ll_api.rs

embedded_c_sdk_bind_hal/
ll_api.rs
