1#[derive(Clone, Copy, PartialEq, Eq, Debug)]
3#[repr(u8)]
4pub enum PortNum {
5 PA = 0,
6 PB = 1,
7 PC = 2,
8 PD = 3,
9 PE = 4,
10 PF = 5,
11 PG = 6,
12 PH = 7,
13}
14
15#[derive(Clone, Copy, PartialEq, Eq, Debug)]
16#[repr(u8)]
17pub enum PinNum {
18 Pin0 = 0,
19 Pin1 = 1,
20 Pin2 = 2,
21 Pin3 = 3,
22 Pin4 = 4,
23 Pin5 = 5,
24 Pin6 = 6,
25 Pin7 = 7,
26 Pin8 = 8,
27 Pin9 = 9,
28 Pin10 = 10,
29 Pin11 = 11,
30 Pin12 = 12,
31 Pin13 = 13,
32 Pin14 = 14,
33 Pin15 = 15,
34}
35
36#[derive(Clone, Copy, PartialEq, Eq, Debug)]
37#[repr(u32)]
38pub(crate) enum GpioInitFlag {
39 Analog = 0, OutPP = 1, OutOD = 2, InFloating = 4, InPU = 8, InPD = 12, AF0 = 16, AF1 = 32, AF2 = 48, AF3 = 64, AF4 = 80, AF5 = 96, AF6 = 112, AF7 = 128, AFOD = 144, AFPP = 160, }
56
57#[derive(Clone, Copy, PartialEq, Eq, Debug)]
58#[repr(u32)]
59pub(crate) enum GpioExtiFlag {
60 Rising = 1,
61 Falling = 2,
62 RisingFalling = 3,
63 Enable = 4,
64 Disable = 5,
65}
66
67#[derive(Clone, Copy, PartialEq, Eq, Debug)]
69#[repr(u8)]
70pub enum SpiBusId {
71 Bus0 = 0,
72 Bus1 = 1,
73 Bus2 = 2,
74 Bus3 = 3,
75}
76
77#[derive(Clone, Copy, PartialEq, Eq, Debug)]
78#[repr(u8)]
79pub enum SpiBusDataSize {
80 DataSize8 = 0, DataSize16 = 1, }
83
84#[derive(Clone, Copy, PartialEq, Eq, Debug)]
85#[repr(u8)]
86pub enum SpiBusBitOrder {
87 MsbFirst = 0, LsbFirst = 2, }
90
91#[derive(Clone, Copy, PartialEq, Eq, Debug)]
92#[repr(u8)]
93pub enum SpiBusMode {
94 Mode0 = 0,
95 Mode1 = 1,
96 Mode2 = 2,
97 Mode3 = 3,
98}
99
100#[derive(Clone, Copy, PartialEq, Eq, Debug)]
102#[repr(u8)]
103pub enum UsartId {
104 USART0,
105 USART1,
106 USART2,
107 USART3,
108 USART4,
109 USART5,
110 USART6,
111 USART7,
112}
113
114#[derive(Clone, Copy, PartialEq, Eq, Debug)]
115#[repr(u32)]
116pub enum UsartDataBits {
118 DataBits8 = 0,
120 DataBits9 = 256,
122}
123
124#[derive(Clone, Copy, PartialEq, Eq, Debug)]
125#[repr(u32)]
126pub enum UsartParity {
128 ParityNone = 0,
130 ParityEven = 4,
132 ParityOdd = 8,
134}
135
136#[derive(Clone, Copy, PartialEq, Eq, Debug)]
137#[repr(u32)]
138pub enum UsartStopBits {
140 STOP0P5 = 0,
141 STOP1 = 1,
142 STOP1P5 = 2,
143 STOP2 = 3,
144}
145
146#[derive(Clone, Copy, PartialEq, Eq, Debug)]
147#[repr(u32)]
148pub enum UsartMode {
149 LoopBack = 0,
151 RxOnly = 16,
153 TxOnly = 32,
155 TxRx = 16 + 32,
157}
158
159#[derive(Clone, Copy, PartialEq, Eq, Debug)]
160#[repr(u32)]
161pub enum UsartHwFlowCtrl {
162 None = 0,
163 Cts = 128,
164 Rts = 64,
165 CtsRts = 192,
166}
167
168#[derive(Clone, Copy, PartialEq, Eq, Debug)]
170#[repr(u8)]
171pub enum PwmChannel {
172 CH0,
173 CH1,
174 CH2,
175 CH3,
176 CH4,
177 CH5,
178 CH6,
179 CH7,
180}
181
182#[derive(Clone, Copy, Debug, PartialEq, Eq)]
183#[repr(u32)]
184pub enum PwmCtrl {
185 On = 0,
186 Off = 1,
187 SetDuty = 2,
188 GetDuty = 3,
189 GetMaxDuty = 4,
190 SetPeriod = 5,
191 GetPeriod = 6,
192}
193
194#[derive(Clone, Copy, Debug, PartialEq, Eq)]
195#[repr(u32)]
196pub enum PwmPolarity {
197 ActiveHigh = 10,
198 ActiveLow = 11,
199}
200
201#[derive(Clone, Copy, PartialEq, Eq, Debug)]
203#[repr(u8)]
204pub enum AdcChannel {
205 CH0,
206 CH1,
207 CH2,
208 CH3,
209 CH4,
210 CH5,
211 CH6,
212 CH7,
213}
214#[derive(Clone, Copy, Debug, PartialEq, Eq)]
215#[repr(u32)]
216pub enum AdcCtrl {
217 Start = 0,
218 Stop = 1,
219 Convert = 2,
220}
221
222#[derive(Clone, Copy, PartialEq, Eq, Debug)]
224#[repr(u8)]
225pub enum I2CBusId {
226 Bus0 = 0,
227 Bus1 = 1,
228 Bus2 = 2,
229 Bus3 = 3,
230}
231
232#[derive(Clone, Copy, PartialEq, Eq, Debug)]
233#[repr(u8)]
234pub enum I2CBusAddrBits {
235 SevenBitAddr = 0,
236 TenBitAddr = 1,
237}
238
239#[derive(Clone, Copy, PartialEq, Eq, Debug)]
241#[repr(u8)]
242pub enum DmaChannel {
243 CH0,
244 CH1,
245 CH2,
246 CH3,
247 CH4,
248 CH5,
249 CH6,
250 CH7,
251}
252
253#[derive(Clone, Copy, Debug, PartialEq, Eq)]
254#[repr(u32)]
255pub(crate) enum DmaCtrl {
256 Start = 0,
257 Stop = 1,
258 Wait = 2,
259}
260
261#[derive(Clone, Copy, Debug, PartialEq, Eq)]
262#[repr(u32)]
263pub(crate) enum DmaFlags {
264 None = 0,
265
266 SrcByte = 1 << 0,
267 SrcHalfWord = 2 << 0,
268 SrcWord = 3 << 0,
269
270 DstByte = 1 << 2,
271 DstHalfWord = 2 << 2,
272 DstWord = 3 << 2,
273
274 MemToMem = 1 << 4,
275 PeriphToMem = 2 << 4,
276 MemToPeriph = 3 << 4,
277
278 SrcInc = 1 << 6,
280 DstInc = 2 << 6,
281 BothInc = 3 << 6,
282
283 CircularOn = 1 << 8,
285}
286
287pub mod ll_cmd {
288 pub type InvokeParam = ::core::ffi::c_uint;
290 pub const INVOKE_ID_SYSTEM_INIT: InvokeParam = 100;
291 pub const INVOKE_ID_SYSTEM_RESET: InvokeParam = 101;
292 pub const INVOKE_ID_LL_DRV_INIT: InvokeParam = 200;
293 pub const INVOKE_ID_DELAY_NANO: InvokeParam = 201;
294 pub const INVOKE_ID_LOG_PUTS: InvokeParam = 202;
295 pub const INVOKE_ID_LOG_PRINT: InvokeParam = 203;
296 pub const INVOKE_ID_GPIO_INIT: InvokeParam = 300;
297 pub const INVOKE_ID_GPIO_SET: InvokeParam = 301;
298 pub const INVOKE_ID_GPIO_GET_INPUT: InvokeParam = 302;
299 pub const INVOKE_ID_GPIO_GET_OUTPUT: InvokeParam = 303;
300 pub const INVOKE_ID_GPIO_GET_PORT_REG: InvokeParam = 304;
301 pub const INVOKE_ID_GPIO_EXTI: InvokeParam = 305;
302 pub const INVOKE_ID_GPIO_CUSTOM_BASE: InvokeParam = 350;
303 pub const INVOKE_ID_SPI_INIT: InvokeParam = 400;
304 pub const INVOKE_ID_SPI_DEINIT: InvokeParam = 401;
305 pub const INVOKE_ID_SPI_BLOCKING_RW: InvokeParam = 402;
306 pub const INVOKE_ID_SPI_CUSTOM_BASE: InvokeParam = 450;
307 pub const INVOKE_ID_USART_INIT: InvokeParam = 500;
308 pub const INVOKE_ID_USART_DEINIT: InvokeParam = 501;
309 pub const INVOKE_ID_USART_WRITE: InvokeParam = 502;
310 pub const INVOKE_ID_USART_CUSTOM_BASE: InvokeParam = 550;
311 pub const INVOKE_ID_PWM_INIT: InvokeParam = 600;
312 pub const INVOKE_ID_PWM_DEINIT: InvokeParam = 601;
313 pub const INVOKE_ID_PWM_CTRL: InvokeParam = 602;
314 pub const INVOKE_ID_PWM_CUSTOM_BASE: InvokeParam = 650;
315 pub const INVOKE_ID_ADC_INIT: InvokeParam = 700;
316 pub const INVOKE_ID_ADC_DEINIT: InvokeParam = 701;
317 pub const INVOKE_ID_ADC_CTRL: InvokeParam = 702;
318 pub const INVOKE_ID_ADC_CUSTOM_BASE: InvokeParam = 750;
319 pub const INVOKE_ID_I2C_INIT: InvokeParam = 800;
320 pub const INVOKE_ID_I2C_DEINIT: InvokeParam = 801;
321 pub const INVOKE_ID_I2C_READ: InvokeParam = 802;
322 pub const INVOKE_ID_I2C_WRITE: InvokeParam = 803;
323 pub const INVOKE_ID_I2C_WRITE_READ: InvokeParam = 804;
324 pub const INVOKE_ID_I2C_CUSTOM_BASE: InvokeParam = 850;
325 pub const INVOKE_ID_DMA_INIT: InvokeParam = 900;
326 pub const INVOKE_ID_DMA_DEINIT: InvokeParam = 901;
327 pub const INVOKE_ID_DMA_CTRL: InvokeParam = 902;
328
329 pub const INVOKE_ID_DEV_CUSTOM_BASE: InvokeParam = 10_000;
331
332 extern "C" {
333 pub fn ll_invoke(invoke_id: InvokeParam, ...) -> ::core::ffi::c_int;
334 }
335}