embassy_stm32/lptim/timer/
mod.rs

1//! Low-level timer driver.
2mod prescaler;
3
4use embassy_hal_internal::Peri;
5
6#[cfg(any(lptim_v2a, lptim_v2b))]
7use super::channel::Channel;
8#[cfg(any(lptim_v2a, lptim_v2b))]
9mod channel_direction;
10#[cfg(any(lptim_v2a, lptim_v2b))]
11pub use channel_direction::ChannelDirection;
12use prescaler::Prescaler;
13
14use super::Instance;
15use crate::rcc;
16use crate::time::Hertz;
17
18/// Low-level timer driver.
19pub struct Timer<'d, T: Instance> {
20    _tim: Peri<'d, T>,
21}
22
23impl<'d, T: Instance> Timer<'d, T> {
24    /// Create a new timer driver.
25    pub fn new(tim: Peri<'d, T>) -> Self {
26        rcc::enable_and_reset::<T>();
27
28        Self { _tim: tim }
29    }
30
31    /// Enable the timer.
32    pub fn enable(&self) {
33        T::regs().cr().modify(|w| w.set_enable(true));
34    }
35
36    /// Disable the timer.
37    pub fn disable(&self) {
38        T::regs().cr().modify(|w| w.set_enable(false));
39    }
40
41    /// Start the timer in single pulse mode.
42    pub fn single_mode_start(&self) {
43        T::regs().cr().modify(|w| w.set_sngstrt(true));
44    }
45
46    /// Start the timer in continuous mode.
47    pub fn continuous_mode_start(&self) {
48        T::regs().cr().modify(|w| w.set_cntstrt(true));
49    }
50
51    /// Set the frequency of how many times per second the timer counts up to the max value or down to 0.
52    pub fn set_frequency(&self, frequency: Hertz) {
53        let f = frequency.0;
54        assert!(f > 0);
55
56        let pclk_f = T::frequency().0;
57
58        let pclk_ticks_per_timer_period = pclk_f / f;
59
60        let psc = Prescaler::from_ticks(pclk_ticks_per_timer_period);
61        let arr = psc.scale_down(pclk_ticks_per_timer_period);
62
63        T::regs().cfgr().modify(|r| r.set_presc((&psc).into()));
64        T::regs().arr().modify(|r| r.set_arr(arr.into()));
65    }
66
67    /// Get the timer frequency.
68    pub fn get_frequency(&self) -> Hertz {
69        let pclk_f = T::frequency();
70        let arr = T::regs().arr().read().arr();
71        let psc = Prescaler::from(T::regs().cfgr().read().presc());
72
73        pclk_f / psc.scale_up(arr)
74    }
75
76    /// Get the clock frequency of the timer (before prescaler is applied).
77    pub fn get_clock_frequency(&self) -> Hertz {
78        T::frequency()
79    }
80
81    /// Get max compare value. This depends on the timer frequency and the clock frequency from RCC.
82    pub fn get_max_compare_value(&self) -> u16 {
83        T::regs().arr().read().arr()
84    }
85}
86
87#[cfg(any(lptim_v2a, lptim_v2b))]
88impl<'d, T: Instance> Timer<'d, T> {
89    /// Enable/disable a channel.
90    pub fn enable_channel(&self, channel: Channel, enable: bool) {
91        T::regs().ccmr(0).modify(|w| {
92            w.set_cce(channel.index(), enable);
93        });
94    }
95
96    /// Get enable/disable state of a channel
97    pub fn get_channel_enable_state(&self, channel: Channel) -> bool {
98        T::regs().ccmr(0).read().cce(channel.index())
99    }
100
101    /// Set compare value for a channel.
102    pub fn set_compare_value(&self, channel: Channel, value: u16) {
103        T::regs().ccr(channel.index()).modify(|w| w.set_ccr(value));
104    }
105
106    /// Get compare value for a channel.
107    pub fn get_compare_value(&self, channel: Channel) -> u16 {
108        T::regs().ccr(channel.index()).read().ccr()
109    }
110
111    /// Set channel direction.
112    #[cfg(any(lptim_v2a, lptim_v2b))]
113    pub fn set_channel_direction(&self, channel: Channel, direction: ChannelDirection) {
114        T::regs()
115            .ccmr(0)
116            .modify(|w| w.set_ccsel(channel.index(), direction.into()));
117    }
118
119    /// Enable the timer interrupt.
120    pub fn enable_interrupt(&self) {
121        T::regs().dier().modify(|w| w.set_arrmie(true));
122    }
123
124    /// Disable the timer interrupt.
125    pub fn disable_interrupt(&self) {
126        T::regs().dier().modify(|w| w.set_arrmie(false));
127    }
128
129    /// Check if the timer interrupt is enabled.
130    pub fn is_interrupt_enabled(&self) -> bool {
131        T::regs().dier().read().arrmie()
132    }
133
134    /// Check if the timer interrupt is pending.
135    pub fn is_interrupt_pending(&self) -> bool {
136        T::regs().isr().read().arrm()
137    }
138
139    /// Clear the timer interrupt.
140    pub fn clear_interrupt(&self) {
141        T::regs().icr().write(|w| w.set_arrmcf(true));
142    }
143}
144
145#[cfg(not(any(lptim_v2a, lptim_v2b)))]
146impl<'d, T: Instance> Timer<'d, T> {
147    /// Set compare value for a channel.
148    pub fn set_compare_value(&self, value: u16) {
149        T::regs().cmp().modify(|w| w.set_cmp(value));
150    }
151
152    /// Get compare value for a channel.
153    pub fn get_compare_value(&self) -> u16 {
154        T::regs().cmp().read().cmp()
155    }
156
157    /// Enable the timer interrupt.
158    pub fn enable_interrupt(&self) {
159        T::regs().ier().modify(|w| w.set_arrmie(true));
160    }
161
162    /// Disable the timer interrupt.
163    pub fn disable_interrupt(&self) {
164        T::regs().ier().modify(|w| w.set_arrmie(false));
165    }
166
167    /// Check if the timer interrupt is enabled.
168    pub fn is_interrupt_enabled(&self) -> bool {
169        T::regs().ier().read().arrmie()
170    }
171
172    /// Check if the timer interrupt is pending.
173    pub fn is_interrupt_pending(&self) -> bool {
174        T::regs().isr().read().arrm()
175    }
176
177    /// Clear the timer interrupt.
178    pub fn clear_interrupt(&self) {
179        T::regs().icr().write(|w| w.set_arrmcf(true));
180    }
181}
embassy_stm32/lptim/timer/mod.rs

embassy_stm32/lptim/timer/
mod.rs
