embassy_stm32_plus/builder/uart/uart2/
rx.rs

1use embassy_stm32::mode::Async;
2use embassy_stm32::Peripheral;
3#[cfg(not(STM32C0))]
4use embassy_stm32::peripherals::DMA1_CH6;
5use embassy_stm32::peripherals::{PA1, USART2};
6#[cfg(USART2_PA3)]
7use embassy_stm32::peripherals::PA3;
8#[cfg(USART2_PA5)]
9use embassy_stm32::peripherals::PA5;
10#[cfg(USART2_PA13)]
11use embassy_stm32::peripherals::PA13;
12#[cfg(USART2_PA14)]
13use embassy_stm32::peripherals::PA14;
14#[cfg(USART2_PA15)]
15use embassy_stm32::peripherals::PA15;
16#[cfg(USART2_PB9)]
17use embassy_stm32::peripherals::PB9;
18#[cfg(USART2_PC14)]
19use embassy_stm32::peripherals::PC14;
20#[cfg(USART2_PD4)]
21use embassy_stm32::peripherals::PD4;
22#[cfg(USART2_PD6)]
23use embassy_stm32::peripherals::PD6;
24use embassy_stm32::usart::{Config, ConfigError, RxPin, UartRx};
25#[cfg(STM32C0)]
26use embassy_stm32::usart::RxDma;
27use crate::builder::uart::base::UartBase;
28use crate::builder::uart::uart2::Irqs;
29
30/// uart2 rx pin
31pub enum Uart2Rx {
32    #[cfg(USART2_PA3)]
33    PA3(PA3),
34    #[cfg(USART2_PA5)]
35    PA5(PA5),
36    #[cfg(USART2_PA13)]
37    PA13(PA13),
38    #[cfg(USART2_PA14)]
39    PA14(PA14),
40    #[cfg(USART2_PA15)]
41    PA15(PA15),
42    #[cfg(USART2_PD6)]
43    PD6(PD6),
44}
45
46/// uart2 rtx pin
47pub enum Uart2Rts {
48    PA1(PA1),
49    #[cfg(USART2_PB9)]
50    PB9(PB9),
51    #[cfg(USART2_PC14)]
52    PC14(PC14),
53    #[cfg(USART2_PD4)]
54    PD4(PD4),
55}
56
57/// uart2 rx builder
58pub struct Uart2RxBuilder {
59    /// uart2 base device
60    pub base: UartBase<USART2>,
61    /// rx pin
62    pub rx: Uart2Rx,
63    /// use rts
64    pub rts: Option<Uart2Rts>,
65}
66
67/// uart2 rx build
68macro_rules! uart2_rx_build {
69    ($rx_dma:ty) => {
70        /// build uart rx that supports read data
71        pub fn build(self, rx_dma: $rx_dma) -> Result<UartRx<'static, Async>, ConfigError> {
72            match self.rx {
73                #[cfg(USART2_PA3)]
74                Uart2Rx::PA3(pa3) => { Self::build_rts(pa3, rx_dma, self.base, self.rts) }
75                #[cfg(USART2_PA5)]
76                Uart2Rx::PA5(pa5) => { Self::build_rts(pa5, rx_dma, self.base, self.rts) }
77                #[cfg(USART2_PA13)]
78                Uart2Rx::PA13(pa13) => { Self::build_rts(pa13, rx_dma, self.base, self.rts) }
79                #[cfg(USART2_PA14)]
80                Uart2Rx::PA14(pa14) => { Self::build_rts(pa14, rx_dma, self.base, self.rts) }
81                #[cfg(USART2_PA15)]
82                Uart2Rx::PA15(pa15) => { Self::build_rts(pa15, rx_dma, self.base, self.rts) }
83                #[cfg(USART2_PD6)]
84                Uart2Rx::PD6(pd6) => { Self::build_rts(pd6, rx_dma, self.base, self.rts) }
85            }
86        }
87
88        /// build by rts
89        fn build_rts(
90            rx: impl Peripheral<P=impl RxPin<USART2>> + 'static,
91            rx_dma: $rx_dma,
92            base: UartBase<USART2>,
93            rts: Option<Uart2Rts>)
94            -> Result<UartRx<'static, Async>, ConfigError> {
95            let rts = crate::match_some_return!(rts,
96                UartRx::new(base.uart, Irqs, rx, rx_dma, base.config.unwrap_or_default()));
97
98            match rts {
99                Uart2Rts::PA1(pa1) => { UartRx::new_with_rts(base.uart, Irqs, rx, pa1, rx_dma, base.config.unwrap_or_default()) }
100                #[cfg(USART2_PB9)]
101                Uart2Rts::PB9(pb9) => { UartRx::new_with_rts(base.uart, Irqs, rx, pb9, rx_dma, base.config.unwrap_or_default()) }
102                #[cfg(USART2_PC14)]
103                Uart2Rts::PC14(pb14) => { UartRx::new_with_rts(base.uart, Irqs, rx, pb14, rx_dma, base.config.unwrap_or_default()) }
104                #[cfg(USART2_PD4)]
105                Uart2Rts::PD4(pd4) => { UartRx::new_with_rts(base.uart, Irqs, rx, pd4, rx_dma, base.config.unwrap_or_default()) }
106            }
107        }
108    };
109}
110
111/// custom method
112impl Uart2RxBuilder {
113    /// create builder
114    #[inline]
115    pub fn new(uart: USART2, rx: Uart2Rx) -> Self {
116        Self { base: UartBase::new(uart), rx, rts: None }
117    }
118
119    /// set uart config
120    #[inline]
121    pub fn config(mut self, config: Config) -> Self {
122        self.base.set_config(config);
123        self
124    }
125
126    /// set rts
127    #[inline]
128    pub fn rts(mut self, rts: Uart2Rts) -> Self {
129        self.rts = Some(rts);
130        self
131    }
132
133    #[cfg(STM32C0)]
134    uart2_rx_build!(impl Peripheral<P = impl RxDma<USART2>> + 'static);
135    #[cfg(not(STM32C0))]
136    uart2_rx_build!(DMA1_CH6);
137}
embassy_stm32_plus/builder/uart/uart2/rx.rs

embassy_stm32_plus/builder/uart/uart2/
rx.rs
