embassy_stm32_plus/builder/spi/spi2/
mod.rs

1use embassy_stm32::mode::{Async, Blocking};
2use embassy_stm32::peripherals::{DMA1_CH4, DMA1_CH5, PB13, PB14, PB15, SPI2};
3use embassy_stm32::spi::{Config, Spi};
4use crate::builder::spi::base::SpiBase;
5
6pub mod rx;
7pub mod tx;
8
9/// spi2 builder
10pub struct Spi2Builder {
11    /// spi device
12    pub base: SpiBase<SPI2>,
13    /// sck pin
14    pub sck: PB13,
15    /// mosi pin
16    pub mosi: PB15,
17    /// miso pin
18    pub miso: PB14,
19}
20
21/// custom method
22impl Spi2Builder {
23    /// create builder
24    #[inline]
25    pub fn new(spi: SPI2, sck: PB13, mosi: PB15, miso: PB14) -> Self {
26        Self { base: SpiBase::new(spi), sck, mosi, miso }
27    }
28
29    /// set spi config
30    #[inline]
31    pub fn config(mut self, config: Config) -> Self {
32        self.base.set_config(config);
33        self
34    }
35
36    /// Create a new SPI driver.<br />
37    /// more see [`Spi::<Async>::new`]
38    #[inline]
39    pub fn build(self, tx_dma: DMA1_CH5, rx_dma: DMA1_CH4) -> Spi<'static, Async> {
40        Spi::new(self.base.spi, self.sck, self.mosi, self.miso, tx_dma, rx_dma, self.base.config.unwrap_or_default())
41    }
42
43    /// Create a new blocking SPI driver.<br />
44    /// more see [`Spi::<Blocking>::new_blocking`]
45    #[inline]
46    pub fn build_blocking(self) -> Spi<'static, Blocking> {
47        Spi::new_blocking(self.base.spi, self.sck, self.mosi, self.miso, self.base.config.unwrap_or_default())
48    }
49}
embassy_stm32_plus/builder/spi/spi2/mod.rs

embassy_stm32_plus/builder/spi/spi2/
mod.rs
