embassy_stm32_plus/builder/uart/uart1/
rx.rs

1use embassy_stm32::mode::Async;
2use embassy_stm32::Peripheral;
3#[cfg(not(STM32C0))]
4use embassy_stm32::peripherals::DMA1_CH5;
5#[cfg(USART1_PA1)]
6use embassy_stm32::peripherals::PA1;
7#[cfg(PA10)]
8use embassy_stm32::peripherals::PA10;
9#[cfg(USART1_PA12)]
10use embassy_stm32::peripherals::PA12;
11#[cfg(USART1_PA14)]
12use embassy_stm32::peripherals::PA14;
13#[cfg(USART1_PA15)]
14use embassy_stm32::peripherals::PA15;
15#[cfg(USART1_PB3)]
16use embassy_stm32::peripherals::PB3;
17use embassy_stm32::peripherals::{PB7, USART1};
18#[cfg(USART1_RX_PA8)]
19use embassy_stm32::peripherals::PA8;
20#[cfg(USART1_PB2)]
21use embassy_stm32::peripherals::PB2;
22use embassy_stm32::usart::{Config, ConfigError, RxPin, UartRx};
23#[cfg(STM32C0)]
24use embassy_stm32::usart::RxDma;
25use crate::builder::uart::base::UartBase;
26use crate::builder::uart::uart1::Irqs;
27
28/// uart1 rx pin
29pub enum Uart1Rx {
30    #[cfg(USART1_PA1)]
31    PA1(PA1),
32    #[cfg(USART1_RX_PA8)]
33    PA8(PA8),
34    #[cfg(PA10)]
35    PA10(PA10),
36    #[cfg(USART1_PB2)]
37    PB2(PB2),
38    PB7(PB7),
39}
40
41/// uart1 rts pin
42pub enum Uart1Rts {
43    #[cfg(USART1_PA12)]
44    PA12(PA12),
45    #[cfg(USART1_PA14)]
46    PA14(PA14),
47    #[cfg(USART1_PA15)]
48    PA15(PA15),
49    #[cfg(USART1_PB3)]
50    PB3(PB3),
51}
52
53/// uart1 rx builder
54pub struct Uart1RxBuilder {
55    /// uart1 base data
56    pub base: UartBase<USART1>,
57    /// rx pin
58    pub rx: Uart1Rx,
59    /// use rts
60    pub rts: Option<Uart1Rts>,
61}
62
63/// uart1 rx build
64macro_rules! uart1_rx_build {
65    ($rx_dma:ty) => {
66        /// build uart rx that supports read data
67        pub fn build(self, rx_dma: $rx_dma) -> Result<UartRx<'static, Async>, ConfigError> {
68            match self.rx {
69                #[cfg(USART1_PA1)]
70                Uart1Rx::PA1(pa1) => {Self::build_rts(pa1, rx_dma, self.base, self.rts)}
71                #[cfg(USART1_RX_PA8)]
72                Uart1Rx::PA8(pa8) => {Self::build_rts(pa8, rx_dma, self.base, self.rts)}
73                #[cfg(PA10)]
74                Uart1Rx::PA10(pa10) => { Self::build_rts(pa10, rx_dma, self.base, self.rts) }
75                #[cfg(USART1_PB2)]
76                Uart1Rx::PB2(pb2) => { Self::build_rts(pb2, rx_dma, self.base, self.rts) }
77                Uart1Rx::PB7(pb7) => { Self::build_rts(pb7, rx_dma, self.base, self.rts) }
78            }
79        }
80
81        /// build rts or default
82        fn build_rts(
83            rx: impl Peripheral<P=impl RxPin<USART1>> + 'static,
84            rx_dma: $rx_dma,
85            base: UartBase<USART1>,
86            rts: Option<Uart1Rts>)
87            -> Result<UartRx<'static, Async>, ConfigError> {
88            let rts = crate::match_some_return!(rts,
89                UartRx::new(base.uart, Irqs, rx, rx_dma, base.config.unwrap_or_default()));
90            match rts {
91                #[cfg(USART1_PA12)]
92                Uart1Rts::PA12(pa12) => { UartRx::new_with_rts(base.uart, Irqs, rx, pa12, rx_dma, base.config.unwrap_or_default()) }
93                #[cfg(USART1_PA14)]
94                Uart1Rts::PA14(pa14) => { UartRx::new_with_rts(base.uart, Irqs, rx, pa14, rx_dma, base.config.unwrap_or_default()) }
95                #[cfg(USART1_PA15)]
96                Uart1Rts::PA15(pa15) => { UartRx::new_with_rts(base.uart, Irqs, rx, pa15, rx_dma, base.config.unwrap_or_default()) }
97                #[cfg(USART1_PB3)]
98                Uart1Rts::PB3(pb3) => { UartRx::new_with_rts(base.uart, Irqs, rx, pb3, rx_dma, base.config.unwrap_or_default()) }
99            }
100        }
101    };
102}
103
104/// uart1 rx builder
105impl Uart1RxBuilder {
106    /// create builder
107    #[inline]
108    pub fn new(uart: USART1, rx: Uart1Rx) -> Self {
109        Self { base: UartBase::new(uart), rx, rts: None }
110    }
111
112    /// set uart config
113    #[inline]
114    pub fn config(mut self, config: Config) -> Self {
115        self.base.set_config(config);
116        self
117    }
118
119    /// set rts
120    #[inline]
121    pub fn rts(mut self, rts: Uart1Rts) -> Self {
122        self.rts = Some(rts);
123        self
124    }
125
126    #[cfg(STM32C0)]
127    uart1_rx_build!(impl Peripheral<P = impl RxDma<USART1>> + 'static);
128    #[cfg(not(STM32C0))]
129    uart1_rx_build!(DMA1_CH5);
130}
embassy_stm32_plus/builder/uart/uart1/rx.rs

embassy_stm32_plus/builder/uart/uart1/
rx.rs
