embassy_nrf/chips/
nrf52840.rs

1pub use nrf_pac as pac;
2
3/// The maximum buffer size that the EasyDMA can send/recv in one operation.
4pub const EASY_DMA_SIZE: usize = (1 << 16) - 1;
5pub const FORCE_COPY_BUFFER_SIZE: usize = 512;
6
7pub const FLASH_SIZE: usize = 1024 * 1024;
8
9pub const RESET_PIN: u32 = 18;
10pub const APPROTECT_MIN_BUILD_CODE: u8 = b'F';
11
12embassy_hal_internal::peripherals! {
13    // USB
14    USBD,
15
16    // RTC
17    RTC0,
18    #[cfg(not(feature = "time-driver-rtc1"))]
19    RTC1,
20    RTC2,
21
22    // WDT
23    WDT,
24
25    // NVMC
26    NVMC,
27
28    // RNG
29    RNG,
30
31    // QSPI
32    QSPI,
33
34    // QDEC
35    QDEC,
36
37    // UARTE
38    UARTE0,
39    UARTE1,
40
41    // SPI/TWI
42    TWISPI0,
43    TWISPI1,
44    SPI2,
45    SPI3,
46
47    // SAADC
48    SAADC,
49
50    // PWM
51    PWM0,
52    PWM1,
53    PWM2,
54    PWM3,
55
56    // TIMER
57    TIMER0,
58    TIMER1,
59    TIMER2,
60    TIMER3,
61    TIMER4,
62
63    // GPIOTE
64    GPIOTE_CH0,
65    GPIOTE_CH1,
66    GPIOTE_CH2,
67    GPIOTE_CH3,
68    GPIOTE_CH4,
69    GPIOTE_CH5,
70    GPIOTE_CH6,
71    GPIOTE_CH7,
72
73    // PPI
74    PPI_CH0,
75    PPI_CH1,
76    PPI_CH2,
77    PPI_CH3,
78    PPI_CH4,
79    PPI_CH5,
80    PPI_CH6,
81    PPI_CH7,
82    PPI_CH8,
83    PPI_CH9,
84    PPI_CH10,
85    PPI_CH11,
86    PPI_CH12,
87    PPI_CH13,
88    PPI_CH14,
89    PPI_CH15,
90    PPI_CH16,
91    PPI_CH17,
92    PPI_CH18,
93    PPI_CH19,
94    PPI_CH20,
95    PPI_CH21,
96    PPI_CH22,
97    PPI_CH23,
98    PPI_CH24,
99    PPI_CH25,
100    PPI_CH26,
101    PPI_CH27,
102    PPI_CH28,
103    PPI_CH29,
104    PPI_CH30,
105    PPI_CH31,
106
107    PPI_GROUP0,
108    PPI_GROUP1,
109    PPI_GROUP2,
110    PPI_GROUP3,
111    PPI_GROUP4,
112    PPI_GROUP5,
113
114    // GPIO port 0
115    P0_00,
116    P0_01,
117    P0_02,
118    P0_03,
119    P0_04,
120    P0_05,
121    P0_06,
122    P0_07,
123    P0_08,
124    #[cfg(feature = "nfc-pins-as-gpio")]
125    P0_09,
126    #[cfg(feature = "nfc-pins-as-gpio")]
127    P0_10,
128    P0_11,
129    P0_12,
130    P0_13,
131    P0_14,
132    P0_15,
133    P0_16,
134    P0_17,
135    #[cfg(feature="reset-pin-as-gpio")]
136    P0_18,
137    P0_19,
138    P0_20,
139    P0_21,
140    P0_22,
141    P0_23,
142    P0_24,
143    P0_25,
144    P0_26,
145    P0_27,
146    P0_28,
147    P0_29,
148    P0_30,
149    P0_31,
150
151    // GPIO port 1
152    P1_00,
153    P1_01,
154    P1_02,
155    P1_03,
156    P1_04,
157    P1_05,
158    P1_06,
159    P1_07,
160    P1_08,
161    P1_09,
162    P1_10,
163    P1_11,
164    P1_12,
165    P1_13,
166    P1_14,
167    P1_15,
168
169    // TEMP
170    TEMP,
171
172    // PDM
173    PDM,
174
175    // I2S
176    I2S,
177
178    // Radio
179    RADIO,
180
181    // EGU
182    EGU0,
183    EGU1,
184    EGU2,
185    EGU3,
186    EGU4,
187    EGU5,
188
189    // NFC
190    NFCT,
191
192    // CryptoCell RNG
193    CC_RNG
194}
195
196impl_usb!(USBD, USBD, USBD);
197
198impl_uarte!(UARTE0, UARTE0, UARTE0);
199impl_uarte!(UARTE1, UARTE1, UARTE1);
200
201impl_spim!(TWISPI0, SPIM0, TWISPI0);
202impl_spim!(TWISPI1, SPIM1, TWISPI1);
203impl_spim!(SPI2, SPIM2, SPI2);
204impl_spim!(SPI3, SPIM3, SPIM3);
205
206impl_spis!(TWISPI0, SPIS0, TWISPI0);
207impl_spis!(TWISPI1, SPIS1, TWISPI1);
208impl_spis!(SPI2, SPIS2, SPI2);
209
210impl_twim!(TWISPI0, TWIM0, TWISPI0);
211impl_twim!(TWISPI1, TWIM1, TWISPI1);
212
213impl_twis!(TWISPI0, TWIS0, TWISPI0);
214impl_twis!(TWISPI1, TWIS1, TWISPI1);
215
216impl_pwm!(PWM0, PWM0, PWM0);
217impl_pwm!(PWM1, PWM1, PWM1);
218impl_pwm!(PWM2, PWM2, PWM2);
219impl_pwm!(PWM3, PWM3, PWM3);
220
221impl_ccrng!(CC_RNG, CC_RNG, CRYPTOCELL);
222
223impl_timer!(TIMER0, TIMER0, TIMER0);
224impl_timer!(TIMER1, TIMER1, TIMER1);
225impl_timer!(TIMER2, TIMER2, TIMER2);
226impl_timer!(TIMER3, TIMER3, TIMER3, extended);
227impl_timer!(TIMER4, TIMER4, TIMER4, extended);
228
229impl_rtc!(RTC0, RTC0, RTC0);
230#[cfg(not(feature = "time-driver-rtc1"))]
231impl_rtc!(RTC1, RTC1, RTC1);
232impl_rtc!(RTC2, RTC2, RTC2);
233
234impl_qspi!(QSPI, QSPI, QSPI);
235
236impl_pdm!(PDM, PDM, PDM);
237
238impl_qdec!(QDEC, QDEC, QDEC);
239
240impl_rng!(RNG, RNG, RNG);
241
242impl_pin!(P0_00, 0, 0);
243impl_pin!(P0_01, 0, 1);
244impl_pin!(P0_02, 0, 2);
245impl_pin!(P0_03, 0, 3);
246impl_pin!(P0_04, 0, 4);
247impl_pin!(P0_05, 0, 5);
248impl_pin!(P0_06, 0, 6);
249impl_pin!(P0_07, 0, 7);
250impl_pin!(P0_08, 0, 8);
251#[cfg(feature = "nfc-pins-as-gpio")]
252impl_pin!(P0_09, 0, 9);
253#[cfg(feature = "nfc-pins-as-gpio")]
254impl_pin!(P0_10, 0, 10);
255impl_pin!(P0_11, 0, 11);
256impl_pin!(P0_12, 0, 12);
257impl_pin!(P0_13, 0, 13);
258impl_pin!(P0_14, 0, 14);
259impl_pin!(P0_15, 0, 15);
260impl_pin!(P0_16, 0, 16);
261impl_pin!(P0_17, 0, 17);
262#[cfg(feature = "reset-pin-as-gpio")]
263impl_pin!(P0_18, 0, 18);
264impl_pin!(P0_19, 0, 19);
265impl_pin!(P0_20, 0, 20);
266impl_pin!(P0_21, 0, 21);
267impl_pin!(P0_22, 0, 22);
268impl_pin!(P0_23, 0, 23);
269impl_pin!(P0_24, 0, 24);
270impl_pin!(P0_25, 0, 25);
271impl_pin!(P0_26, 0, 26);
272impl_pin!(P0_27, 0, 27);
273impl_pin!(P0_28, 0, 28);
274impl_pin!(P0_29, 0, 29);
275impl_pin!(P0_30, 0, 30);
276impl_pin!(P0_31, 0, 31);
277
278impl_pin!(P1_00, 1, 0);
279impl_pin!(P1_01, 1, 1);
280impl_pin!(P1_02, 1, 2);
281impl_pin!(P1_03, 1, 3);
282impl_pin!(P1_04, 1, 4);
283impl_pin!(P1_05, 1, 5);
284impl_pin!(P1_06, 1, 6);
285impl_pin!(P1_07, 1, 7);
286impl_pin!(P1_08, 1, 8);
287impl_pin!(P1_09, 1, 9);
288impl_pin!(P1_10, 1, 10);
289impl_pin!(P1_11, 1, 11);
290impl_pin!(P1_12, 1, 12);
291impl_pin!(P1_13, 1, 13);
292impl_pin!(P1_14, 1, 14);
293impl_pin!(P1_15, 1, 15);
294
295impl_ppi_channel!(PPI_CH0, PPI, 0 => configurable);
296impl_ppi_channel!(PPI_CH1, PPI, 1 => configurable);
297impl_ppi_channel!(PPI_CH2, PPI, 2 => configurable);
298impl_ppi_channel!(PPI_CH3, PPI, 3 => configurable);
299impl_ppi_channel!(PPI_CH4, PPI, 4 => configurable);
300impl_ppi_channel!(PPI_CH5, PPI, 5 => configurable);
301impl_ppi_channel!(PPI_CH6, PPI, 6 => configurable);
302impl_ppi_channel!(PPI_CH7, PPI, 7 => configurable);
303impl_ppi_channel!(PPI_CH8, PPI, 8 => configurable);
304impl_ppi_channel!(PPI_CH9, PPI, 9 => configurable);
305impl_ppi_channel!(PPI_CH10, PPI, 10 => configurable);
306impl_ppi_channel!(PPI_CH11, PPI, 11 => configurable);
307impl_ppi_channel!(PPI_CH12, PPI, 12 => configurable);
308impl_ppi_channel!(PPI_CH13, PPI, 13 => configurable);
309impl_ppi_channel!(PPI_CH14, PPI, 14 => configurable);
310impl_ppi_channel!(PPI_CH15, PPI, 15 => configurable);
311impl_ppi_channel!(PPI_CH16, PPI, 16 => configurable);
312impl_ppi_channel!(PPI_CH17, PPI, 17 => configurable);
313impl_ppi_channel!(PPI_CH18, PPI, 18 => configurable);
314impl_ppi_channel!(PPI_CH19, PPI, 19 => configurable);
315impl_ppi_channel!(PPI_CH20, PPI, 20 => static);
316impl_ppi_channel!(PPI_CH21, PPI, 21 => static);
317impl_ppi_channel!(PPI_CH22, PPI, 22 => static);
318impl_ppi_channel!(PPI_CH23, PPI, 23 => static);
319impl_ppi_channel!(PPI_CH24, PPI, 24 => static);
320impl_ppi_channel!(PPI_CH25, PPI, 25 => static);
321impl_ppi_channel!(PPI_CH26, PPI, 26 => static);
322impl_ppi_channel!(PPI_CH27, PPI, 27 => static);
323impl_ppi_channel!(PPI_CH28, PPI, 28 => static);
324impl_ppi_channel!(PPI_CH29, PPI, 29 => static);
325impl_ppi_channel!(PPI_CH30, PPI, 30 => static);
326impl_ppi_channel!(PPI_CH31, PPI, 31 => static);
327
328impl_ppi_group!(PPI_GROUP0, PPI, 0);
329impl_ppi_group!(PPI_GROUP1, PPI, 1);
330impl_ppi_group!(PPI_GROUP2, PPI, 2);
331impl_ppi_group!(PPI_GROUP3, PPI, 3);
332impl_ppi_group!(PPI_GROUP4, PPI, 4);
333impl_ppi_group!(PPI_GROUP5, PPI, 5);
334
335impl_saadc_input!(P0_02, AnalogInput0);
336impl_saadc_input!(P0_03, AnalogInput1);
337impl_saadc_input!(P0_04, AnalogInput2);
338impl_saadc_input!(P0_05, AnalogInput3);
339impl_saadc_input!(P0_28, AnalogInput4);
340impl_saadc_input!(P0_29, AnalogInput5);
341impl_saadc_input!(P0_30, AnalogInput6);
342impl_saadc_input!(P0_31, AnalogInput7);
343
344impl_i2s!(I2S, I2S, I2S);
345
346impl_radio!(RADIO, RADIO, RADIO);
347
348impl_egu!(EGU0, EGU0, EGU0_SWI0);
349impl_egu!(EGU1, EGU1, EGU1_SWI1);
350impl_egu!(EGU2, EGU2, EGU2_SWI2);
351impl_egu!(EGU3, EGU3, EGU3_SWI3);
352impl_egu!(EGU4, EGU4, EGU4_SWI4);
353impl_egu!(EGU5, EGU5, EGU5_SWI5);
354
355impl_wdt!(WDT, WDT, WDT, 0);
356
357embassy_hal_internal::interrupt_mod!(
358    CLOCK_POWER,
359    RADIO,
360    UARTE0,
361    TWISPI0,
362    TWISPI1,
363    NFCT,
364    GPIOTE,
365    SAADC,
366    TIMER0,
367    TIMER1,
368    TIMER2,
369    RTC0,
370    TEMP,
371    RNG,
372    ECB,
373    AAR_CCM,
374    WDT,
375    RTC1,
376    QDEC,
377    COMP_LPCOMP,
378    EGU0_SWI0,
379    EGU1_SWI1,
380    EGU2_SWI2,
381    EGU3_SWI3,
382    EGU4_SWI4,
383    EGU5_SWI5,
384    TIMER3,
385    TIMER4,
386    PWM0,
387    PDM,
388    MWU,
389    PWM1,
390    PWM2,
391    SPI2,
392    RTC2,
393    I2S,
394    FPU,
395    USBD,
396    UARTE1,
397    QSPI,
398    CRYPTOCELL,
399    PWM3,
400    SPIM3,
401);
embassy_nrf/chips/nrf52840.rs

embassy_nrf/chips/
nrf52840.rs
