elfling/lib.rs
1use zerocopy::FromBytes;
2
3macro_rules! elf_enum {
4 (
5 $(#[$attr:meta])*
6 $vis:vis struct $name:ident($inner_type:ty) {
7 $(
8 $(#[doc = $doc:expr])*
9 $const_name:ident = $value:expr,
10 )*
11 }
12 ) => {
13 #[repr(transparent)]
14 #[derive(Debug, Clone, PartialEq, Eq, PartialOrd, Ord, FromBytes)]
15 $(#[$attr])*
16 $vis struct $name {
17 inner: $inner_type,
18 }
19
20 impl $name {
21 $(
22 $(#[doc = $doc])*
23 pub const $const_name: Self = Self::from_raw($value);
24 )*
25
26 pub const fn from_raw(raw: $inner_type) -> Self {
27 Self { inner: raw }
28 }
29
30 pub const fn into_raw(self) -> $inner_type {
31 self.inner
32 }
33
34 pub const fn as_raw(&self) -> $inner_type {
35 self.inner
36 }
37 }
38
39 impl From<$name> for $inner_type {
40 fn from(e: $name) -> $inner_type {
41 e.into_raw()
42 }
43 }
44 };
45}
46
47/// 64-bit ELF header structure (Elf64_Ehdr)
48///
49/// This structure represents the ELF file header for 64-bit object files.
50/// It provides essential information about the file format, target architecture,
51/// and layout of the ELF file.
52#[repr(C)]
53#[derive(Debug, Clone, PartialEq, Eq, PartialOrd, Ord, FromBytes)]
54#[doc(alias = "Elf64_Ehdr")]
55pub struct Header64 {
56 /// ELF identification magic number [0x7f, 'E', 'L', 'F']
57 #[doc(alias = "EI_MAG0")]
58 #[doc(alias = "EI_MAG1")]
59 #[doc(alias = "EI_MAG2")]
60 #[doc(alias = "EI_MAG3")]
61 pub magic: Magic,
62 /// Object file class (32-bit or 64-bit)
63 #[doc(alias = "EI_CLASS")]
64 pub class: Class,
65 /// Data encoding (little-endian or big-endian)
66 #[doc(alias = "EI_DATA")]
67 pub encoding: Encoding,
68 /// File version (EI_VERSION)
69 #[doc(alias = "EI_VERSION")]
70 pub header_version: HeaderVersion,
71 /// Operating system/ABI identification
72 #[doc(alias = "EI_OSABI")]
73 pub os_abi: OsAbi,
74 /// ABI version
75 #[doc(alias = "EI_ABIVERSION")]
76 pub abi_version: u8,
77 /// Padding bytes (reserved for future use)
78 #[doc(alias = "EI_PAD")]
79 pub pad: [u8; 7],
80 /// Object file type (executable, relocatable, shared object, etc.)
81 #[doc(alias = "e_type")]
82 pub object_type: ObjectType,
83 /// Target architecture
84 #[doc(alias = "e_machine")]
85 pub machine: Machine,
86 /// Object file version
87 #[doc(alias = "e_version")]
88 pub version: Version,
89 /// Entry point virtual address
90 #[doc(alias = "e_entry")]
91 pub entry_point: u64,
92 /// Program header table file offset
93 #[doc(alias = "e_phoff")]
94 pub program_header_offset: u64,
95 /// Section header table file offset
96 #[doc(alias = "e_shoff")]
97 pub section_header_offset: u64,
98 /// Processor-specific flags
99 #[doc(alias = "e_flags")]
100 pub flags: u32,
101 /// ELF header size in bytes
102 #[doc(alias = "e_ehsize")]
103 pub header_size: u16,
104 /// Program header table entry size
105 #[doc(alias = "e_phentsize")]
106 pub program_header_entry_size: u16,
107 /// Number of entries in the program header table
108 #[doc(alias = "e_phnum")]
109 pub program_header_count: u16,
110 /// Section header table entry size
111 #[doc(alias = "e_shentsize")]
112 pub section_header_entry_size: u16,
113 /// Number of entries in the section header table
114 #[doc(alias = "e_shnum")]
115 pub section_header_count: u16,
116 /// Section header string table index
117 #[doc(alias = "e_shstrndx")]
118 pub section_header_string_table_index: u16,
119}
120
121#[repr(transparent)]
122#[derive(Debug, Clone, PartialEq, Eq, PartialOrd, Ord, FromBytes)]
123pub struct Magic {
124 inner: [u8; 4],
125}
126
127impl Magic {
128 pub fn is_valid(&self) -> bool {
129 self.inner == [0x7f, b'E', b'L', b'F']
130 }
131}
132
133elf_enum! {
134 pub struct Class(u8) {
135 NONE = 0,
136 ELF32 = 1,
137 ELF64 = 2,
138 }
139}
140
141elf_enum! {
142 pub struct Encoding(u8) {
143 NONE = 0,
144 ELFDATA2LSB = 1,
145 ELFDATA2MSB = 2,
146 }
147}
148
149elf_enum! {
150 pub struct HeaderVersion(u8) {
151 /// Invalid version
152 NONE = 0,
153 /// Current version
154 CURRENT = 1,
155 }
156}
157
158elf_enum! {
159 pub struct OsAbi(u8) {
160 /// No extensions or unspecified
161 NONE = 0,
162 /// Hewlett-Packard HP-UX
163 HPUX = 1,
164 /// NetBSD
165 NETBSD = 2,
166 /// GNU
167 GNU = 3,
168 /// Linux (historical - alias for ELFOSABI_GNU)
169 LINUX = 3,
170 /// Sun Solaris
171 SOLARIS = 6,
172 /// AIX
173 AIX = 7,
174 /// IRIX
175 IRIX = 8,
176 /// FreeBSD
177 FREEBSD = 9,
178 /// Compaq TRU64 UNIX
179 TRU64 = 10,
180 /// Novell Modesto
181 MODESTO = 11,
182 /// Open BSD
183 OPENBSD = 12,
184 /// Open VMS
185 OPENVMS = 13,
186 /// Hewlett-Packard Non-Stop Kernel
187 NSK = 14,
188 /// Amiga Research OS
189 AROS = 15,
190 /// The FenixOS highly scalable multi-core OS
191 FENIXOS = 16,
192 /// Nuxi CloudABI
193 CLOUDABI = 17,
194 /// Stratus Technologies OpenVOS
195 OPENVOS = 18,
196 }
197}
198
199elf_enum! {
200 pub struct ObjectType(u16) {
201 NONE = 0,
202 REL = 1,
203 EXEC = 2,
204 DYN = 3,
205 CORE = 4,
206 LOOS = 0xfe00,
207 HIOS = 0xfeff,
208 LOPROC = 0xff00,
209 HIPROC = 0xffff,
210 }
211}
212
213elf_enum! {
214 pub struct Machine(u16) {
215 /// No machine
216 NONE = 0,
217 /// AT&T WE 32100
218 M32 = 1,
219 /// SPARC
220 SPARC = 2,
221 /// Intel 80386
222 _386 = 3,
223 /// Motorola 68000
224 _68K = 4,
225 /// Motorola 88000
226 _88K = 5,
227 /// Intel MCU
228 IAMCU = 6,
229 /// Intel 80860
230 _860 = 7,
231 /// MIPS I Architecture
232 MIPS = 8,
233 /// IBM System/370 Processor
234 S370 = 9,
235 /// MIPS RS3000 Little-endian
236 MIPS_RS3_LE = 10,
237 /// Hewlett-Packard PA-RISC
238 PARISC = 15,
239 /// Fujitsu VPP500
240 VPP500 = 17,
241 /// Enhanced instruction set SPARC
242 SPARC32PLUS = 18,
243 /// Intel 80960
244 _960 = 19,
245 /// PowerPC
246 PPC = 20,
247 /// 64-bit PowerPC
248 PPC64 = 21,
249 /// IBM System/390 Processor
250 S390 = 22,
251 /// IBM SPU/SPC
252 SPU = 23,
253 /// NEC V800
254 V800 = 36,
255 /// Fujitsu FR20
256 FR20 = 37,
257 /// TRW RH-32
258 RH32 = 38,
259 /// Motorola RCE
260 RCE = 39,
261 /// ARM 32-bit architecture (AARCH32)
262 ARM = 40,
263 /// Digital Alpha
264 ALPHA = 41,
265 /// Hitachi SH
266 SH = 42,
267 /// SPARC Version 9
268 SPARCV9 = 43,
269 /// Siemens TriCore embedded processor
270 TRICORE = 44,
271 /// Argonaut RISC Core, Argonaut Technologies Inc.
272 ARC = 45,
273 /// Hitachi H8/300
274 H8_300 = 46,
275 /// Hitachi H8/300H
276 H8_300H = 47,
277 /// Hitachi H8S
278 H8S = 48,
279 /// Hitachi H8/500
280 H8_500 = 49,
281 /// Intel IA-64 processor architecture
282 IA_64 = 50,
283 /// Stanford MIPS-X
284 MIPS_X = 51,
285 /// Motorola ColdFire
286 COLDFIRE = 52,
287 /// Motorola M68HC12
288 _68HC12 = 53,
289 /// Fujitsu MMA Multimedia Accelerator
290 MMA = 54,
291 /// Siemens PCP
292 PCP = 55,
293 /// Sony nCPU embedded RISC processor
294 NCPU = 56,
295 /// Denso NDR1 microprocessor
296 NDR1 = 57,
297 /// Motorola Star*Core processor
298 STARCORE = 58,
299 /// Toyota ME16 processor
300 ME16 = 59,
301 /// STMicroelectronics ST100 processor
302 ST100 = 60,
303 /// Advanced Logic Corp. TinyJ embedded processor family
304 TINYJ = 61,
305 /// AMD x86-64 architecture
306 X86_64 = 62,
307 /// Sony DSP Processor
308 PDSP = 63,
309 /// Digital Equipment Corp. PDP-10
310 PDP10 = 64,
311 /// Digital Equipment Corp. PDP-11
312 PDP11 = 65,
313 /// Siemens FX66 microcontroller
314 FX66 = 66,
315 /// STMicroelectronics ST9+ 8/16 bit microcontroller
316 ST9PLUS = 67,
317 /// STMicroelectronics ST7 8-bit microcontroller
318 ST7 = 68,
319 /// Motorola MC68HC16 Microcontroller
320 _68HC16 = 69,
321 /// Motorola MC68HC11 Microcontroller
322 _68HC11 = 70,
323 /// Motorola MC68HC08 Microcontroller
324 _68HC08 = 71,
325 /// Motorola MC68HC05 Microcontroller
326 _68HC05 = 72,
327 /// Silicon Graphics SVx
328 SVX = 73,
329 /// STMicroelectronics ST19 8-bit microcontroller
330 ST19 = 74,
331 /// Digital VAX
332 VAX = 75,
333 /// Axis Communications 32-bit embedded processor
334 CRIS = 76,
335 /// Infineon Technologies 32-bit embedded processor
336 JAVELIN = 77,
337 /// Element 14 64-bit DSP Processor
338 FIREPATH = 78,
339 /// LSI Logic 16-bit DSP Processor
340 ZSP = 79,
341 /// Donald Knuth's educational 64-bit processor
342 MMIX = 80,
343 /// Harvard University machine-independent object files
344 HUANY = 81,
345 /// SiTera Prism
346 PRISM = 82,
347 /// Atmel AVR 8-bit microcontroller
348 AVR = 83,
349 /// Fujitsu FR30
350 FR30 = 84,
351 /// Mitsubishi D10V
352 D10V = 85,
353 /// Mitsubishi D30V
354 D30V = 86,
355 /// NEC v850
356 V850 = 87,
357 /// Mitsubishi M32R
358 M32R = 88,
359 /// Matsushita MN10300
360 MN10300 = 89,
361 /// Matsushita MN10200
362 MN10200 = 90,
363 /// picoJava
364 PJ = 91,
365 /// OpenRISC 32-bit embedded processor
366 OPENRISC = 92,
367 /// ARC International ARCompact processor
368 ARC_COMPACT = 93,
369 /// Tensilica Xtensa Architecture
370 XTENSA = 94,
371 /// Alphamosaic VideoCore processor
372 VIDEOCORE = 95,
373 /// Thompson Multimedia General Purpose Processor
374 TMM_GPP = 96,
375 /// National Semiconductor 32000 series
376 NS32K = 97,
377 /// Tenor Network TPC processor
378 TPC = 98,
379 /// Trebia SNP 1000 processor
380 SNP1K = 99,
381 /// STMicroelectronics ST200 microcontroller
382 ST200 = 100,
383 /// Ubicom IP2xxx microcontroller family
384 IP2K = 101,
385 /// MAX Processor
386 MAX = 102,
387 /// National Semiconductor CompactRISC microprocessor
388 CR = 103,
389 /// Fujitsu F2MC16
390 F2MC16 = 104,
391 /// Texas Instruments embedded microcontroller msp430
392 MSP430 = 105,
393 /// Analog Devices Blackfin (DSP) processor
394 BLACKFIN = 106,
395 /// S1C33 Family of Seiko Epson processors
396 SE_C33 = 107,
397 /// Sharp embedded microprocessor
398 SEP = 108,
399 /// Arca RISC Microprocessor
400 ARCA = 109,
401 /// Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University
402 UNICORE = 110,
403 /// eXcess: 16/32/64-bit configurable embedded CPU
404 EXCESS = 111,
405 /// Icera Semiconductor Inc. Deep Execution Processor
406 DXP = 112,
407 /// Altera Nios II soft-core processor
408 ALTERA_NIOS2 = 113,
409 /// National Semiconductor CompactRISC CRX microprocessor
410 CRX = 114,
411 /// Motorola XGATE embedded processor
412 XGATE = 115,
413 /// Infineon C16x/XC16x processor
414 C166 = 116,
415 /// Renesas M16C series microprocessors
416 M16C = 117,
417 /// Microchip Technology dsPIC30F Digital Signal Controller
418 DSPIC30F = 118,
419 /// Freescale Communication Engine RISC core
420 CE = 119,
421 /// Renesas M32C series microprocessors
422 M32C = 120,
423 /// Altium TSK3000 core
424 TSK3000 = 131,
425 /// Freescale RS08 embedded processor
426 RS08 = 132,
427 /// Analog Devices SHARC family of 32-bit DSP processors
428 SHARC = 133,
429 /// Cyan Technology eCOG2 microprocessor
430 ECOG2 = 134,
431 /// Sunplus S+core7 RISC processor
432 SCORE7 = 135,
433 /// New Japan Radio (NJR) 24-bit DSP Processor
434 DSP24 = 136,
435 /// Broadcom VideoCore III processor
436 VIDEOCORE3 = 137,
437 /// RISC processor for Lattice FPGA architecture
438 LATTICEMICO32 = 138,
439 /// Seiko Epson C17 family
440 SE_C17 = 139,
441 /// The Texas Instruments TMS320C6000 DSP family
442 TI_C6000 = 140,
443 /// The Texas Instruments TMS320C2000 DSP family
444 TI_C2000 = 141,
445 /// The Texas Instruments TMS320C55x DSP family
446 TI_C5500 = 142,
447 /// Texas Instruments Application Specific RISC Processor, 32bit fetch
448 TI_ARP32 = 143,
449 /// Texas Instruments Programmable Realtime Unit
450 TI_PRU = 144,
451 /// STMicroelectronics 64bit VLIW Data Signal Processor
452 MMDSP_PLUS = 160,
453 /// Cypress M8C microprocessor
454 CYPRESS_M8C = 161,
455 /// Renesas R32C series microprocessors
456 R32C = 162,
457 /// NXP Semiconductors TriMedia architecture family
458 TRIMEDIA = 163,
459 /// QUALCOMM DSP6 Processor
460 QDSP6 = 164,
461 /// Intel 8051 and variants
462 _8051 = 165,
463 /// STMicroelectronics STxP7x family of configurable and extensible RISC processors
464 STXP7X = 166,
465 /// Andes Technology compact code size embedded RISC processor family
466 NDS32 = 167,
467 /// Cyan Technology eCOG1X family
468 ECOG1X = 168,
469 /// Dallas Semiconductor MAXQ30 Core Micro-controllers
470 MAXQ30 = 169,
471 /// New Japan Radio (NJR) 16-bit DSP Processor
472 XIMO16 = 170,
473 /// M2000 Reconfigurable RISC Microprocessor
474 MANIK = 171,
475 /// Cray Inc. NV2 vector architecture
476 CRAYNV2 = 172,
477 /// Renesas RX family
478 RX = 173,
479 /// Imagination Technologies META processor architecture
480 METAG = 174,
481 /// MCST Elbrus general purpose hardware architecture
482 MCST_ELBRUS = 175,
483 /// Cyan Technology eCOG16 family
484 ECOG16 = 176,
485 /// National Semiconductor CompactRISC CR16 16-bit microprocessor
486 CR16 = 177,
487 /// Freescale Extended Time Processing Unit
488 ETPU = 178,
489 /// Infineon Technologies SLE9X core
490 SLE9X = 179,
491 /// Intel L10M
492 L10M = 180,
493 /// Intel K10M
494 K10M = 181,
495 /// ARM 64-bit architecture (AARCH64)
496 AARCH64 = 183,
497 /// Atmel Corporation 32-bit microprocessor family
498 AVR32 = 185,
499 /// STMicroeletronics STM8 8-bit microcontroller
500 STM8 = 186,
501 /// Tilera TILE64 multicore architecture family
502 TILE64 = 187,
503 /// Tilera TILEPro multicore architecture family
504 TILEPRO = 188,
505 /// Xilinx MicroBlaze 32-bit RISC soft processor core
506 MICROBLAZE = 189,
507 /// NVIDIA CUDA architecture
508 CUDA = 190,
509 /// Tilera TILE-Gx multicore architecture family
510 TILEGX = 191,
511 /// CloudShield architecture family
512 CLOUDSHIELD = 192,
513 /// KIPO-KAIST Core-A 1st generation processor family
514 COREA_1ST = 193,
515 /// KIPO-KAIST Core-A 2nd generation processor family
516 COREA_2ND = 194,
517 /// Synopsys ARCompact V2
518 ARC_COMPACT2 = 195,
519 /// Open8 8-bit RISC soft processor core
520 OPEN8 = 196,
521 /// Renesas RL78 family
522 RL78 = 197,
523 /// Broadcom VideoCore V processor
524 VIDEOCORE5 = 198,
525 /// Renesas 78KOR family
526 _78KOR = 199,
527 /// Freescale 56800EX Digital Signal Controller (DSC)
528 _56800EX = 200,
529 /// Beyond BA1 CPU architecture
530 BA1 = 201,
531 /// Beyond BA2 CPU architecture
532 BA2 = 202,
533 /// XMOS xCORE processor family
534 XCORE = 203,
535 /// Microchip 8-bit PIC(r) family
536 MCHP_PIC = 204,
537 /// KM211 KM32 32-bit processor
538 KM32 = 210,
539 /// KM211 KMX32 32-bit processor
540 KMX32 = 211,
541 /// KM211 KMX16 16-bit processor
542 KMX16 = 212,
543 /// KM211 KMX8 8-bit processor
544 KMX8 = 213,
545 /// KM211 KVARC processor
546 KVARC = 214,
547 /// Paneve CDP architecture family
548 CDP = 215,
549 /// Cognitive Smart Memory Processor
550 COGE = 216,
551 /// Bluechip Systems CoolEngine
552 COOL = 217,
553 /// Nanoradio Optimized RISC
554 NORC = 218,
555 /// CSR Kalimba architecture family
556 CSR_KALIMBA = 219,
557 /// Zilog Z80
558 Z80 = 220,
559 /// Controls and Data Services VISIUMcore processor
560 VISIUM = 221,
561 /// FTDI Chip FT32 high performance 32-bit RISC architecture
562 FT32 = 222,
563 /// Moxie processor family
564 MOXIE = 223,
565 /// AMD GPU architecture
566 AMDGPU = 224,
567 /// RISC-V
568 RISCV = 243,
569 }
570}
571
572elf_enum! {
573 pub struct Version(u32) {
574 /// Invalid version
575 NONE = 0,
576 /// Current version
577 CURRENT = 1,
578 }
579}