pub struct ElfFlags(/* private fields */);
Implementations§
source§impl ElfFlags
impl ElfFlags
pub const XGATE_ABI: Self = _
pub const M68HC11_ABI: Self = _
sourcepub const M68K_CF_ISA_MASK: Self = _
pub const M68K_CF_ISA_MASK: Self = _
Which ISA
sourcepub const IA_64_MASKOS: Self = _
pub const IA_64_MASKOS: Self = _
OS-specific flags.
pub const PICOJAVA_ARCH: Self = _
pub const BPF_CPUVER: Self = _
pub const XTENSA_MACH: Self = _
pub const M32R_IGNORE: Self = _
pub const NDS32_ELF_VERSION: Self = _
pub const XGATE_MACH_MASK: Self = _
pub const M68HC11_MACH_MASK: Self = _
pub const NDS_ABI: Self = _
sourcepub const XGATE_MACH: Self = _
pub const XGATE_MACH: Self = _
XGATE microcontroller.
pub const ARM_NEW_ABI: Self = _
pub const AVR_LINKRELAX_PREPARED: Self = _
pub const MIPS_OPTIONS_FIRST: Self = _
sourcepub const IA_64_NOFUNCDESC_CONS_GP: Self = _
pub const IA_64_NOFUNCDESC_CONS_GP: Self = _
And no function descriptors.
sourcepub const FRV_GPR_MASK: Self = _
pub const FRV_GPR_MASK: Self = _
mask for # of gprs
sourcepub const IQ2000_CPU_MASK: Self = _
pub const IQ2000_CPU_MASK: Self = _
specific cpu bits
sourcepub const MT_CPU_MS2: Self = _
pub const MT_CPU_MS2: Self = _
MS2
sourcepub const MT_CPU_MASK: Self = _
pub const MT_CPU_MASK: Self = _
specific cpu bits
pub const M68K_CF_ISA_A_PLUS: Self = _
sourcepub const IA_64_VMS_COMCOD: Self = _
pub const IA_64_VMS_COMCOD: Self = _
Completion code.
pub const Z80_MACH_R800: Self = _
pub const IA_64_VMS_COMCOD_ABORT: Self = _
pub const PPC64_ABI: Self = _
pub const SH3: Self = _
pub const IQ2000_ALL_FLAGS: Self = _
pub const BFIN_PIC_FLAGS: Self = _
sourcepub const SPARCV9_MM: Self = _
pub const SPARCV9_MM: Self = _
memory model mask
pub const LOONGARCH_ABI_DOUBLE_FLOAT: Self = _
pub const MT_ALL_FLAGS: Self = _
sourcepub const FRV_GPR_32: Self = _
pub const FRV_GPR_32: Self = _
-mgpr-32
sourcepub const RH850_FPU_DOUBLE: Self = _
pub const RH850_FPU_DOUBLE: Self = _
sizeof(double) == 8.
pub const S390_HIGH_GPRS: Self = _
pub const MIPS_NOREORDER: Self = _
sourcepub const IQ2000_CPU_IQ2000: Self = _
pub const IQ2000_CPU_IQ2000: Self = _
default
pub const NIOS2_ARCH_R2: Self = _
pub const LM32_MACH: Self = _
sourcepub const MT_CPU_MRISC: Self = _
pub const MT_CPU_MRISC: Self = _
default
pub const ALPHA_32BIT: Self = _
pub const CRIS_UNDERSCORE: Self = _
sourcepub const VAX_NONPIC: Self = _
pub const VAX_NONPIC: Self = _
Object contains non-PIC code
sourcepub const RH850_DATA_ALIGN4: Self = _
pub const RH850_DATA_ALIGN4: Self = _
Aligned to 4-byte bounadries.
sourcepub const RH850_DOUBLE32: Self = _
pub const RH850_DOUBLE32: Self = _
32-bits in size.
sourcepub const RH850_FPU20: Self = _
pub const RH850_FPU20: Self = _
Set if [N]]M{ADD|SUB}F.S are used.
pub const RH850_SIMD: Self = _
pub const RH850_CACHE: Self = _
pub const RH850_MMU: Self = _
pub const RISCV_RVC: Self = _
pub const VISIUM_ARCH_MCM: Self = _
sourcepub const M68K_CF_ISA_A_NODIV: Self = _
pub const M68K_CF_ISA_A_NODIV: Self = _
ISA A except for div
pub const Z80_MACH_Z80: Self = _
pub const ARM_RELEXEC: Self = _
sourcepub const IA_64_TRAPNIL: Self = _
pub const IA_64_TRAPNIL: Self = _
Trap NIL pointer dereferences.
pub const IA_64_VMS_COMCOD_WARNING: Self = _
pub const SH1: Self = _
pub const OR1K_NODELAY: Self = _
sourcepub const SPARCV9_PSO: Self = _
pub const SPARCV9_PSO: Self = _
partial store ordering
pub const LOONGARCH_ABI_SOFT_FLOAT: Self = _
pub const C6000_REL: Self = _
sourcepub const FRV_GPR_64: Self = _
pub const FRV_GPR_64: Self = _
-mgpr-64
sourcepub const RH850_FPU_SINGLE: Self = _
pub const RH850_FPU_SINGLE: Self = _
sizeof(double) == 4.
pub const MIPS_PIC: Self = _
sourcepub const IQ2000_CPU_IQ10: Self = _
pub const IQ2000_CPU_IQ10: Self = _
IQ10
sourcepub const BFIN_FDPIC: Self = _
pub const BFIN_FDPIC: Self = _
-mfdpic
sourcepub const MT_CPU_MRISC2: Self = _
pub const MT_CPU_MRISC2: Self = _
MRISC2
pub const ALPHA_CANRELAX: Self = _
pub const CRIS_VARIANT_V32: Self = _
sourcepub const RH850_DATA_ALIGN8: Self = _
pub const RH850_DATA_ALIGN8: Self = _
Aligned to 8-byte bounadries.
sourcepub const RH850_DOUBLE64: Self = _
pub const RH850_DOUBLE64: Self = _
64-bits in size.
sourcepub const RH850_FPU30: Self = _
pub const RH850_FPU30: Self = _
Set if ADSF.D or ADDF.D is used.
pub const RISCV_FLOAT_ABI_SINGLE: Self = _
pub const VISIUM_ARCH_MCM24: Self = _
pub const M68K_CF_ISA_A: Self = _
pub const Z80_MACH_Z180: Self = _
pub const ARM_HASENTRY: Self = _
pub const IA_64_VMS_COMCOD_ERROR: Self = _
pub const SH2: Self = _
sourcepub const SPARCV9_RMO: Self = _
pub const SPARCV9_RMO: Self = _
relaxed store ordering
pub const LOONGARCH_ABI_SINGLE_FLOAT: Self = _
sourcepub const FRV_FPR_MASK: Self = _
pub const FRV_FPR_MASK: Self = _
mask for # of fprs
sourcepub const FRV_FPR_NONE: Self = _
pub const FRV_FPR_NONE: Self = _
-msoft-float
pub const SH4A: Self = _
sourcepub const FRV_FPR_32: Self = _
pub const FRV_FPR_32: Self = _
-mfpr-32
pub const MIPS_CPIC: Self = _
pub const CRIS_VARIANT_COMMON_V10_V32: Self = _
pub const RISCV_FLOAT_ABI_DOUBLE: Self = _
pub const VISIUM_ARCH_GR6: Self = _
sourcepub const M68K_CF_ISA_B_NOUSP: Self = _
pub const M68K_CF_ISA_B_NOUSP: Self = _
ISA_B except for USP
sourcepub const IA_64_VMS_LINKAGES: Self = _
pub const IA_64_VMS_LINKAGES: Self = _
Contains VMS linkages info.
pub const Z80_MACH_EZ80_Z80: Self = _
pub const ARM_INTERWORK: Self = _
sourcepub const ARM_SYMSARESORTED: Self = _
pub const ARM_SYMSARESORTED: Self = _
NB conflicts with EF_INTERWORK.
pub const NDS_ABI_SHIFT: Self = _
pub const SH_DSP: Self = _
sourcepub const FRV_FPR_64: Self = _
pub const FRV_FPR_64: Self = _
-mfpr-64
pub const MIPS_XGOT: Self = _
pub const RISCV_RVE: Self = _
pub const ARM_APCS_26: Self = _
sourcepub const ARM_DYNSYMSUSESEGIDX: Self = _
pub const ARM_DYNSYMSUSESEGIDX: Self = _
NB conflicts with EF_APCS26.
pub const SH3E: Self = _
sourcepub const FRV_DWORD_MASK: Self = _
pub const FRV_DWORD_MASK: Self = _
mask for dword support
pub const M68K_CF_MAC_MASK: Self = _
sourcepub const M68K_CF_EMAC_B: Self = _
pub const M68K_CF_EMAC_B: Self = _
EMAC_B
pub const AMDGPU_MACH_AMDGCN_GFX908: Self = _
sourcepub const FRV_DWORD_YES: Self = _
pub const FRV_DWORD_YES: Self = _
use double word insns
pub const MIPS_UCODE: Self = _
pub const PICOJAVA_NEWCALLS: Self = _
sourcepub const BFIN_CODE_IN_L1: Self = _
pub const BFIN_CODE_IN_L1: Self = _
–code-in-l1
pub const RISCV_TSO: Self = _
sourcepub const M68K_CF_MAC: Self = _
pub const M68K_CF_MAC: Self = _
MAC
sourcepub const M68HC12_MACH: Self = _
pub const M68HC12_MACH: Self = _
68HC12 microcontroller.
pub const ARM_APCS_FLOAT: Self = _
sourcepub const ARM_MAPSYMSFIRST: Self = _
pub const ARM_MAPSYMSFIRST: Self = _
NB conflicts with EF_APCS_FLOAT.
sourcepub const IA_64_ABI64: Self = _
pub const IA_64_ABI64: Self = _
64-bit ABI.
pub const SH4_NOFPU: Self = _
pub const MIPS_64BIT_WHIRL: Self = _
sourcepub const FRV_DWORD_NO: Self = _
pub const FRV_DWORD_NO: Self = _
don’t use double word insn
sourcepub const RH850_REGMODE22: Self = _
pub const RH850_REGMODE22: Self = _
Registers r15-r24 (inclusive) are not used.
pub const MIPS_ABI2: Self = _
sourcepub const PICOJAVA_GNUCALLS: Self = _
pub const PICOJAVA_GNUCALLS: Self = _
The (currently) non standard GNU calling convention
sourcepub const BFIN_DATA_IN_L1: Self = _
pub const BFIN_DATA_IN_L1: Self = _
–data-in-l1
sourcepub const M68K_CF_EMAC: Self = _
pub const M68K_CF_EMAC: Self = _
EMAC
sourcepub const M68HCS12_MACH: Self = _
pub const M68HCS12_MACH: Self = _
68HCS12 microcontroller.
pub const ARM_PIC: Self = _
sourcepub const IA_64_REDUCEDFP: Self = _
pub const IA_64_REDUCEDFP: Self = _
Only FP6-FP11 used.
pub const AMDGPU_MACH_AMDGCN_MIN: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX600: Self = _
sourcepub const FRV_DOUBLE: Self = _
pub const FRV_DOUBLE: Self = _
-mdouble
pub const RH850_REGMODE32: Self = _
sourcepub const M68K_CF_FLOAT: Self = _
pub const M68K_CF_FLOAT: Self = _
Has float insns
pub const LOONGARCH_OBJABI_V1: Self = _
sourcepub const ARM_ALIGN8: Self = _
pub const ARM_ALIGN8: Self = _
8-bit structure alignment is in use.
sourcepub const IA_64_CONS_GP: Self = _
pub const IA_64_CONS_GP: Self = _
gp as program wide constant.
pub const AMDGPU_MACH_AMDGCN_GFX940: Self = _
pub const MIPS_ABI_ON32: Self = _
sourcepub const RH850_GP_FIX: Self = _
pub const RH850_GP_FIX: Self = _
r4 is fixed.
pub const MIPS_32BITMODE: Self = _
sourcepub const MEP_LIBRARY: Self = _
pub const MEP_LIBRARY: Self = _
Built as a library
pub const ARC_PIC: Self = _
pub const XTENSA_XT_INSN: Self = _
sourcepub const VAX_DFLOAT: Self = _
pub const VAX_DFLOAT: Self = _
Object contains D-Float insn.
sourcepub const IA_64_ABSOLUTE: Self = _
pub const IA_64_ABSOLUTE: Self = _
Load at absolute addresses.
sourcepub const SPARC_32PLUS: Self = _
pub const SPARC_32PLUS: Self = _
generic V8+ features
pub const ARM_OLD_ABI: Self = _
pub const SH_PIC: Self = _
pub const AMDGPU_FEATURE_XNACK_V3: Self = _
pub const AMDGPU_FEATURE_XNACK_ANY_V4: Self = _
sourcepub const FRV_NON_PIC_RELOCS: Self = _
pub const FRV_NON_PIC_RELOCS: Self = _
used non pic safe relocs
sourcepub const RH850_GP_NOFIX: Self = _
pub const RH850_GP_NOFIX: Self = _
r4 is callee save.
pub const MIPS_FP64: Self = _
pub const XTENSA_XT_LIT: Self = _
sourcepub const VAX_GFLOAT: Self = _
pub const VAX_GFLOAT: Self = _
Object contains G-Float insn.
sourcepub const SPARC_SUN_US1: Self = _
pub const SPARC_SUN_US1: Self = _
Sun UltraSPARC1 extensions
pub const ARM_SOFT_FLOAT: Self = _
sourcepub const ARM_ABI_FLOAT_SOFT: Self = _
pub const ARM_ABI_FLOAT_SOFT: Self = _
NB conflicts with EF_ARM_SOFT_FLOAT.
pub const AMDGPU_FEATURE_SRAMECC_V3: Self = _
pub const AMDGPU_FEATURE_XNACK_OFF_V4: Self = _
sourcepub const FRV_MULADD: Self = _
pub const FRV_MULADD: Self = _
-mmuladd
sourcepub const RH850_EP_FIX: Self = _
pub const RH850_EP_FIX: Self = _
r30 is fixed.
pub const MIPS_NAN2008: Self = _
sourcepub const SPARC_HAL_R1: Self = _
pub const SPARC_HAL_R1: Self = _
HAL R1 extensions
pub const ARM_VFP_FLOAT: Self = _
sourcepub const ARM_ABI_FLOAT_HARD: Self = _
pub const ARM_ABI_FLOAT_HARD: Self = _
NB conflicts with EF_ARM_VFP_FLOAT.
pub const AMDGPU_FEATURE_SRAMECC_ANY_V4: Self = _
sourcepub const FRV_BIGPIC: Self = _
pub const FRV_BIGPIC: Self = _
-fPIC
sourcepub const RH850_EP_NOFIX: Self = _
pub const RH850_EP_NOFIX: Self = _
r30 is callee save.
sourcepub const SPARC_SUN_US3: Self = _
pub const SPARC_SUN_US3: Self = _
Sun UltraSPARCIII extensions
pub const ARM_MAVERICK_FLOAT: Self = _
pub const AMDGPU_FEATURE_SRAMECC_OFF_V4: Self = _
sourcepub const FRV_LIBPIC: Self = _
pub const FRV_LIBPIC: Self = _
-mlibrary-pic
sourcepub const RH850_TP_FIX: Self = _
pub const RH850_TP_FIX: Self = _
r5 is fixed.
sourcepub const RH850_TP_NOFIX: Self = _
pub const RH850_TP_NOFIX: Self = _
r5 is callee save.
sourcepub const FRV_NOPACK: Self = _
pub const FRV_NOPACK: Self = _
-mnopack
sourcepub const RH850_REG2_RESERVE: Self = _
pub const RH850_REG2_RESERVE: Self = _
r2 is fixed.
sourcepub const RH850_REG2_NORESERVE: Self = _
pub const RH850_REG2_NORESERVE: Self = _
r2 is callee saved.
pub const M68K_CFV4E: Self = _
sourcepub const I370_RELOCATABLE_LIB: Self = _
pub const I370_RELOCATABLE_LIB: Self = _
i370 -mrelocatable-lib flag
sourcepub const PPC_RELOCATABLE_LIB: Self = _
pub const PPC_RELOCATABLE_LIB: Self = _
PowerPC -mrelocatable-lib flag.
sourcepub const FRV_CPU_MASK: Self = _
pub const FRV_CPU_MASK: Self = _
specific cpu bits
sourcepub const IA_64_ARCH: Self = _
pub const IA_64_ARCH: Self = _
Arch. version mask.
sourcepub const MEP_CPU_MASK: Self = _
pub const MEP_CPU_MASK: Self = _
specific cpu bits
pub const ARM_EABIMASK: Self = _
sourcepub const FRV_CPU_GENERIC: Self = _
pub const FRV_CPU_GENERIC: Self = _
generic FRV
sourcepub const MEP_CPU_MEP: Self = _
pub const MEP_CPU_MEP: Self = _
generic MEP
pub const MEP_COP_NONE: Self = _
pub const ARM_EABI_UNKNOWN: Self = _
pub const NIOS2_ARCH_R1: Self = _
pub const CRIS_VARIANT_ANY_V0_V10: Self = _
sourcepub const MIPS_ARCH_1: Self = _
pub const MIPS_ARCH_1: Self = _
-mips1 code.
pub const RISCV_FLOAT_ABI_SOFT: Self = _
pub const IA_64_VMS_COMCOD_SUCCESS: Self = _
pub const NDS32_ELF_VERSION_SHIFT: Self = _
sourcepub const SH_UNKNOWN: Self = _
pub const SH_UNKNOWN: Self = _
For backwards compatibility.
sourcepub const M68HC11_GENERIC: Self = _
pub const M68HC11_GENERIC: Self = _
Generic 68HC12/backward compatibility.
sourcepub const SPARCV9_TSO: Self = _
pub const SPARCV9_TSO: Self = _
total store ordering
pub const AMDGPU_FEATURE_XNACK_UNSUPPORTED_V4: Self = _
pub const AMDGPU_FEATURE_SRAMECC_UNSUPPORTED_V4: Self = _
sourcepub const FRV_CPU_FR500: Self = _
pub const FRV_CPU_FR500: Self = _
FRV500
pub const M68K_M68000: Self = _
sourcepub const MEP_CPU_C2: Self = _
pub const MEP_CPU_C2: Self = _
MEP c2
pub const ARM_EABI_VER1: Self = _
sourcepub const IA_64_ARCHVER_1: Self = _
pub const IA_64_ARCHVER_1: Self = _
Arch. version level 1 compat.
sourcepub const FRV_CPU_FR300: Self = _
pub const FRV_CPU_FR300: Self = _
FRV300
pub const M68K_FIDO: Self = _
pub const MIPS_ARCH_ASE_MICROMIPS: Self = _
sourcepub const MEP_CPU_C3: Self = _
pub const MEP_CPU_C3: Self = _
MEP c3
pub const ARM_EABI_VER2: Self = _
sourcepub const FRV_CPU_SIMPLE: Self = _
pub const FRV_CPU_SIMPLE: Self = _
SIMPLE
pub const ARM_EABI_VER3: Self = _
sourcepub const FRV_CPU_TOMCAT: Self = _
pub const FRV_CPU_TOMCAT: Self = _
Tomcat, FR500 prototype
pub const MIPS_ARCH_ASE_M16: Self = _
sourcepub const MEP_CPU_C4: Self = _
pub const MEP_CPU_C4: Self = _
MEP c4
pub const ARM_EABI_VER4: Self = _
sourcepub const FRV_CPU_FR400: Self = _
pub const FRV_CPU_FR400: Self = _
FRV400
pub const ARM_EABI_VER5: Self = _
sourcepub const FRV_CPU_FR550: Self = _
pub const FRV_CPU_FR550: Self = _
FRV550
pub const FRV_CPU_FR405: Self = _
pub const FRV_CPU_FR450: Self = _
pub const MIPS_ARCH_ASE_MDMX: Self = _
sourcepub const MEP_CPU_C5: Self = _
pub const MEP_CPU_C5: Self = _
MEP c5
pub const FRV_PIC_FLAGS: Self = _
pub const FRV_ALL_FLAGS: Self = _
pub const MN10300_MACH: Self = _
pub const MIPS_MACH: Self = _
pub const H8_MACH: Self = _
pub const MEP_COP_MASK: Self = _
pub const V850_ARCH: Self = _
pub const MIPS_ARCH: Self = _
pub const RH850_ABI: Self = _
pub const NDS_ARCH: Self = _
pub const CSKY_ABIMASK: Self = _
pub const V800_850E3: Self = _
pub const PARISC_NO_KABP: Self = _
pub const RISCV_FLOAT_ABI: Self = _
pub const RISCV_FLOAT_ABI_QUAD: Self = _
pub const M68K_CF_ISA_C: Self = _
pub const Z80_MACH_Z80N: Self = _
pub const SH4AL_DSP: Self = _
pub const ARC_CPU_ARCV2HS: Self = _
pub const M68K_CPU32: Self = _
pub const CPU32: Self = _
pub const M68K_ARCH_MASK: Self = _
pub const M68K_CF_ISA_B: Self = _
pub const Z80_MACH_GBZ80: Self = _
pub const SH3_DSP: Self = _
pub const ARC_CPU_ARCV2EM: Self = _
sourcepub const M68K_CF_ISA_C_NODIV: Self = _
pub const M68K_CF_ISA_C_NODIV: Self = _
ISA C except for div
pub const LOONGARCH_ABI_MODIFIER_MASK: Self = _
pub const M68K_CF_MASK: Self = _
sourcepub const MEP_INDEX_MASK: Self = _
pub const MEP_INDEX_MASK: Self = _
Configuration index
pub const ARC_MACH_MSK: Self = _
pub const MSP430_MACH: Self = _
pub const Z80_MACH_MSK: Self = _
pub const AMDGPU_MACH: Self = _
sourcepub const I370_RELOCATABLE: Self = _
pub const I370_RELOCATABLE: Self = _
i370 -mrelocatable flag
pub const PARISC_TRAPNIL: Self = _
sourcepub const PPC_RELOCATABLE: Self = _
pub const PPC_RELOCATABLE: Self = _
PowerPC -mrelocatable flag.
pub const MEP_COP_AVC: Self = _
pub const SCORE_MACH: Self = _
pub const OMIT_PIC_FIXDD: Self = _
pub const M32R_INST: Self = _
pub const CSKY_OTHER: Self = _
pub const SCORE_PIC: Self = _
sourcepub const MIPS_ARCH_64R2: Self = _
pub const MIPS_ARCH_64R2: Self = _
MIPS64r2 code.
pub const SCORE_FIXDEP: Self = _
sourcepub const MIPS_ARCH_5: Self = _
pub const MIPS_ARCH_5: Self = _
-mips5 code.
pub const PARISC_EXT: Self = _
pub const MEP_COP_AVC2: Self = _
pub const PARISC_LSB: Self = _
pub const PARISC_WIDE: Self = _
pub const PARISC_LAZYSWAP: Self = _
pub const ARM_LE8: Self = _
pub const PARISC_ARCH: Self = _
pub const CSKY_PROCESSOR: Self = _
pub const M32R_ARCH: Self = _
sourcepub const MIPS_ARCH_4: Self = _
pub const MIPS_ARCH_4: Self = _
-mips4 code.
pub const MIPS_ARCH_ASE: Self = _
pub const MIPS_ABI: Self = _
sourcepub const MEP_CPU_H1: Self = _
pub const MEP_CPU_H1: Self = _
MEP h1
sourcepub const MIPS_ARCH_2: Self = _
pub const MIPS_ARCH_2: Self = _
-mips2 code.
pub const CSKY_ABIV1: Self = _
pub const MEP_COP_FMAX: Self = _
pub const MEP_COP_IVC2: Self = _
pub const MEP_ALL_FLAGS: Self = _
sourcepub const RL78_CPU_RL78: Self = _
pub const RL78_CPU_RL78: Self = _
FIXME: correct value?
sourcepub const RL78_CPU_MASK: Self = _
pub const RL78_CPU_MASK: Self = _
specific cpu bits.
sourcepub const M32C_CPU_MASK: Self = _
pub const M32C_CPU_MASK: Self = _
specific cpu bits
pub const RL78_ALL_FLAGS: Self = _
pub const AVR_MACH: Self = _
pub const M32C_ALL_FLAGS: Self = _
pub const Z80_MACH_EZ80_ADL: Self = _
sourcepub const SPARC_32PLUS_MASK: Self = _
pub const SPARC_32PLUS_MASK: Self = _
bits indicating V8+ type
sourcepub const SPARC_EXT_MASK: Self = _
pub const SPARC_EXT_MASK: Self = _
reserved for vendor extensions
sourcepub const SPARC_LEDATA: Self = _
pub const SPARC_LEDATA: Self = _
little endian data
pub const ARM_BE8: Self = _
pub const LOONGARCH_OBJABI_MASK: Self = _
pub const LOONGARCH_ABI_MASK: Self = _
sourcepub const M32C_CPU_M16C: Self = _
pub const M32C_CPU_M16C: Self = _
default
sourcepub const M32C_CPU_M32C: Self = _
pub const M32C_CPU_M32C: Self = _
m32c
pub const NDS_ARCH_SHIFT: Self = _
pub const NDS_INST: Self = _
pub const SH_MACH_MASK: Self = _
pub const SH4: Self = _
pub const SH2E: Self = _
pub const SH2A: Self = _
pub const SH4A_NOFPU: Self = _
pub const SH4_NOMMU_NOFPU: Self = _
pub const SH2A_NOFPU: Self = _
pub const SH3_NOMMU: Self = _
pub const SH2A_SH4_NOFPU: Self = _
pub const SH2A_SH3_NOFPU: Self = _
pub const SH2A_SH4: Self = _
pub const SH2A_SH3E: Self = _
pub const SH5: Self = _
pub const ARC_OSABI_MSK: Self = _
pub const ARC_ALL_MSK: Self = _
sourcepub const RX_CPU_MASK: Self = _
pub const RX_CPU_MASK: Self = _
specific cpu bits.
pub const RX_ALL_FLAGS: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX601: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX700: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX701: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX702: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX703: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX704: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX801: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX802: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX803: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX810: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX900: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX902: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX904: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX906: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX909: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX90C: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX1010: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX1011: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX1012: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX1030: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX1031: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX1032: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX1033: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX602: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX705: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX805: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX1035: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX1034: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX90A: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX1013: Self = _
pub const AMDGPU_MACH_AMDGCN_GFX1036: Self = _
pub const AMDGPU_FEATURE_XNACK_V4: Self = _
pub const AMDGPU_FEATURE_XNACK_ON_V4: Self = _
pub const AMDGPU_FEATURE_SRAMECC_V4: Self = _
pub const AMDGPU_FEATURE_SRAMECC_ON_V4: Self = _
pub const CRIS_VARIANT_MASK: Self = _
sourcepub const MIPS_ARCH_3: Self = _
pub const MIPS_ARCH_3: Self = _
-mips3 code.
pub const CSKY_ABIV2: Self = _
sourcepub const MIPS_ARCH_32: Self = _
pub const MIPS_ARCH_32: Self = _
MIPS32 code.
sourcepub const MIPS_ARCH_64: Self = _
pub const MIPS_ARCH_64: Self = _
MIPS64 code.
sourcepub const MIPS_ARCH_32R2: Self = _
pub const MIPS_ARCH_32R2: Self = _
MIPS32r2 code.
source§impl ElfFlags
impl ElfFlags
sourcepub const fn bits(&self) -> u32
pub const fn bits(&self) -> u32
Get the underlying bits value.
The returned value is exactly the bits set in this flags value.
sourcepub const fn from_bits(bits: u32) -> Option<Self>
pub const fn from_bits(bits: u32) -> Option<Self>
Convert from a bits value.
This method will return None
if any unknown bits are set.
sourcepub const fn from_bits_truncate(bits: u32) -> Self
pub const fn from_bits_truncate(bits: u32) -> Self
Convert from a bits value, unsetting any unknown bits.
sourcepub const fn from_bits_retain(bits: u32) -> Self
pub const fn from_bits_retain(bits: u32) -> Self
Convert from a bits value exactly.
sourcepub fn from_name(name: &str) -> Option<Self>
pub fn from_name(name: &str) -> Option<Self>
Get a flags value with the bits of a flag with the given name set.
This method will return None
if name
is empty or doesn’t
correspond to any named flag.
sourcepub const fn intersects(&self, other: Self) -> bool
pub const fn intersects(&self, other: Self) -> bool
Whether any set bits in a source flags value are also set in a target flags value.
sourcepub const fn contains(&self, other: Self) -> bool
pub const fn contains(&self, other: Self) -> bool
Whether all set bits in a source flags value are also set in a target flags value.
sourcepub fn remove(&mut self, other: Self)
pub fn remove(&mut self, other: Self)
The intersection of a source flags value with the complement of a target flags value (&!
).
This method is not equivalent to self & !other
when other
has unknown bits set.
remove
won’t truncate other
, but the !
operator will.
sourcepub fn toggle(&mut self, other: Self)
pub fn toggle(&mut self, other: Self)
The bitwise exclusive-or (^
) of the bits in two flags values.
sourcepub fn set(&mut self, other: Self, value: bool)
pub fn set(&mut self, other: Self, value: bool)
Call insert
when value
is true
or remove
when value
is false
.
sourcepub const fn intersection(self, other: Self) -> Self
pub const fn intersection(self, other: Self) -> Self
The bitwise and (&
) of the bits in two flags values.
sourcepub const fn union(self, other: Self) -> Self
pub const fn union(self, other: Self) -> Self
The bitwise or (|
) of the bits in two flags values.
sourcepub const fn difference(self, other: Self) -> Self
pub const fn difference(self, other: Self) -> Self
The intersection of a source flags value with the complement of a target flags value (&!
).
This method is not equivalent to self & !other
when other
has unknown bits set.
difference
won’t truncate other
, but the !
operator will.
sourcepub const fn symmetric_difference(self, other: Self) -> Self
pub const fn symmetric_difference(self, other: Self) -> Self
The bitwise exclusive-or (^
) of the bits in two flags values.
sourcepub const fn complement(self) -> Self
pub const fn complement(self) -> Self
The bitwise negation (!
) of the bits in a flags value, truncating the result.
source§impl ElfFlags
impl ElfFlags
sourcepub const fn iter(&self) -> Iter<ElfFlags>
pub const fn iter(&self) -> Iter<ElfFlags>
Yield a set of contained flags values.
Each yielded flags value will correspond to a defined named flag. Any unknown bits will be yielded together as a final flags value.
sourcepub const fn iter_names(&self) -> IterNames<ElfFlags>
pub const fn iter_names(&self) -> IterNames<ElfFlags>
Yield a set of contained named flags values.
This method is like iter
, except only yields bits in contained named flags.
Any unknown bits, or bits not corresponding to a contained flag will not be yielded.
Trait Implementations§
source§impl BinarySerde for ElfFlags
impl BinarySerde for ElfFlags
source§const SERIALIZED_SIZE: usize = 4usize
const SERIALIZED_SIZE: usize = 4usize
§type RecursiveArray = <<ElfFlags as Flags>::Bits as BinarySerde>::RecursiveArray
type RecursiveArray = <<ElfFlags as Flags>::Bits as BinarySerde>::RecursiveArray
Self::SERIALIZED_SIZE
.source§fn binary_serialize(&self, buf: &mut [u8], endianness: Endianness)
fn binary_serialize(&self, buf: &mut [u8], endianness: Endianness)
source§fn binary_deserialize(
buf: &[u8],
endianness: Endianness
) -> Result<Self, DeserializeError>
fn binary_deserialize( buf: &[u8], endianness: Endianness ) -> Result<Self, DeserializeError>
source§fn binary_serialize_to_array(
&self,
endianness: Endianness
) -> Self::RecursiveArray
fn binary_serialize_to_array( &self, endianness: Endianness ) -> Self::RecursiveArray
source§impl BitAndAssign for ElfFlags
impl BitAndAssign for ElfFlags
source§fn bitand_assign(&mut self, other: Self)
fn bitand_assign(&mut self, other: Self)
The bitwise and (&
) of the bits in two flags values.
source§impl BitOrAssign for ElfFlags
impl BitOrAssign for ElfFlags
source§fn bitor_assign(&mut self, other: Self)
fn bitor_assign(&mut self, other: Self)
The bitwise or (|
) of the bits in two flags values.
source§impl BitXorAssign for ElfFlags
impl BitXorAssign for ElfFlags
source§fn bitxor_assign(&mut self, other: Self)
fn bitxor_assign(&mut self, other: Self)
The bitwise exclusive-or (^
) of the bits in two flags values.
source§impl Extend<ElfFlags> for ElfFlags
impl Extend<ElfFlags> for ElfFlags
source§fn extend<T: IntoIterator<Item = Self>>(&mut self, iterator: T)
fn extend<T: IntoIterator<Item = Self>>(&mut self, iterator: T)
The bitwise or (|
) of the bits in each flags value.
source§fn extend_one(&mut self, item: A)
fn extend_one(&mut self, item: A)
extend_one
)source§fn extend_reserve(&mut self, additional: usize)
fn extend_reserve(&mut self, additional: usize)
extend_one
)source§impl Flags for ElfFlags
impl Flags for ElfFlags
source§fn from_bits_retain(bits: u32) -> ElfFlags
fn from_bits_retain(bits: u32) -> ElfFlags
source§fn from_bits_truncate(bits: Self::Bits) -> Self
fn from_bits_truncate(bits: Self::Bits) -> Self
source§fn from_name(name: &str) -> Option<Self>
fn from_name(name: &str) -> Option<Self>
source§fn iter_names(&self) -> IterNames<Self>
fn iter_names(&self) -> IterNames<Self>
source§fn intersects(&self, other: Self) -> boolwhere
Self: Sized,
fn intersects(&self, other: Self) -> boolwhere
Self: Sized,
source§fn contains(&self, other: Self) -> boolwhere
Self: Sized,
fn contains(&self, other: Self) -> boolwhere
Self: Sized,
source§fn insert(&mut self, other: Self)where
Self: Sized,
fn insert(&mut self, other: Self)where
Self: Sized,
|
) of the bits in two flags values.source§fn remove(&mut self, other: Self)where
Self: Sized,
fn remove(&mut self, other: Self)where
Self: Sized,
&!
). Read moresource§fn toggle(&mut self, other: Self)where
Self: Sized,
fn toggle(&mut self, other: Self)where
Self: Sized,
^
) of the bits in two flags values.source§fn intersection(self, other: Self) -> Self
fn intersection(self, other: Self) -> Self
&
) of the bits in two flags values.source§fn difference(self, other: Self) -> Self
fn difference(self, other: Self) -> Self
&!
). Read moresource§fn symmetric_difference(self, other: Self) -> Self
fn symmetric_difference(self, other: Self) -> Self
^
) of the bits in two flags values.source§fn complement(self) -> Self
fn complement(self) -> Self
!
) of the bits in a flags value, truncating the result.source§impl FromIterator<ElfFlags> for ElfFlags
impl FromIterator<ElfFlags> for ElfFlags
source§fn from_iter<T: IntoIterator<Item = Self>>(iterator: T) -> Self
fn from_iter<T: IntoIterator<Item = Self>>(iterator: T) -> Self
The bitwise or (|
) of the bits in each flags value.
source§impl IntoIterator for ElfFlags
impl IntoIterator for ElfFlags
source§impl PartialEq for ElfFlags
impl PartialEq for ElfFlags
source§impl Sub for ElfFlags
impl Sub for ElfFlags
source§impl SubAssign for ElfFlags
impl SubAssign for ElfFlags
source§fn sub_assign(&mut self, other: Self)
fn sub_assign(&mut self, other: Self)
The intersection of a source flags value with the complement of a target flags value (&!
).
This method is not equivalent to self & !other
when other
has unknown bits set.
difference
won’t truncate other
, but the !
operator will.