Enum efr32xg12p::prs::ch3_ctrl::EDSELR [] [src]

pub enum EDSELR {
    OFF,
    POSEDGE,
    NEGEDGE,
    BOTHEDGES,
}

Possible values of the field EDSEL

Variants

Signal is left as it is

A one HFCLK cycle pulse is generated for every positive edge of the incoming signal

A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal

A one HFCLK clock cycle pulse is generated for every edge of the incoming signal

Methods

impl EDSELR
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Value of the field as raw bits

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Checks if the value of the field is OFF

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Checks if the value of the field is POSEDGE

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Checks if the value of the field is NEGEDGE

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Checks if the value of the field is BOTHEDGES

Trait Implementations

impl Clone for EDSELR
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Returns a copy of the value. Read more

1.0.0
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Performs copy-assignment from source. Read more

impl Copy for EDSELR
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impl Debug for EDSELR
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Formats the value using the given formatter.

impl PartialEq for EDSELR
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This method tests for self and other values to be equal, and is used by ==. Read more

1.0.0
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This method tests for !=.