Struct efr32xg12p::msc::ramctrl::R
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[src]
pub struct R { /* fields omitted */ }Value read from the register
Methods
impl R[src]
fn bits(&self) -> u32[src]
Value of the register as raw bits
fn ramcacheen(&self) -> RAMCACHEENR[src]
Bit 0 - RAM CACHE Enable
fn ram1cacheen(&self) -> RAM1CACHEENR[src]
Bit 8 - RAM1 CACHE Enable
fn ram2cacheen(&self) -> RAM2CACHEENR[src]
Bit 16 - RAM2 CACHE Enable
fn ramseqcacheen(&self) -> RAMSEQCACHEENR[src]
Bit 19 - RAMSEQ CACHE Enable