Struct efr32xg12p::idac0::ctrl::R
[−]
[src]
pub struct R { /* fields omitted */ }Value read from the register
Methods
impl R[src]
fn bits(&self) -> u32[src]
Value of the register as raw bits
fn en(&self) -> ENR[src]
Bit 0 - Current DAC Enable
fn cursink(&self) -> CURSINKR[src]
Bit 1 - Current Sink Enable
fn minouttrans(&self) -> MINOUTTRANSR[src]
Bit 2 - Minimum Output Transition Enable
fn aportouten(&self) -> APORTOUTENR[src]
Bit 3 - APORT Output Enable
fn aportoutsel(&self) -> APORTOUTSELR[src]
Bits 4:11 - APORT Output Select
fn pwrsel(&self) -> PWRSELR[src]
Bit 12 - Power Select
fn em2delay(&self) -> EM2DELAYR[src]
Bit 13 - EM2 Delay
fn aportmasterdis(&self) -> APORTMASTERDISR[src]
Bit 14 - APORT Bus Master Disable
fn aportoutenprs(&self) -> APORTOUTENPRSR[src]
Bit 16 - PRS Controlled APORT Output Enable
fn mainouten(&self) -> MAINOUTENR[src]
Bit 18 - Output Enable
fn mainoutenprs(&self) -> MAINOUTENPRSR[src]
Bit 19 - PRS Controlled Main Pad Output Enable
fn prssel(&self) -> PRSSELR[src]
Bits 20:23 - IDAC Output Enable PRS channel Select