Struct efr32xg12p::adc0::singlectrlx::R
[−]
[src]
pub struct R { /* fields omitted */ }Value read from the register
Methods
impl R[src]
fn bits(&self) -> u32[src]
Value of the register as raw bits
fn vrefsel(&self) -> VREFSELR[src]
Bits 0:2 - Single Channel Reference Selection
fn vrefattfix(&self) -> VREFATTFIXR[src]
Bit 3 - Enable fixed scaling on VREF
fn vrefatt(&self) -> VREFATTR[src]
Bits 4:7 - Code for VREF attenuation factor when VREFSEL is 1, 2 or 5
fn vinatt(&self) -> VINATTR[src]
Bits 8:11 - Code for VIN attenuation factor.
fn dvl(&self) -> DVLR[src]
Bits 12:13 - Single Channel DV Level Select
fn fifoofact(&self) -> FIFOOFACTR[src]
Bit 14 - Single Channel FIFO Overflow Action
fn prsmode(&self) -> PRSMODER[src]
Bit 16 - Single Channel PRS Trigger Mode
fn prssel(&self) -> PRSSELR[src]
Bits 17:20 - Single Channel PRS Trigger Select
fn convstartdelay(&self) -> CONVSTARTDELAYR[src]
Bits 22:26 - Delay value for next conversion start if CONVSTARTDELAYEN is set.
fn convstartdelayen(&self) -> CONVSTARTDELAYENR[src]
Bit 27 - Enable delaying next conversion start
fn repdelay(&self) -> REPDELAYR[src]
Bits 29:31 - REPDELAY select for SINGLE REP mode