Struct efr32xg12p::lesense::idleconf::R
[−]
[src]
pub struct R { /* fields omitted */ }Value read from the register
Methods
impl R[src]
fn bits(&self) -> u32[src]
Value of the register as raw bits
fn ch0(&self) -> CH0R[src]
Bits 0:1 - Channel 0 idle phase configuration
fn ch1(&self) -> CH1R[src]
Bits 2:3 - Channel 1 idle phase configuration
fn ch2(&self) -> CH2R[src]
Bits 4:5 - Channel 2 idle phase configuration
fn ch3(&self) -> CH3R[src]
Bits 6:7 - Channel 3 idle phase configuration
fn ch4(&self) -> CH4R[src]
Bits 8:9 - Channel 4 idle phase configuration
fn ch5(&self) -> CH5R[src]
Bits 10:11 - Channel 5 idle phase configuration
fn ch6(&self) -> CH6R[src]
Bits 12:13 - Channel 6 idle phase configuration
fn ch7(&self) -> CH7R[src]
Bits 14:15 - Channel 7 idle phase configuration
fn ch8(&self) -> CH8R[src]
Bits 16:17 - Channel 8 idle phase configuration
fn ch9(&self) -> CH9R[src]
Bits 18:19 - Channel 9 idle phase configuration
fn ch10(&self) -> CH10R[src]
Bits 20:21 - Channel 10 idle phase configuration
fn ch11(&self) -> CH11R[src]
Bits 22:23 - Channel 11 idle phase configuration
fn ch12(&self) -> CH12R[src]
Bits 24:25 - Channel 12 idle phase configuration
fn ch13(&self) -> CH13R[src]
Bits 26:27 - Channel 13 idle phase configuration
fn ch14(&self) -> CH14R[src]
Bits 28:29 - Channel 14 idle phase configuration
fn ch15(&self) -> CH15R[src]
Bits 30:31 - Channel 15 idle phase configuration