1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::CH7_CTRL {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = "Possible values of the field `STRUCTTYPE`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum STRUCTTYPER {
48 #[doc = "DMA transfer structure type selected."]
49 TRANSFER,
50 #[doc = "Synchronization structure type selected."]
51 SYNCHRONIZE,
52 #[doc = "Write immediate value structure type selected."]
53 WRITE,
54 #[doc = r" Reserved"]
55 _Reserved(u8),
56}
57impl STRUCTTYPER {
58 #[doc = r" Value of the field as raw bits"]
59 #[inline]
60 pub fn bits(&self) -> u8 {
61 match *self {
62 STRUCTTYPER::TRANSFER => 0,
63 STRUCTTYPER::SYNCHRONIZE => 1,
64 STRUCTTYPER::WRITE => 2,
65 STRUCTTYPER::_Reserved(bits) => bits,
66 }
67 }
68 #[allow(missing_docs)]
69 #[doc(hidden)]
70 #[inline]
71 pub fn _from(value: u8) -> STRUCTTYPER {
72 match value {
73 0 => STRUCTTYPER::TRANSFER,
74 1 => STRUCTTYPER::SYNCHRONIZE,
75 2 => STRUCTTYPER::WRITE,
76 i => STRUCTTYPER::_Reserved(i),
77 }
78 }
79 #[doc = "Checks if the value of the field is `TRANSFER`"]
80 #[inline]
81 pub fn is_transfer(&self) -> bool {
82 *self == STRUCTTYPER::TRANSFER
83 }
84 #[doc = "Checks if the value of the field is `SYNCHRONIZE`"]
85 #[inline]
86 pub fn is_synchronize(&self) -> bool {
87 *self == STRUCTTYPER::SYNCHRONIZE
88 }
89 #[doc = "Checks if the value of the field is `WRITE`"]
90 #[inline]
91 pub fn is_write(&self) -> bool {
92 *self == STRUCTTYPER::WRITE
93 }
94}
95#[doc = r" Value of the field"]
96pub struct XFERCNTR {
97 bits: u16,
98}
99impl XFERCNTR {
100 #[doc = r" Value of the field as raw bits"]
101 #[inline]
102 pub fn bits(&self) -> u16 {
103 self.bits
104 }
105}
106#[doc = r" Value of the field"]
107pub struct BYTESWAPR {
108 bits: bool,
109}
110impl BYTESWAPR {
111 #[doc = r" Value of the field as raw bits"]
112 #[inline]
113 pub fn bit(&self) -> bool {
114 self.bits
115 }
116 #[doc = r" Returns `true` if the bit is clear (0)"]
117 #[inline]
118 pub fn bit_is_clear(&self) -> bool {
119 !self.bit()
120 }
121 #[doc = r" Returns `true` if the bit is set (1)"]
122 #[inline]
123 pub fn bit_is_set(&self) -> bool {
124 self.bit()
125 }
126}
127#[doc = "Possible values of the field `BLOCKSIZE`"]
128#[derive(Clone, Copy, Debug, PartialEq)]
129pub enum BLOCKSIZER {
130 #[doc = "One unit transfer per arbitration"]
131 UNIT1,
132 #[doc = "Two unit transfers per arbitration"]
133 UNIT2,
134 #[doc = "Three unit transfers per arbitration"]
135 UNIT3,
136 #[doc = "Four unit transfers per arbitration"]
137 UNIT4,
138 #[doc = "Six unit transfers per arbitration"]
139 UNIT6,
140 #[doc = "Eight unit transfers per arbitration"]
141 UNIT8,
142 #[doc = "Sixteen unit transfers per arbitration"]
143 UNIT16,
144 #[doc = "32 unit transfers per arbitration"]
145 UNIT32,
146 #[doc = "64 unit transfers per arbitration"]
147 UNIT64,
148 #[doc = "128 unit transfers per arbitration"]
149 UNIT128,
150 #[doc = "256 unit transfers per arbitration"]
151 UNIT256,
152 #[doc = "512 unit transfers per arbitration"]
153 UNIT512,
154 #[doc = "1024 unit transfers per arbitration"]
155 UNIT1024,
156 #[doc = "Transfer all units as specified by the XFRCNT field"]
157 ALL,
158 #[doc = r" Reserved"]
159 _Reserved(u8),
160}
161impl BLOCKSIZER {
162 #[doc = r" Value of the field as raw bits"]
163 #[inline]
164 pub fn bits(&self) -> u8 {
165 match *self {
166 BLOCKSIZER::UNIT1 => 0,
167 BLOCKSIZER::UNIT2 => 1,
168 BLOCKSIZER::UNIT3 => 2,
169 BLOCKSIZER::UNIT4 => 3,
170 BLOCKSIZER::UNIT6 => 4,
171 BLOCKSIZER::UNIT8 => 5,
172 BLOCKSIZER::UNIT16 => 7,
173 BLOCKSIZER::UNIT32 => 9,
174 BLOCKSIZER::UNIT64 => 10,
175 BLOCKSIZER::UNIT128 => 11,
176 BLOCKSIZER::UNIT256 => 12,
177 BLOCKSIZER::UNIT512 => 13,
178 BLOCKSIZER::UNIT1024 => 14,
179 BLOCKSIZER::ALL => 15,
180 BLOCKSIZER::_Reserved(bits) => bits,
181 }
182 }
183 #[allow(missing_docs)]
184 #[doc(hidden)]
185 #[inline]
186 pub fn _from(value: u8) -> BLOCKSIZER {
187 match value {
188 0 => BLOCKSIZER::UNIT1,
189 1 => BLOCKSIZER::UNIT2,
190 2 => BLOCKSIZER::UNIT3,
191 3 => BLOCKSIZER::UNIT4,
192 4 => BLOCKSIZER::UNIT6,
193 5 => BLOCKSIZER::UNIT8,
194 7 => BLOCKSIZER::UNIT16,
195 9 => BLOCKSIZER::UNIT32,
196 10 => BLOCKSIZER::UNIT64,
197 11 => BLOCKSIZER::UNIT128,
198 12 => BLOCKSIZER::UNIT256,
199 13 => BLOCKSIZER::UNIT512,
200 14 => BLOCKSIZER::UNIT1024,
201 15 => BLOCKSIZER::ALL,
202 i => BLOCKSIZER::_Reserved(i),
203 }
204 }
205 #[doc = "Checks if the value of the field is `UNIT1`"]
206 #[inline]
207 pub fn is_unit1(&self) -> bool {
208 *self == BLOCKSIZER::UNIT1
209 }
210 #[doc = "Checks if the value of the field is `UNIT2`"]
211 #[inline]
212 pub fn is_unit2(&self) -> bool {
213 *self == BLOCKSIZER::UNIT2
214 }
215 #[doc = "Checks if the value of the field is `UNIT3`"]
216 #[inline]
217 pub fn is_unit3(&self) -> bool {
218 *self == BLOCKSIZER::UNIT3
219 }
220 #[doc = "Checks if the value of the field is `UNIT4`"]
221 #[inline]
222 pub fn is_unit4(&self) -> bool {
223 *self == BLOCKSIZER::UNIT4
224 }
225 #[doc = "Checks if the value of the field is `UNIT6`"]
226 #[inline]
227 pub fn is_unit6(&self) -> bool {
228 *self == BLOCKSIZER::UNIT6
229 }
230 #[doc = "Checks if the value of the field is `UNIT8`"]
231 #[inline]
232 pub fn is_unit8(&self) -> bool {
233 *self == BLOCKSIZER::UNIT8
234 }
235 #[doc = "Checks if the value of the field is `UNIT16`"]
236 #[inline]
237 pub fn is_unit16(&self) -> bool {
238 *self == BLOCKSIZER::UNIT16
239 }
240 #[doc = "Checks if the value of the field is `UNIT32`"]
241 #[inline]
242 pub fn is_unit32(&self) -> bool {
243 *self == BLOCKSIZER::UNIT32
244 }
245 #[doc = "Checks if the value of the field is `UNIT64`"]
246 #[inline]
247 pub fn is_unit64(&self) -> bool {
248 *self == BLOCKSIZER::UNIT64
249 }
250 #[doc = "Checks if the value of the field is `UNIT128`"]
251 #[inline]
252 pub fn is_unit128(&self) -> bool {
253 *self == BLOCKSIZER::UNIT128
254 }
255 #[doc = "Checks if the value of the field is `UNIT256`"]
256 #[inline]
257 pub fn is_unit256(&self) -> bool {
258 *self == BLOCKSIZER::UNIT256
259 }
260 #[doc = "Checks if the value of the field is `UNIT512`"]
261 #[inline]
262 pub fn is_unit512(&self) -> bool {
263 *self == BLOCKSIZER::UNIT512
264 }
265 #[doc = "Checks if the value of the field is `UNIT1024`"]
266 #[inline]
267 pub fn is_unit1024(&self) -> bool {
268 *self == BLOCKSIZER::UNIT1024
269 }
270 #[doc = "Checks if the value of the field is `ALL`"]
271 #[inline]
272 pub fn is_all(&self) -> bool {
273 *self == BLOCKSIZER::ALL
274 }
275}
276#[doc = r" Value of the field"]
277pub struct DONEIFSENR {
278 bits: bool,
279}
280impl DONEIFSENR {
281 #[doc = r" Value of the field as raw bits"]
282 #[inline]
283 pub fn bit(&self) -> bool {
284 self.bits
285 }
286 #[doc = r" Returns `true` if the bit is clear (0)"]
287 #[inline]
288 pub fn bit_is_clear(&self) -> bool {
289 !self.bit()
290 }
291 #[doc = r" Returns `true` if the bit is set (1)"]
292 #[inline]
293 pub fn bit_is_set(&self) -> bool {
294 self.bit()
295 }
296}
297#[doc = r" Value of the field"]
298pub struct REQMODER {
299 bits: bool,
300}
301impl REQMODER {
302 #[doc = r" Value of the field as raw bits"]
303 #[inline]
304 pub fn bit(&self) -> bool {
305 self.bits
306 }
307 #[doc = r" Returns `true` if the bit is clear (0)"]
308 #[inline]
309 pub fn bit_is_clear(&self) -> bool {
310 !self.bit()
311 }
312 #[doc = r" Returns `true` if the bit is set (1)"]
313 #[inline]
314 pub fn bit_is_set(&self) -> bool {
315 self.bit()
316 }
317}
318#[doc = r" Value of the field"]
319pub struct DECLOOPCNTR {
320 bits: bool,
321}
322impl DECLOOPCNTR {
323 #[doc = r" Value of the field as raw bits"]
324 #[inline]
325 pub fn bit(&self) -> bool {
326 self.bits
327 }
328 #[doc = r" Returns `true` if the bit is clear (0)"]
329 #[inline]
330 pub fn bit_is_clear(&self) -> bool {
331 !self.bit()
332 }
333 #[doc = r" Returns `true` if the bit is set (1)"]
334 #[inline]
335 pub fn bit_is_set(&self) -> bool {
336 self.bit()
337 }
338}
339#[doc = r" Value of the field"]
340pub struct IGNORESREQR {
341 bits: bool,
342}
343impl IGNORESREQR {
344 #[doc = r" Value of the field as raw bits"]
345 #[inline]
346 pub fn bit(&self) -> bool {
347 self.bits
348 }
349 #[doc = r" Returns `true` if the bit is clear (0)"]
350 #[inline]
351 pub fn bit_is_clear(&self) -> bool {
352 !self.bit()
353 }
354 #[doc = r" Returns `true` if the bit is set (1)"]
355 #[inline]
356 pub fn bit_is_set(&self) -> bool {
357 self.bit()
358 }
359}
360#[doc = "Possible values of the field `SRCINC`"]
361#[derive(Clone, Copy, Debug, PartialEq)]
362pub enum SRCINCR {
363 #[doc = "Increment source address by one unit data size after each read"]
364 ONE,
365 #[doc = "Increment source address by two unit data sizes after each read"]
366 TWO,
367 #[doc = "Increment source address by four unit data sizes after each read"]
368 FOUR,
369 #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."]
370 NONE,
371}
372impl SRCINCR {
373 #[doc = r" Value of the field as raw bits"]
374 #[inline]
375 pub fn bits(&self) -> u8 {
376 match *self {
377 SRCINCR::ONE => 0,
378 SRCINCR::TWO => 1,
379 SRCINCR::FOUR => 2,
380 SRCINCR::NONE => 3,
381 }
382 }
383 #[allow(missing_docs)]
384 #[doc(hidden)]
385 #[inline]
386 pub fn _from(value: u8) -> SRCINCR {
387 match value {
388 0 => SRCINCR::ONE,
389 1 => SRCINCR::TWO,
390 2 => SRCINCR::FOUR,
391 3 => SRCINCR::NONE,
392 _ => unreachable!(),
393 }
394 }
395 #[doc = "Checks if the value of the field is `ONE`"]
396 #[inline]
397 pub fn is_one(&self) -> bool {
398 *self == SRCINCR::ONE
399 }
400 #[doc = "Checks if the value of the field is `TWO`"]
401 #[inline]
402 pub fn is_two(&self) -> bool {
403 *self == SRCINCR::TWO
404 }
405 #[doc = "Checks if the value of the field is `FOUR`"]
406 #[inline]
407 pub fn is_four(&self) -> bool {
408 *self == SRCINCR::FOUR
409 }
410 #[doc = "Checks if the value of the field is `NONE`"]
411 #[inline]
412 pub fn is_none(&self) -> bool {
413 *self == SRCINCR::NONE
414 }
415}
416#[doc = "Possible values of the field `SIZE`"]
417#[derive(Clone, Copy, Debug, PartialEq)]
418pub enum SIZER {
419 #[doc = "Each unit transfer is a byte"]
420 BYTE,
421 #[doc = "Each unit transfer is a half-word"]
422 HALFWORD,
423 #[doc = "Each unit transfer is a word"]
424 WORD,
425 #[doc = r" Reserved"]
426 _Reserved(u8),
427}
428impl SIZER {
429 #[doc = r" Value of the field as raw bits"]
430 #[inline]
431 pub fn bits(&self) -> u8 {
432 match *self {
433 SIZER::BYTE => 0,
434 SIZER::HALFWORD => 1,
435 SIZER::WORD => 2,
436 SIZER::_Reserved(bits) => bits,
437 }
438 }
439 #[allow(missing_docs)]
440 #[doc(hidden)]
441 #[inline]
442 pub fn _from(value: u8) -> SIZER {
443 match value {
444 0 => SIZER::BYTE,
445 1 => SIZER::HALFWORD,
446 2 => SIZER::WORD,
447 i => SIZER::_Reserved(i),
448 }
449 }
450 #[doc = "Checks if the value of the field is `BYTE`"]
451 #[inline]
452 pub fn is_byte(&self) -> bool {
453 *self == SIZER::BYTE
454 }
455 #[doc = "Checks if the value of the field is `HALFWORD`"]
456 #[inline]
457 pub fn is_halfword(&self) -> bool {
458 *self == SIZER::HALFWORD
459 }
460 #[doc = "Checks if the value of the field is `WORD`"]
461 #[inline]
462 pub fn is_word(&self) -> bool {
463 *self == SIZER::WORD
464 }
465}
466#[doc = "Possible values of the field `DSTINC`"]
467#[derive(Clone, Copy, Debug, PartialEq)]
468pub enum DSTINCR {
469 #[doc = "Increment destination address by one unit data size after each write"]
470 ONE,
471 #[doc = "Increment destination address by two unit data sizes after each write"]
472 TWO,
473 #[doc = "Increment destination address by four unit data sizes after each write"]
474 FOUR,
475 #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."]
476 NONE,
477}
478impl DSTINCR {
479 #[doc = r" Value of the field as raw bits"]
480 #[inline]
481 pub fn bits(&self) -> u8 {
482 match *self {
483 DSTINCR::ONE => 0,
484 DSTINCR::TWO => 1,
485 DSTINCR::FOUR => 2,
486 DSTINCR::NONE => 3,
487 }
488 }
489 #[allow(missing_docs)]
490 #[doc(hidden)]
491 #[inline]
492 pub fn _from(value: u8) -> DSTINCR {
493 match value {
494 0 => DSTINCR::ONE,
495 1 => DSTINCR::TWO,
496 2 => DSTINCR::FOUR,
497 3 => DSTINCR::NONE,
498 _ => unreachable!(),
499 }
500 }
501 #[doc = "Checks if the value of the field is `ONE`"]
502 #[inline]
503 pub fn is_one(&self) -> bool {
504 *self == DSTINCR::ONE
505 }
506 #[doc = "Checks if the value of the field is `TWO`"]
507 #[inline]
508 pub fn is_two(&self) -> bool {
509 *self == DSTINCR::TWO
510 }
511 #[doc = "Checks if the value of the field is `FOUR`"]
512 #[inline]
513 pub fn is_four(&self) -> bool {
514 *self == DSTINCR::FOUR
515 }
516 #[doc = "Checks if the value of the field is `NONE`"]
517 #[inline]
518 pub fn is_none(&self) -> bool {
519 *self == DSTINCR::NONE
520 }
521}
522#[doc = r" Value of the field"]
523pub struct SRCMODER {
524 bits: bool,
525}
526impl SRCMODER {
527 #[doc = r" Value of the field as raw bits"]
528 #[inline]
529 pub fn bit(&self) -> bool {
530 self.bits
531 }
532 #[doc = r" Returns `true` if the bit is clear (0)"]
533 #[inline]
534 pub fn bit_is_clear(&self) -> bool {
535 !self.bit()
536 }
537 #[doc = r" Returns `true` if the bit is set (1)"]
538 #[inline]
539 pub fn bit_is_set(&self) -> bool {
540 self.bit()
541 }
542}
543#[doc = r" Value of the field"]
544pub struct DSTMODER {
545 bits: bool,
546}
547impl DSTMODER {
548 #[doc = r" Value of the field as raw bits"]
549 #[inline]
550 pub fn bit(&self) -> bool {
551 self.bits
552 }
553 #[doc = r" Returns `true` if the bit is clear (0)"]
554 #[inline]
555 pub fn bit_is_clear(&self) -> bool {
556 !self.bit()
557 }
558 #[doc = r" Returns `true` if the bit is set (1)"]
559 #[inline]
560 pub fn bit_is_set(&self) -> bool {
561 self.bit()
562 }
563}
564#[doc = r" Proxy"]
565pub struct _STRUCTREQW<'a> {
566 w: &'a mut W,
567}
568impl<'a> _STRUCTREQW<'a> {
569 #[doc = r" Sets the field bit"]
570 pub fn set_bit(self) -> &'a mut W {
571 self.bit(true)
572 }
573 #[doc = r" Clears the field bit"]
574 pub fn clear_bit(self) -> &'a mut W {
575 self.bit(false)
576 }
577 #[doc = r" Writes raw bits to the field"]
578 #[inline]
579 pub fn bit(self, value: bool) -> &'a mut W {
580 const MASK: bool = true;
581 const OFFSET: u8 = 3;
582 self.w.bits &= !((MASK as u32) << OFFSET);
583 self.w.bits |= ((value & MASK) as u32) << OFFSET;
584 self.w
585 }
586}
587#[doc = r" Proxy"]
588pub struct _XFERCNTW<'a> {
589 w: &'a mut W,
590}
591impl<'a> _XFERCNTW<'a> {
592 #[doc = r" Writes raw bits to the field"]
593 #[inline]
594 pub unsafe fn bits(self, value: u16) -> &'a mut W {
595 const MASK: u16 = 2047;
596 const OFFSET: u8 = 4;
597 self.w.bits &= !((MASK as u32) << OFFSET);
598 self.w.bits |= ((value & MASK) as u32) << OFFSET;
599 self.w
600 }
601}
602#[doc = r" Proxy"]
603pub struct _BYTESWAPW<'a> {
604 w: &'a mut W,
605}
606impl<'a> _BYTESWAPW<'a> {
607 #[doc = r" Sets the field bit"]
608 pub fn set_bit(self) -> &'a mut W {
609 self.bit(true)
610 }
611 #[doc = r" Clears the field bit"]
612 pub fn clear_bit(self) -> &'a mut W {
613 self.bit(false)
614 }
615 #[doc = r" Writes raw bits to the field"]
616 #[inline]
617 pub fn bit(self, value: bool) -> &'a mut W {
618 const MASK: bool = true;
619 const OFFSET: u8 = 15;
620 self.w.bits &= !((MASK as u32) << OFFSET);
621 self.w.bits |= ((value & MASK) as u32) << OFFSET;
622 self.w
623 }
624}
625#[doc = "Values that can be written to the field `BLOCKSIZE`"]
626pub enum BLOCKSIZEW {
627 #[doc = "One unit transfer per arbitration"]
628 UNIT1,
629 #[doc = "Two unit transfers per arbitration"]
630 UNIT2,
631 #[doc = "Three unit transfers per arbitration"]
632 UNIT3,
633 #[doc = "Four unit transfers per arbitration"]
634 UNIT4,
635 #[doc = "Six unit transfers per arbitration"]
636 UNIT6,
637 #[doc = "Eight unit transfers per arbitration"]
638 UNIT8,
639 #[doc = "Sixteen unit transfers per arbitration"]
640 UNIT16,
641 #[doc = "32 unit transfers per arbitration"]
642 UNIT32,
643 #[doc = "64 unit transfers per arbitration"]
644 UNIT64,
645 #[doc = "128 unit transfers per arbitration"]
646 UNIT128,
647 #[doc = "256 unit transfers per arbitration"]
648 UNIT256,
649 #[doc = "512 unit transfers per arbitration"]
650 UNIT512,
651 #[doc = "1024 unit transfers per arbitration"]
652 UNIT1024,
653 #[doc = "Transfer all units as specified by the XFRCNT field"]
654 ALL,
655}
656impl BLOCKSIZEW {
657 #[allow(missing_docs)]
658 #[doc(hidden)]
659 #[inline]
660 pub fn _bits(&self) -> u8 {
661 match *self {
662 BLOCKSIZEW::UNIT1 => 0,
663 BLOCKSIZEW::UNIT2 => 1,
664 BLOCKSIZEW::UNIT3 => 2,
665 BLOCKSIZEW::UNIT4 => 3,
666 BLOCKSIZEW::UNIT6 => 4,
667 BLOCKSIZEW::UNIT8 => 5,
668 BLOCKSIZEW::UNIT16 => 7,
669 BLOCKSIZEW::UNIT32 => 9,
670 BLOCKSIZEW::UNIT64 => 10,
671 BLOCKSIZEW::UNIT128 => 11,
672 BLOCKSIZEW::UNIT256 => 12,
673 BLOCKSIZEW::UNIT512 => 13,
674 BLOCKSIZEW::UNIT1024 => 14,
675 BLOCKSIZEW::ALL => 15,
676 }
677 }
678}
679#[doc = r" Proxy"]
680pub struct _BLOCKSIZEW<'a> {
681 w: &'a mut W,
682}
683impl<'a> _BLOCKSIZEW<'a> {
684 #[doc = r" Writes `variant` to the field"]
685 #[inline]
686 pub fn variant(self, variant: BLOCKSIZEW) -> &'a mut W {
687 unsafe { self.bits(variant._bits()) }
688 }
689 #[doc = "One unit transfer per arbitration"]
690 #[inline]
691 pub fn unit1(self) -> &'a mut W {
692 self.variant(BLOCKSIZEW::UNIT1)
693 }
694 #[doc = "Two unit transfers per arbitration"]
695 #[inline]
696 pub fn unit2(self) -> &'a mut W {
697 self.variant(BLOCKSIZEW::UNIT2)
698 }
699 #[doc = "Three unit transfers per arbitration"]
700 #[inline]
701 pub fn unit3(self) -> &'a mut W {
702 self.variant(BLOCKSIZEW::UNIT3)
703 }
704 #[doc = "Four unit transfers per arbitration"]
705 #[inline]
706 pub fn unit4(self) -> &'a mut W {
707 self.variant(BLOCKSIZEW::UNIT4)
708 }
709 #[doc = "Six unit transfers per arbitration"]
710 #[inline]
711 pub fn unit6(self) -> &'a mut W {
712 self.variant(BLOCKSIZEW::UNIT6)
713 }
714 #[doc = "Eight unit transfers per arbitration"]
715 #[inline]
716 pub fn unit8(self) -> &'a mut W {
717 self.variant(BLOCKSIZEW::UNIT8)
718 }
719 #[doc = "Sixteen unit transfers per arbitration"]
720 #[inline]
721 pub fn unit16(self) -> &'a mut W {
722 self.variant(BLOCKSIZEW::UNIT16)
723 }
724 #[doc = "32 unit transfers per arbitration"]
725 #[inline]
726 pub fn unit32(self) -> &'a mut W {
727 self.variant(BLOCKSIZEW::UNIT32)
728 }
729 #[doc = "64 unit transfers per arbitration"]
730 #[inline]
731 pub fn unit64(self) -> &'a mut W {
732 self.variant(BLOCKSIZEW::UNIT64)
733 }
734 #[doc = "128 unit transfers per arbitration"]
735 #[inline]
736 pub fn unit128(self) -> &'a mut W {
737 self.variant(BLOCKSIZEW::UNIT128)
738 }
739 #[doc = "256 unit transfers per arbitration"]
740 #[inline]
741 pub fn unit256(self) -> &'a mut W {
742 self.variant(BLOCKSIZEW::UNIT256)
743 }
744 #[doc = "512 unit transfers per arbitration"]
745 #[inline]
746 pub fn unit512(self) -> &'a mut W {
747 self.variant(BLOCKSIZEW::UNIT512)
748 }
749 #[doc = "1024 unit transfers per arbitration"]
750 #[inline]
751 pub fn unit1024(self) -> &'a mut W {
752 self.variant(BLOCKSIZEW::UNIT1024)
753 }
754 #[doc = "Transfer all units as specified by the XFRCNT field"]
755 #[inline]
756 pub fn all(self) -> &'a mut W {
757 self.variant(BLOCKSIZEW::ALL)
758 }
759 #[doc = r" Writes raw bits to the field"]
760 #[inline]
761 pub unsafe fn bits(self, value: u8) -> &'a mut W {
762 const MASK: u8 = 15;
763 const OFFSET: u8 = 16;
764 self.w.bits &= !((MASK as u32) << OFFSET);
765 self.w.bits |= ((value & MASK) as u32) << OFFSET;
766 self.w
767 }
768}
769#[doc = r" Proxy"]
770pub struct _DONEIFSENW<'a> {
771 w: &'a mut W,
772}
773impl<'a> _DONEIFSENW<'a> {
774 #[doc = r" Sets the field bit"]
775 pub fn set_bit(self) -> &'a mut W {
776 self.bit(true)
777 }
778 #[doc = r" Clears the field bit"]
779 pub fn clear_bit(self) -> &'a mut W {
780 self.bit(false)
781 }
782 #[doc = r" Writes raw bits to the field"]
783 #[inline]
784 pub fn bit(self, value: bool) -> &'a mut W {
785 const MASK: bool = true;
786 const OFFSET: u8 = 20;
787 self.w.bits &= !((MASK as u32) << OFFSET);
788 self.w.bits |= ((value & MASK) as u32) << OFFSET;
789 self.w
790 }
791}
792#[doc = r" Proxy"]
793pub struct _REQMODEW<'a> {
794 w: &'a mut W,
795}
796impl<'a> _REQMODEW<'a> {
797 #[doc = r" Sets the field bit"]
798 pub fn set_bit(self) -> &'a mut W {
799 self.bit(true)
800 }
801 #[doc = r" Clears the field bit"]
802 pub fn clear_bit(self) -> &'a mut W {
803 self.bit(false)
804 }
805 #[doc = r" Writes raw bits to the field"]
806 #[inline]
807 pub fn bit(self, value: bool) -> &'a mut W {
808 const MASK: bool = true;
809 const OFFSET: u8 = 21;
810 self.w.bits &= !((MASK as u32) << OFFSET);
811 self.w.bits |= ((value & MASK) as u32) << OFFSET;
812 self.w
813 }
814}
815#[doc = r" Proxy"]
816pub struct _DECLOOPCNTW<'a> {
817 w: &'a mut W,
818}
819impl<'a> _DECLOOPCNTW<'a> {
820 #[doc = r" Sets the field bit"]
821 pub fn set_bit(self) -> &'a mut W {
822 self.bit(true)
823 }
824 #[doc = r" Clears the field bit"]
825 pub fn clear_bit(self) -> &'a mut W {
826 self.bit(false)
827 }
828 #[doc = r" Writes raw bits to the field"]
829 #[inline]
830 pub fn bit(self, value: bool) -> &'a mut W {
831 const MASK: bool = true;
832 const OFFSET: u8 = 22;
833 self.w.bits &= !((MASK as u32) << OFFSET);
834 self.w.bits |= ((value & MASK) as u32) << OFFSET;
835 self.w
836 }
837}
838#[doc = r" Proxy"]
839pub struct _IGNORESREQW<'a> {
840 w: &'a mut W,
841}
842impl<'a> _IGNORESREQW<'a> {
843 #[doc = r" Sets the field bit"]
844 pub fn set_bit(self) -> &'a mut W {
845 self.bit(true)
846 }
847 #[doc = r" Clears the field bit"]
848 pub fn clear_bit(self) -> &'a mut W {
849 self.bit(false)
850 }
851 #[doc = r" Writes raw bits to the field"]
852 #[inline]
853 pub fn bit(self, value: bool) -> &'a mut W {
854 const MASK: bool = true;
855 const OFFSET: u8 = 23;
856 self.w.bits &= !((MASK as u32) << OFFSET);
857 self.w.bits |= ((value & MASK) as u32) << OFFSET;
858 self.w
859 }
860}
861#[doc = "Values that can be written to the field `SRCINC`"]
862pub enum SRCINCW {
863 #[doc = "Increment source address by one unit data size after each read"]
864 ONE,
865 #[doc = "Increment source address by two unit data sizes after each read"]
866 TWO,
867 #[doc = "Increment source address by four unit data sizes after each read"]
868 FOUR,
869 #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."]
870 NONE,
871}
872impl SRCINCW {
873 #[allow(missing_docs)]
874 #[doc(hidden)]
875 #[inline]
876 pub fn _bits(&self) -> u8 {
877 match *self {
878 SRCINCW::ONE => 0,
879 SRCINCW::TWO => 1,
880 SRCINCW::FOUR => 2,
881 SRCINCW::NONE => 3,
882 }
883 }
884}
885#[doc = r" Proxy"]
886pub struct _SRCINCW<'a> {
887 w: &'a mut W,
888}
889impl<'a> _SRCINCW<'a> {
890 #[doc = r" Writes `variant` to the field"]
891 #[inline]
892 pub fn variant(self, variant: SRCINCW) -> &'a mut W {
893 {
894 self.bits(variant._bits())
895 }
896 }
897 #[doc = "Increment source address by one unit data size after each read"]
898 #[inline]
899 pub fn one(self) -> &'a mut W {
900 self.variant(SRCINCW::ONE)
901 }
902 #[doc = "Increment source address by two unit data sizes after each read"]
903 #[inline]
904 pub fn two(self) -> &'a mut W {
905 self.variant(SRCINCW::TWO)
906 }
907 #[doc = "Increment source address by four unit data sizes after each read"]
908 #[inline]
909 pub fn four(self) -> &'a mut W {
910 self.variant(SRCINCW::FOUR)
911 }
912 #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."]
913 #[inline]
914 pub fn none(self) -> &'a mut W {
915 self.variant(SRCINCW::NONE)
916 }
917 #[doc = r" Writes raw bits to the field"]
918 #[inline]
919 pub fn bits(self, value: u8) -> &'a mut W {
920 const MASK: u8 = 3;
921 const OFFSET: u8 = 24;
922 self.w.bits &= !((MASK as u32) << OFFSET);
923 self.w.bits |= ((value & MASK) as u32) << OFFSET;
924 self.w
925 }
926}
927#[doc = "Values that can be written to the field `SIZE`"]
928pub enum SIZEW {
929 #[doc = "Each unit transfer is a byte"]
930 BYTE,
931 #[doc = "Each unit transfer is a half-word"]
932 HALFWORD,
933 #[doc = "Each unit transfer is a word"]
934 WORD,
935}
936impl SIZEW {
937 #[allow(missing_docs)]
938 #[doc(hidden)]
939 #[inline]
940 pub fn _bits(&self) -> u8 {
941 match *self {
942 SIZEW::BYTE => 0,
943 SIZEW::HALFWORD => 1,
944 SIZEW::WORD => 2,
945 }
946 }
947}
948#[doc = r" Proxy"]
949pub struct _SIZEW<'a> {
950 w: &'a mut W,
951}
952impl<'a> _SIZEW<'a> {
953 #[doc = r" Writes `variant` to the field"]
954 #[inline]
955 pub fn variant(self, variant: SIZEW) -> &'a mut W {
956 unsafe { self.bits(variant._bits()) }
957 }
958 #[doc = "Each unit transfer is a byte"]
959 #[inline]
960 pub fn byte(self) -> &'a mut W {
961 self.variant(SIZEW::BYTE)
962 }
963 #[doc = "Each unit transfer is a half-word"]
964 #[inline]
965 pub fn halfword(self) -> &'a mut W {
966 self.variant(SIZEW::HALFWORD)
967 }
968 #[doc = "Each unit transfer is a word"]
969 #[inline]
970 pub fn word(self) -> &'a mut W {
971 self.variant(SIZEW::WORD)
972 }
973 #[doc = r" Writes raw bits to the field"]
974 #[inline]
975 pub unsafe fn bits(self, value: u8) -> &'a mut W {
976 const MASK: u8 = 3;
977 const OFFSET: u8 = 26;
978 self.w.bits &= !((MASK as u32) << OFFSET);
979 self.w.bits |= ((value & MASK) as u32) << OFFSET;
980 self.w
981 }
982}
983#[doc = "Values that can be written to the field `DSTINC`"]
984pub enum DSTINCW {
985 #[doc = "Increment destination address by one unit data size after each write"]
986 ONE,
987 #[doc = "Increment destination address by two unit data sizes after each write"]
988 TWO,
989 #[doc = "Increment destination address by four unit data sizes after each write"]
990 FOUR,
991 #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."]
992 NONE,
993}
994impl DSTINCW {
995 #[allow(missing_docs)]
996 #[doc(hidden)]
997 #[inline]
998 pub fn _bits(&self) -> u8 {
999 match *self {
1000 DSTINCW::ONE => 0,
1001 DSTINCW::TWO => 1,
1002 DSTINCW::FOUR => 2,
1003 DSTINCW::NONE => 3,
1004 }
1005 }
1006}
1007#[doc = r" Proxy"]
1008pub struct _DSTINCW<'a> {
1009 w: &'a mut W,
1010}
1011impl<'a> _DSTINCW<'a> {
1012 #[doc = r" Writes `variant` to the field"]
1013 #[inline]
1014 pub fn variant(self, variant: DSTINCW) -> &'a mut W {
1015 {
1016 self.bits(variant._bits())
1017 }
1018 }
1019 #[doc = "Increment destination address by one unit data size after each write"]
1020 #[inline]
1021 pub fn one(self) -> &'a mut W {
1022 self.variant(DSTINCW::ONE)
1023 }
1024 #[doc = "Increment destination address by two unit data sizes after each write"]
1025 #[inline]
1026 pub fn two(self) -> &'a mut W {
1027 self.variant(DSTINCW::TWO)
1028 }
1029 #[doc = "Increment destination address by four unit data sizes after each write"]
1030 #[inline]
1031 pub fn four(self) -> &'a mut W {
1032 self.variant(DSTINCW::FOUR)
1033 }
1034 #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."]
1035 #[inline]
1036 pub fn none(self) -> &'a mut W {
1037 self.variant(DSTINCW::NONE)
1038 }
1039 #[doc = r" Writes raw bits to the field"]
1040 #[inline]
1041 pub fn bits(self, value: u8) -> &'a mut W {
1042 const MASK: u8 = 3;
1043 const OFFSET: u8 = 28;
1044 self.w.bits &= !((MASK as u32) << OFFSET);
1045 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1046 self.w
1047 }
1048}
1049impl R {
1050 #[doc = r" Value of the register as raw bits"]
1051 #[inline]
1052 pub fn bits(&self) -> u32 {
1053 self.bits
1054 }
1055 #[doc = "Bits 0:1 - DMA Structure Type"]
1056 #[inline]
1057 pub fn structtype(&self) -> STRUCTTYPER {
1058 STRUCTTYPER::_from({
1059 const MASK: u8 = 3;
1060 const OFFSET: u8 = 0;
1061 ((self.bits >> OFFSET) & MASK as u32) as u8
1062 })
1063 }
1064 #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"]
1065 #[inline]
1066 pub fn xfercnt(&self) -> XFERCNTR {
1067 let bits = {
1068 const MASK: u16 = 2047;
1069 const OFFSET: u8 = 4;
1070 ((self.bits >> OFFSET) & MASK as u32) as u16
1071 };
1072 XFERCNTR { bits }
1073 }
1074 #[doc = "Bit 15 - Endian Byte Swap"]
1075 #[inline]
1076 pub fn byteswap(&self) -> BYTESWAPR {
1077 let bits = {
1078 const MASK: bool = true;
1079 const OFFSET: u8 = 15;
1080 ((self.bits >> OFFSET) & MASK as u32) != 0
1081 };
1082 BYTESWAPR { bits }
1083 }
1084 #[doc = "Bits 16:19 - Block Transfer Size"]
1085 #[inline]
1086 pub fn blocksize(&self) -> BLOCKSIZER {
1087 BLOCKSIZER::_from({
1088 const MASK: u8 = 15;
1089 const OFFSET: u8 = 16;
1090 ((self.bits >> OFFSET) & MASK as u32) as u8
1091 })
1092 }
1093 #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set Enable"]
1094 #[inline]
1095 pub fn doneifsen(&self) -> DONEIFSENR {
1096 let bits = {
1097 const MASK: bool = true;
1098 const OFFSET: u8 = 20;
1099 ((self.bits >> OFFSET) & MASK as u32) != 0
1100 };
1101 DONEIFSENR { bits }
1102 }
1103 #[doc = "Bit 21 - DMA Request Transfer Mode Select"]
1104 #[inline]
1105 pub fn reqmode(&self) -> REQMODER {
1106 let bits = {
1107 const MASK: bool = true;
1108 const OFFSET: u8 = 21;
1109 ((self.bits >> OFFSET) & MASK as u32) != 0
1110 };
1111 REQMODER { bits }
1112 }
1113 #[doc = "Bit 22 - Decrement Loop Count"]
1114 #[inline]
1115 pub fn decloopcnt(&self) -> DECLOOPCNTR {
1116 let bits = {
1117 const MASK: bool = true;
1118 const OFFSET: u8 = 22;
1119 ((self.bits >> OFFSET) & MASK as u32) != 0
1120 };
1121 DECLOOPCNTR { bits }
1122 }
1123 #[doc = "Bit 23 - Ignore Sreq"]
1124 #[inline]
1125 pub fn ignoresreq(&self) -> IGNORESREQR {
1126 let bits = {
1127 const MASK: bool = true;
1128 const OFFSET: u8 = 23;
1129 ((self.bits >> OFFSET) & MASK as u32) != 0
1130 };
1131 IGNORESREQR { bits }
1132 }
1133 #[doc = "Bits 24:25 - Source Address Increment Size"]
1134 #[inline]
1135 pub fn srcinc(&self) -> SRCINCR {
1136 SRCINCR::_from({
1137 const MASK: u8 = 3;
1138 const OFFSET: u8 = 24;
1139 ((self.bits >> OFFSET) & MASK as u32) as u8
1140 })
1141 }
1142 #[doc = "Bits 26:27 - Unit Data Transfer Size"]
1143 #[inline]
1144 pub fn size(&self) -> SIZER {
1145 SIZER::_from({
1146 const MASK: u8 = 3;
1147 const OFFSET: u8 = 26;
1148 ((self.bits >> OFFSET) & MASK as u32) as u8
1149 })
1150 }
1151 #[doc = "Bits 28:29 - Destination Address Increment Size"]
1152 #[inline]
1153 pub fn dstinc(&self) -> DSTINCR {
1154 DSTINCR::_from({
1155 const MASK: u8 = 3;
1156 const OFFSET: u8 = 28;
1157 ((self.bits >> OFFSET) & MASK as u32) as u8
1158 })
1159 }
1160 #[doc = "Bit 30 - Source Addressing Mode"]
1161 #[inline]
1162 pub fn srcmode(&self) -> SRCMODER {
1163 let bits = {
1164 const MASK: bool = true;
1165 const OFFSET: u8 = 30;
1166 ((self.bits >> OFFSET) & MASK as u32) != 0
1167 };
1168 SRCMODER { bits }
1169 }
1170 #[doc = "Bit 31 - Destination Addressing Mode"]
1171 #[inline]
1172 pub fn dstmode(&self) -> DSTMODER {
1173 let bits = {
1174 const MASK: bool = true;
1175 const OFFSET: u8 = 31;
1176 ((self.bits >> OFFSET) & MASK as u32) != 0
1177 };
1178 DSTMODER { bits }
1179 }
1180}
1181impl W {
1182 #[doc = r" Reset value of the register"]
1183 #[inline]
1184 pub fn reset_value() -> W {
1185 W { bits: 0 }
1186 }
1187 #[doc = r" Writes raw bits to the register"]
1188 #[inline]
1189 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1190 self.bits = bits;
1191 self
1192 }
1193 #[doc = "Bit 3 - Structure DMA Transfer Request"]
1194 #[inline]
1195 pub fn structreq(&mut self) -> _STRUCTREQW {
1196 _STRUCTREQW { w: self }
1197 }
1198 #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"]
1199 #[inline]
1200 pub fn xfercnt(&mut self) -> _XFERCNTW {
1201 _XFERCNTW { w: self }
1202 }
1203 #[doc = "Bit 15 - Endian Byte Swap"]
1204 #[inline]
1205 pub fn byteswap(&mut self) -> _BYTESWAPW {
1206 _BYTESWAPW { w: self }
1207 }
1208 #[doc = "Bits 16:19 - Block Transfer Size"]
1209 #[inline]
1210 pub fn blocksize(&mut self) -> _BLOCKSIZEW {
1211 _BLOCKSIZEW { w: self }
1212 }
1213 #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set Enable"]
1214 #[inline]
1215 pub fn doneifsen(&mut self) -> _DONEIFSENW {
1216 _DONEIFSENW { w: self }
1217 }
1218 #[doc = "Bit 21 - DMA Request Transfer Mode Select"]
1219 #[inline]
1220 pub fn reqmode(&mut self) -> _REQMODEW {
1221 _REQMODEW { w: self }
1222 }
1223 #[doc = "Bit 22 - Decrement Loop Count"]
1224 #[inline]
1225 pub fn decloopcnt(&mut self) -> _DECLOOPCNTW {
1226 _DECLOOPCNTW { w: self }
1227 }
1228 #[doc = "Bit 23 - Ignore Sreq"]
1229 #[inline]
1230 pub fn ignoresreq(&mut self) -> _IGNORESREQW {
1231 _IGNORESREQW { w: self }
1232 }
1233 #[doc = "Bits 24:25 - Source Address Increment Size"]
1234 #[inline]
1235 pub fn srcinc(&mut self) -> _SRCINCW {
1236 _SRCINCW { w: self }
1237 }
1238 #[doc = "Bits 26:27 - Unit Data Transfer Size"]
1239 #[inline]
1240 pub fn size(&mut self) -> _SIZEW {
1241 _SIZEW { w: self }
1242 }
1243 #[doc = "Bits 28:29 - Destination Address Increment Size"]
1244 #[inline]
1245 pub fn dstinc(&mut self) -> _DSTINCW {
1246 _DSTINCW { w: self }
1247 }
1248}