Struct efr32x12p::vdac0::status::R
[−]
[src]
pub struct R { /* fields omitted */ }Value read from the register
Methods
impl R[src]
fn bits(&self) -> u32[src]
Value of the register as raw bits
fn ch0ens(&self) -> CH0ENSR[src]
Bit 0 - Channel 0 Enabled Status
fn ch1ens(&self) -> CH1ENSR[src]
Bit 1 - Channel 1 Enabled Status
fn ch0bl(&self) -> CH0BLR[src]
Bit 2 - Channel 0 Buffer Level
fn ch1bl(&self) -> CH1BLR[src]
Bit 3 - Channel 1 Buffer Level
fn ch0warm(&self) -> CH0WARMR[src]
Bit 4 - Channel 0 Warm
fn ch1warm(&self) -> CH1WARMR[src]
Bit 5 - Channel 1 Warm
fn opa0aportconflict(&self) -> OPA0APORTCONFLICTR[src]
Bit 16 - OPA0 Bus Conflict Output
fn opa1aportconflict(&self) -> OPA1APORTCONFLICTR[src]
Bit 17 - OPA1 Bus Conflict Output
fn opa2aportconflict(&self) -> OPA2APORTCONFLICTR[src]
Bit 18 - OPA2 Bus Conflict Output
fn opa0ens(&self) -> OPA0ENSR[src]
Bit 20 - OPA0 Enabled Status
fn opa1ens(&self) -> OPA1ENSR[src]
Bit 21 - OPA1 Enabled Status
fn opa2ens(&self) -> OPA2ENSR[src]
Bit 22 - OPA2 Enabled Status
fn opa0warm(&self) -> OPA0WARMR[src]
Bit 24 - OPA0 Warm Status
fn opa1warm(&self) -> OPA1WARMR[src]
Bit 25 - OPA1 Warm Status
fn opa2warm(&self) -> OPA2WARMR[src]
Bit 26 - OPA2 Warm Status
fn opa0outvalid(&self) -> OPA0OUTVALIDR[src]
Bit 28 - OPA0 Output Valid Status
fn opa1outvalid(&self) -> OPA1OUTVALIDR[src]
Bit 29 - OPA1 Output Valid Status
fn opa2outvalid(&self) -> OPA2OUTVALIDR[src]
Bit 30 - OPA2 Output Valid Status