efm32zg210_pac/timer1/
route.rs

1#[doc = "Register `ROUTE` reader"]
2pub struct R(crate::R<ROUTE_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ROUTE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ROUTE_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ROUTE_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ROUTE` writer"]
17pub struct W(crate::W<ROUTE_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ROUTE_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ROUTE_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ROUTE_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CC0PEN` reader - CC Channel 0 Pin Enable"]
38pub type CC0PEN_R = crate::BitReader<bool>;
39#[doc = "Field `CC0PEN` writer - CC Channel 0 Pin Enable"]
40pub type CC0PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 0>;
41#[doc = "Field `CC1PEN` reader - CC Channel 1 Pin Enable"]
42pub type CC1PEN_R = crate::BitReader<bool>;
43#[doc = "Field `CC1PEN` writer - CC Channel 1 Pin Enable"]
44pub type CC1PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 1>;
45#[doc = "Field `CC2PEN` reader - CC Channel 2 Pin Enable"]
46pub type CC2PEN_R = crate::BitReader<bool>;
47#[doc = "Field `CC2PEN` writer - CC Channel 2 Pin Enable"]
48pub type CC2PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 2>;
49#[doc = "I/O Location\n\nValue on reset: 0"]
50#[derive(Clone, Copy, Debug, PartialEq)]
51#[repr(u8)]
52pub enum LOCATION_A {
53    #[doc = "0: Location 0"]
54    LOC0 = 0,
55    #[doc = "1: Location 1"]
56    LOC1 = 1,
57    #[doc = "2: Location 2"]
58    LOC2 = 2,
59    #[doc = "3: Location 3"]
60    LOC3 = 3,
61    #[doc = "4: Location 4"]
62    LOC4 = 4,
63    #[doc = "5: Location 5"]
64    LOC5 = 5,
65}
66impl From<LOCATION_A> for u8 {
67    #[inline(always)]
68    fn from(variant: LOCATION_A) -> Self {
69        variant as _
70    }
71}
72#[doc = "Field `LOCATION` reader - I/O Location"]
73pub type LOCATION_R = crate::FieldReader<u8, LOCATION_A>;
74impl LOCATION_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub fn variant(&self) -> Option<LOCATION_A> {
78        match self.bits {
79            0 => Some(LOCATION_A::LOC0),
80            1 => Some(LOCATION_A::LOC1),
81            2 => Some(LOCATION_A::LOC2),
82            3 => Some(LOCATION_A::LOC3),
83            4 => Some(LOCATION_A::LOC4),
84            5 => Some(LOCATION_A::LOC5),
85            _ => None,
86        }
87    }
88    #[doc = "Checks if the value of the field is `LOC0`"]
89    #[inline(always)]
90    pub fn is_loc0(&self) -> bool {
91        *self == LOCATION_A::LOC0
92    }
93    #[doc = "Checks if the value of the field is `LOC1`"]
94    #[inline(always)]
95    pub fn is_loc1(&self) -> bool {
96        *self == LOCATION_A::LOC1
97    }
98    #[doc = "Checks if the value of the field is `LOC2`"]
99    #[inline(always)]
100    pub fn is_loc2(&self) -> bool {
101        *self == LOCATION_A::LOC2
102    }
103    #[doc = "Checks if the value of the field is `LOC3`"]
104    #[inline(always)]
105    pub fn is_loc3(&self) -> bool {
106        *self == LOCATION_A::LOC3
107    }
108    #[doc = "Checks if the value of the field is `LOC4`"]
109    #[inline(always)]
110    pub fn is_loc4(&self) -> bool {
111        *self == LOCATION_A::LOC4
112    }
113    #[doc = "Checks if the value of the field is `LOC5`"]
114    #[inline(always)]
115    pub fn is_loc5(&self) -> bool {
116        *self == LOCATION_A::LOC5
117    }
118}
119#[doc = "Field `LOCATION` writer - I/O Location"]
120pub type LOCATION_W<'a> = crate::FieldWriter<'a, u32, ROUTE_SPEC, u8, LOCATION_A, 3, 16>;
121impl<'a> LOCATION_W<'a> {
122    #[doc = "Location 0"]
123    #[inline(always)]
124    pub fn loc0(self) -> &'a mut W {
125        self.variant(LOCATION_A::LOC0)
126    }
127    #[doc = "Location 1"]
128    #[inline(always)]
129    pub fn loc1(self) -> &'a mut W {
130        self.variant(LOCATION_A::LOC1)
131    }
132    #[doc = "Location 2"]
133    #[inline(always)]
134    pub fn loc2(self) -> &'a mut W {
135        self.variant(LOCATION_A::LOC2)
136    }
137    #[doc = "Location 3"]
138    #[inline(always)]
139    pub fn loc3(self) -> &'a mut W {
140        self.variant(LOCATION_A::LOC3)
141    }
142    #[doc = "Location 4"]
143    #[inline(always)]
144    pub fn loc4(self) -> &'a mut W {
145        self.variant(LOCATION_A::LOC4)
146    }
147    #[doc = "Location 5"]
148    #[inline(always)]
149    pub fn loc5(self) -> &'a mut W {
150        self.variant(LOCATION_A::LOC5)
151    }
152}
153impl R {
154    #[doc = "Bit 0 - CC Channel 0 Pin Enable"]
155    #[inline(always)]
156    pub fn cc0pen(&self) -> CC0PEN_R {
157        CC0PEN_R::new((self.bits & 1) != 0)
158    }
159    #[doc = "Bit 1 - CC Channel 1 Pin Enable"]
160    #[inline(always)]
161    pub fn cc1pen(&self) -> CC1PEN_R {
162        CC1PEN_R::new(((self.bits >> 1) & 1) != 0)
163    }
164    #[doc = "Bit 2 - CC Channel 2 Pin Enable"]
165    #[inline(always)]
166    pub fn cc2pen(&self) -> CC2PEN_R {
167        CC2PEN_R::new(((self.bits >> 2) & 1) != 0)
168    }
169    #[doc = "Bits 16:18 - I/O Location"]
170    #[inline(always)]
171    pub fn location(&self) -> LOCATION_R {
172        LOCATION_R::new(((self.bits >> 16) & 7) as u8)
173    }
174}
175impl W {
176    #[doc = "Bit 0 - CC Channel 0 Pin Enable"]
177    #[inline(always)]
178    pub fn cc0pen(&mut self) -> CC0PEN_W {
179        CC0PEN_W::new(self)
180    }
181    #[doc = "Bit 1 - CC Channel 1 Pin Enable"]
182    #[inline(always)]
183    pub fn cc1pen(&mut self) -> CC1PEN_W {
184        CC1PEN_W::new(self)
185    }
186    #[doc = "Bit 2 - CC Channel 2 Pin Enable"]
187    #[inline(always)]
188    pub fn cc2pen(&mut self) -> CC2PEN_W {
189        CC2PEN_W::new(self)
190    }
191    #[doc = "Bits 16:18 - I/O Location"]
192    #[inline(always)]
193    pub fn location(&mut self) -> LOCATION_W {
194        LOCATION_W::new(self)
195    }
196    #[doc = "Writes raw bits to the register."]
197    #[inline(always)]
198    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
199        self.0.bits(bits);
200        self
201    }
202}
203#[doc = "I/O Routing Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [route](index.html) module"]
204pub struct ROUTE_SPEC;
205impl crate::RegisterSpec for ROUTE_SPEC {
206    type Ux = u32;
207}
208#[doc = "`read()` method returns [route::R](R) reader structure"]
209impl crate::Readable for ROUTE_SPEC {
210    type Reader = R;
211}
212#[doc = "`write(|w| ..)` method takes [route::W](W) writer structure"]
213impl crate::Writable for ROUTE_SPEC {
214    type Writer = W;
215}
216#[doc = "`reset()` method sets ROUTE to value 0"]
217impl crate::Resettable for ROUTE_SPEC {
218    #[inline(always)]
219    fn reset_value() -> Self::Ux {
220        0
221    }
222}
efm32zg210_pac/timer1/route.rs

efm32zg210_pac/timer1/
route.rs
