efm32zg_pac/efm32zg108/usart1/
ifc.rs

1#[doc = "Register `IFC` writer"]
2pub struct W(crate::W<IFC_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IFC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IFC_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IFC_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `TXC` writer - Clear TX Complete Interrupt Flag"]
23pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
24#[doc = "Field `RXFULL` writer - Clear RX Buffer Full Interrupt Flag"]
25pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
26#[doc = "Field `RXOF` writer - Clear RX Overflow Interrupt Flag"]
27pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
28#[doc = "Field `RXUF` writer - Clear RX Underflow Interrupt Flag"]
29pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
30#[doc = "Field `TXOF` writer - Clear TX Overflow Interrupt Flag"]
31pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
32#[doc = "Field `TXUF` writer - Clear TX Underflow Interrupt Flag"]
33pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
34#[doc = "Field `PERR` writer - Clear Parity Error Interrupt Flag"]
35pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
36#[doc = "Field `FERR` writer - Clear Framing Error Interrupt Flag"]
37pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
38#[doc = "Field `MPAF` writer - Clear Multi-Processor Address Frame Interrupt Flag"]
39pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
40#[doc = "Field `SSM` writer - Clear Slave-Select In Master Mode Interrupt Flag"]
41pub type SSM_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
42#[doc = "Field `CCF` writer - Clear Collision Check Fail Interrupt Flag"]
43pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
44impl W {
45    #[doc = "Bit 0 - Clear TX Complete Interrupt Flag"]
46    #[inline(always)]
47    #[must_use]
48    pub fn txc(&mut self) -> TXC_W<0> {
49        TXC_W::new(self)
50    }
51    #[doc = "Bit 3 - Clear RX Buffer Full Interrupt Flag"]
52    #[inline(always)]
53    #[must_use]
54    pub fn rxfull(&mut self) -> RXFULL_W<3> {
55        RXFULL_W::new(self)
56    }
57    #[doc = "Bit 4 - Clear RX Overflow Interrupt Flag"]
58    #[inline(always)]
59    #[must_use]
60    pub fn rxof(&mut self) -> RXOF_W<4> {
61        RXOF_W::new(self)
62    }
63    #[doc = "Bit 5 - Clear RX Underflow Interrupt Flag"]
64    #[inline(always)]
65    #[must_use]
66    pub fn rxuf(&mut self) -> RXUF_W<5> {
67        RXUF_W::new(self)
68    }
69    #[doc = "Bit 6 - Clear TX Overflow Interrupt Flag"]
70    #[inline(always)]
71    #[must_use]
72    pub fn txof(&mut self) -> TXOF_W<6> {
73        TXOF_W::new(self)
74    }
75    #[doc = "Bit 7 - Clear TX Underflow Interrupt Flag"]
76    #[inline(always)]
77    #[must_use]
78    pub fn txuf(&mut self) -> TXUF_W<7> {
79        TXUF_W::new(self)
80    }
81    #[doc = "Bit 8 - Clear Parity Error Interrupt Flag"]
82    #[inline(always)]
83    #[must_use]
84    pub fn perr(&mut self) -> PERR_W<8> {
85        PERR_W::new(self)
86    }
87    #[doc = "Bit 9 - Clear Framing Error Interrupt Flag"]
88    #[inline(always)]
89    #[must_use]
90    pub fn ferr(&mut self) -> FERR_W<9> {
91        FERR_W::new(self)
92    }
93    #[doc = "Bit 10 - Clear Multi-Processor Address Frame Interrupt Flag"]
94    #[inline(always)]
95    #[must_use]
96    pub fn mpaf(&mut self) -> MPAF_W<10> {
97        MPAF_W::new(self)
98    }
99    #[doc = "Bit 11 - Clear Slave-Select In Master Mode Interrupt Flag"]
100    #[inline(always)]
101    #[must_use]
102    pub fn ssm(&mut self) -> SSM_W<11> {
103        SSM_W::new(self)
104    }
105    #[doc = "Bit 12 - Clear Collision Check Fail Interrupt Flag"]
106    #[inline(always)]
107    #[must_use]
108    pub fn ccf(&mut self) -> CCF_W<12> {
109        CCF_W::new(self)
110    }
111    #[doc = "Writes raw bits to the register."]
112    #[inline(always)]
113    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
114        self.0.bits(bits);
115        self
116    }
117}
118#[doc = "Interrupt Flag Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifc](index.html) module"]
119pub struct IFC_SPEC;
120impl crate::RegisterSpec for IFC_SPEC {
121    type Ux = u32;
122}
123#[doc = "`write(|w| ..)` method takes [ifc::W](W) writer structure"]
124impl crate::Writable for IFC_SPEC {
125    type Writer = W;
126    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
127    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
128}
129#[doc = "`reset()` method sets IFC to value 0"]
130impl crate::Resettable for IFC_SPEC {
131    const RESET_VALUE: Self::Ux = 0;
132}
efm32zg_pac/efm32zg108/usart1/ifc.rs

efm32zg_pac/efm32zg108/usart1/
ifc.rs
