efm32wg940_pac/usb/
gusbcfg.rs1#[doc = "Register `GUSBCFG` reader"]
2pub struct R(crate::R<GUSBCFG_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<GUSBCFG_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<GUSBCFG_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<GUSBCFG_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `GUSBCFG` writer"]
17pub struct W(crate::W<GUSBCFG_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<GUSBCFG_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<GUSBCFG_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<GUSBCFG_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `TOUTCAL` reader - Timeout Calibration host and device"]
38pub type TOUTCAL_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `TOUTCAL` writer - Timeout Calibration host and device"]
40pub type TOUTCAL_W<'a> = crate::FieldWriter<'a, u32, GUSBCFG_SPEC, u8, u8, 3, 0>;
41#[doc = "Field `FSINTF` reader - Full-Speed Serial Interface Select host and device"]
42pub type FSINTF_R = crate::BitReader<bool>;
43#[doc = "Field `FSINTF` writer - Full-Speed Serial Interface Select host and device"]
44pub type FSINTF_W<'a> = crate::BitWriter<'a, u32, GUSBCFG_SPEC, bool, 5>;
45#[doc = "Field `SRPCAP` reader - SRP-Capable host and device"]
46pub type SRPCAP_R = crate::BitReader<bool>;
47#[doc = "Field `SRPCAP` writer - SRP-Capable host and device"]
48pub type SRPCAP_W<'a> = crate::BitWriter<'a, u32, GUSBCFG_SPEC, bool, 8>;
49#[doc = "Field `HNPCAP` reader - HNP-Capable host and device"]
50pub type HNPCAP_R = crate::BitReader<bool>;
51#[doc = "Field `HNPCAP` writer - HNP-Capable host and device"]
52pub type HNPCAP_W<'a> = crate::BitWriter<'a, u32, GUSBCFG_SPEC, bool, 9>;
53#[doc = "Field `USBTRDTIM` reader - USB Turnaround Time device only"]
54pub type USBTRDTIM_R = crate::FieldReader<u8, u8>;
55#[doc = "Field `USBTRDTIM` writer - USB Turnaround Time device only"]
56pub type USBTRDTIM_W<'a> = crate::FieldWriter<'a, u32, GUSBCFG_SPEC, u8, u8, 4, 10>;
57#[doc = "Field `TERMSELDLPULSE` reader - TermSel DLine Pulsing Selection device only"]
58pub type TERMSELDLPULSE_R = crate::BitReader<bool>;
59#[doc = "Field `TERMSELDLPULSE` writer - TermSel DLine Pulsing Selection device only"]
60pub type TERMSELDLPULSE_W<'a> = crate::BitWriter<'a, u32, GUSBCFG_SPEC, bool, 22>;
61#[doc = "Field `TXENDDELAY` reader - Tx End Delay device only"]
62pub type TXENDDELAY_R = crate::BitReader<bool>;
63#[doc = "Field `TXENDDELAY` writer - Tx End Delay device only"]
64pub type TXENDDELAY_W<'a> = crate::BitWriter<'a, u32, GUSBCFG_SPEC, bool, 28>;
65#[doc = "Field `FORCEHSTMODE` reader - Force Host Mode host and device"]
66pub type FORCEHSTMODE_R = crate::BitReader<bool>;
67#[doc = "Field `FORCEHSTMODE` writer - Force Host Mode host and device"]
68pub type FORCEHSTMODE_W<'a> = crate::BitWriter<'a, u32, GUSBCFG_SPEC, bool, 29>;
69#[doc = "Field `FORCEDEVMODE` reader - Force Device Mode host and device"]
70pub type FORCEDEVMODE_R = crate::BitReader<bool>;
71#[doc = "Field `FORCEDEVMODE` writer - Force Device Mode host and device"]
72pub type FORCEDEVMODE_W<'a> = crate::BitWriter<'a, u32, GUSBCFG_SPEC, bool, 30>;
73#[doc = "Field `CORRUPTTXPKT` writer - Corrupt Tx packet host and device"]
74pub type CORRUPTTXPKT_W<'a> = crate::BitWriter<'a, u32, GUSBCFG_SPEC, bool, 31>;
75impl R {
76 #[doc = "Bits 0:2 - Timeout Calibration host and device"]
77 #[inline(always)]
78 pub fn toutcal(&self) -> TOUTCAL_R {
79 TOUTCAL_R::new((self.bits & 7) as u8)
80 }
81 #[doc = "Bit 5 - Full-Speed Serial Interface Select host and device"]
82 #[inline(always)]
83 pub fn fsintf(&self) -> FSINTF_R {
84 FSINTF_R::new(((self.bits >> 5) & 1) != 0)
85 }
86 #[doc = "Bit 8 - SRP-Capable host and device"]
87 #[inline(always)]
88 pub fn srpcap(&self) -> SRPCAP_R {
89 SRPCAP_R::new(((self.bits >> 8) & 1) != 0)
90 }
91 #[doc = "Bit 9 - HNP-Capable host and device"]
92 #[inline(always)]
93 pub fn hnpcap(&self) -> HNPCAP_R {
94 HNPCAP_R::new(((self.bits >> 9) & 1) != 0)
95 }
96 #[doc = "Bits 10:13 - USB Turnaround Time device only"]
97 #[inline(always)]
98 pub fn usbtrdtim(&self) -> USBTRDTIM_R {
99 USBTRDTIM_R::new(((self.bits >> 10) & 0x0f) as u8)
100 }
101 #[doc = "Bit 22 - TermSel DLine Pulsing Selection device only"]
102 #[inline(always)]
103 pub fn termseldlpulse(&self) -> TERMSELDLPULSE_R {
104 TERMSELDLPULSE_R::new(((self.bits >> 22) & 1) != 0)
105 }
106 #[doc = "Bit 28 - Tx End Delay device only"]
107 #[inline(always)]
108 pub fn txenddelay(&self) -> TXENDDELAY_R {
109 TXENDDELAY_R::new(((self.bits >> 28) & 1) != 0)
110 }
111 #[doc = "Bit 29 - Force Host Mode host and device"]
112 #[inline(always)]
113 pub fn forcehstmode(&self) -> FORCEHSTMODE_R {
114 FORCEHSTMODE_R::new(((self.bits >> 29) & 1) != 0)
115 }
116 #[doc = "Bit 30 - Force Device Mode host and device"]
117 #[inline(always)]
118 pub fn forcedevmode(&self) -> FORCEDEVMODE_R {
119 FORCEDEVMODE_R::new(((self.bits >> 30) & 1) != 0)
120 }
121}
122impl W {
123 #[doc = "Bits 0:2 - Timeout Calibration host and device"]
124 #[inline(always)]
125 pub fn toutcal(&mut self) -> TOUTCAL_W {
126 TOUTCAL_W::new(self)
127 }
128 #[doc = "Bit 5 - Full-Speed Serial Interface Select host and device"]
129 #[inline(always)]
130 pub fn fsintf(&mut self) -> FSINTF_W {
131 FSINTF_W::new(self)
132 }
133 #[doc = "Bit 8 - SRP-Capable host and device"]
134 #[inline(always)]
135 pub fn srpcap(&mut self) -> SRPCAP_W {
136 SRPCAP_W::new(self)
137 }
138 #[doc = "Bit 9 - HNP-Capable host and device"]
139 #[inline(always)]
140 pub fn hnpcap(&mut self) -> HNPCAP_W {
141 HNPCAP_W::new(self)
142 }
143 #[doc = "Bits 10:13 - USB Turnaround Time device only"]
144 #[inline(always)]
145 pub fn usbtrdtim(&mut self) -> USBTRDTIM_W {
146 USBTRDTIM_W::new(self)
147 }
148 #[doc = "Bit 22 - TermSel DLine Pulsing Selection device only"]
149 #[inline(always)]
150 pub fn termseldlpulse(&mut self) -> TERMSELDLPULSE_W {
151 TERMSELDLPULSE_W::new(self)
152 }
153 #[doc = "Bit 28 - Tx End Delay device only"]
154 #[inline(always)]
155 pub fn txenddelay(&mut self) -> TXENDDELAY_W {
156 TXENDDELAY_W::new(self)
157 }
158 #[doc = "Bit 29 - Force Host Mode host and device"]
159 #[inline(always)]
160 pub fn forcehstmode(&mut self) -> FORCEHSTMODE_W {
161 FORCEHSTMODE_W::new(self)
162 }
163 #[doc = "Bit 30 - Force Device Mode host and device"]
164 #[inline(always)]
165 pub fn forcedevmode(&mut self) -> FORCEDEVMODE_W {
166 FORCEDEVMODE_W::new(self)
167 }
168 #[doc = "Bit 31 - Corrupt Tx packet host and device"]
169 #[inline(always)]
170 pub fn corrupttxpkt(&mut self) -> CORRUPTTXPKT_W {
171 CORRUPTTXPKT_W::new(self)
172 }
173 #[doc = "Writes raw bits to the register."]
174 #[inline(always)]
175 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
176 self.0.bits(bits);
177 self
178 }
179}
180#[doc = "USB Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gusbcfg](index.html) module"]
181pub struct GUSBCFG_SPEC;
182impl crate::RegisterSpec for GUSBCFG_SPEC {
183 type Ux = u32;
184}
185#[doc = "`read()` method returns [gusbcfg::R](R) reader structure"]
186impl crate::Readable for GUSBCFG_SPEC {
187 type Reader = R;
188}
189#[doc = "`write(|w| ..)` method takes [gusbcfg::W](W) writer structure"]
190impl crate::Writable for GUSBCFG_SPEC {
191 type Writer = W;
192}
193#[doc = "`reset()` method sets GUSBCFG to value 0x1440"]
194impl crate::Resettable for GUSBCFG_SPEC {
195 #[inline(always)]
196 fn reset_value() -> Self::Ux {
197 0x1440
198 }
199}