efm32wg230_pac/dac0/
ch0ctrl.rs1#[doc = "Register `CH0CTRL` reader"]
2pub struct R(crate::R<CH0CTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CH0CTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CH0CTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CH0CTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CH0CTRL` writer"]
17pub struct W(crate::W<CH0CTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CH0CTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CH0CTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CH0CTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `EN` reader - Channel 0 Enable"]
38pub type EN_R = crate::BitReader<bool>;
39#[doc = "Field `EN` writer - Channel 0 Enable"]
40pub type EN_W<'a> = crate::BitWriter<'a, u32, CH0CTRL_SPEC, bool, 0>;
41#[doc = "Field `REFREN` reader - Channel 0 Automatic Refresh Enable"]
42pub type REFREN_R = crate::BitReader<bool>;
43#[doc = "Field `REFREN` writer - Channel 0 Automatic Refresh Enable"]
44pub type REFREN_W<'a> = crate::BitWriter<'a, u32, CH0CTRL_SPEC, bool, 1>;
45#[doc = "Field `PRSEN` reader - Channel 0 PRS Trigger Enable"]
46pub type PRSEN_R = crate::BitReader<bool>;
47#[doc = "Field `PRSEN` writer - Channel 0 PRS Trigger Enable"]
48pub type PRSEN_W<'a> = crate::BitWriter<'a, u32, CH0CTRL_SPEC, bool, 2>;
49#[doc = "Channel 0 PRS Trigger Select\n\nValue on reset: 0"]
50#[derive(Clone, Copy, Debug, PartialEq)]
51#[repr(u8)]
52pub enum PRSSEL_A {
53 #[doc = "0: PRS ch 0 triggers channel 0 conversion."]
54 PRSCH0 = 0,
55 #[doc = "1: PRS ch 1 triggers channel 0 conversion."]
56 PRSCH1 = 1,
57 #[doc = "2: PRS ch 2 triggers channel 0 conversion."]
58 PRSCH2 = 2,
59 #[doc = "3: PRS ch 3 triggers channel 0 conversion."]
60 PRSCH3 = 3,
61 #[doc = "4: PRS ch 4 triggers channel 0 conversion."]
62 PRSCH4 = 4,
63 #[doc = "5: PRS ch 5 triggers channel 0 conversion."]
64 PRSCH5 = 5,
65 #[doc = "6: PRS ch 6 triggers channel 0 conversion."]
66 PRSCH6 = 6,
67 #[doc = "7: PRS ch 7 triggers channel 0 conversion."]
68 PRSCH7 = 7,
69 #[doc = "8: PRS ch 8 triggers channel 0 conversion."]
70 PRSCH8 = 8,
71 #[doc = "9: PRS ch 9 triggers channel 0 conversion."]
72 PRSCH9 = 9,
73 #[doc = "10: PRS ch 10 triggers channel 0 conversion."]
74 PRSCH10 = 10,
75 #[doc = "11: PRS ch 11 triggers channel 0 conversion."]
76 PRSCH11 = 11,
77}
78impl From<PRSSEL_A> for u8 {
79 #[inline(always)]
80 fn from(variant: PRSSEL_A) -> Self {
81 variant as _
82 }
83}
84#[doc = "Field `PRSSEL` reader - Channel 0 PRS Trigger Select"]
85pub type PRSSEL_R = crate::FieldReader<u8, PRSSEL_A>;
86impl PRSSEL_R {
87 #[doc = "Get enumerated values variant"]
88 #[inline(always)]
89 pub fn variant(&self) -> Option<PRSSEL_A> {
90 match self.bits {
91 0 => Some(PRSSEL_A::PRSCH0),
92 1 => Some(PRSSEL_A::PRSCH1),
93 2 => Some(PRSSEL_A::PRSCH2),
94 3 => Some(PRSSEL_A::PRSCH3),
95 4 => Some(PRSSEL_A::PRSCH4),
96 5 => Some(PRSSEL_A::PRSCH5),
97 6 => Some(PRSSEL_A::PRSCH6),
98 7 => Some(PRSSEL_A::PRSCH7),
99 8 => Some(PRSSEL_A::PRSCH8),
100 9 => Some(PRSSEL_A::PRSCH9),
101 10 => Some(PRSSEL_A::PRSCH10),
102 11 => Some(PRSSEL_A::PRSCH11),
103 _ => None,
104 }
105 }
106 #[doc = "Checks if the value of the field is `PRSCH0`"]
107 #[inline(always)]
108 pub fn is_prsch0(&self) -> bool {
109 *self == PRSSEL_A::PRSCH0
110 }
111 #[doc = "Checks if the value of the field is `PRSCH1`"]
112 #[inline(always)]
113 pub fn is_prsch1(&self) -> bool {
114 *self == PRSSEL_A::PRSCH1
115 }
116 #[doc = "Checks if the value of the field is `PRSCH2`"]
117 #[inline(always)]
118 pub fn is_prsch2(&self) -> bool {
119 *self == PRSSEL_A::PRSCH2
120 }
121 #[doc = "Checks if the value of the field is `PRSCH3`"]
122 #[inline(always)]
123 pub fn is_prsch3(&self) -> bool {
124 *self == PRSSEL_A::PRSCH3
125 }
126 #[doc = "Checks if the value of the field is `PRSCH4`"]
127 #[inline(always)]
128 pub fn is_prsch4(&self) -> bool {
129 *self == PRSSEL_A::PRSCH4
130 }
131 #[doc = "Checks if the value of the field is `PRSCH5`"]
132 #[inline(always)]
133 pub fn is_prsch5(&self) -> bool {
134 *self == PRSSEL_A::PRSCH5
135 }
136 #[doc = "Checks if the value of the field is `PRSCH6`"]
137 #[inline(always)]
138 pub fn is_prsch6(&self) -> bool {
139 *self == PRSSEL_A::PRSCH6
140 }
141 #[doc = "Checks if the value of the field is `PRSCH7`"]
142 #[inline(always)]
143 pub fn is_prsch7(&self) -> bool {
144 *self == PRSSEL_A::PRSCH7
145 }
146 #[doc = "Checks if the value of the field is `PRSCH8`"]
147 #[inline(always)]
148 pub fn is_prsch8(&self) -> bool {
149 *self == PRSSEL_A::PRSCH8
150 }
151 #[doc = "Checks if the value of the field is `PRSCH9`"]
152 #[inline(always)]
153 pub fn is_prsch9(&self) -> bool {
154 *self == PRSSEL_A::PRSCH9
155 }
156 #[doc = "Checks if the value of the field is `PRSCH10`"]
157 #[inline(always)]
158 pub fn is_prsch10(&self) -> bool {
159 *self == PRSSEL_A::PRSCH10
160 }
161 #[doc = "Checks if the value of the field is `PRSCH11`"]
162 #[inline(always)]
163 pub fn is_prsch11(&self) -> bool {
164 *self == PRSSEL_A::PRSCH11
165 }
166}
167#[doc = "Field `PRSSEL` writer - Channel 0 PRS Trigger Select"]
168pub type PRSSEL_W<'a> = crate::FieldWriter<'a, u32, CH0CTRL_SPEC, u8, PRSSEL_A, 4, 4>;
169impl<'a> PRSSEL_W<'a> {
170 #[doc = "PRS ch 0 triggers channel 0 conversion."]
171 #[inline(always)]
172 pub fn prsch0(self) -> &'a mut W {
173 self.variant(PRSSEL_A::PRSCH0)
174 }
175 #[doc = "PRS ch 1 triggers channel 0 conversion."]
176 #[inline(always)]
177 pub fn prsch1(self) -> &'a mut W {
178 self.variant(PRSSEL_A::PRSCH1)
179 }
180 #[doc = "PRS ch 2 triggers channel 0 conversion."]
181 #[inline(always)]
182 pub fn prsch2(self) -> &'a mut W {
183 self.variant(PRSSEL_A::PRSCH2)
184 }
185 #[doc = "PRS ch 3 triggers channel 0 conversion."]
186 #[inline(always)]
187 pub fn prsch3(self) -> &'a mut W {
188 self.variant(PRSSEL_A::PRSCH3)
189 }
190 #[doc = "PRS ch 4 triggers channel 0 conversion."]
191 #[inline(always)]
192 pub fn prsch4(self) -> &'a mut W {
193 self.variant(PRSSEL_A::PRSCH4)
194 }
195 #[doc = "PRS ch 5 triggers channel 0 conversion."]
196 #[inline(always)]
197 pub fn prsch5(self) -> &'a mut W {
198 self.variant(PRSSEL_A::PRSCH5)
199 }
200 #[doc = "PRS ch 6 triggers channel 0 conversion."]
201 #[inline(always)]
202 pub fn prsch6(self) -> &'a mut W {
203 self.variant(PRSSEL_A::PRSCH6)
204 }
205 #[doc = "PRS ch 7 triggers channel 0 conversion."]
206 #[inline(always)]
207 pub fn prsch7(self) -> &'a mut W {
208 self.variant(PRSSEL_A::PRSCH7)
209 }
210 #[doc = "PRS ch 8 triggers channel 0 conversion."]
211 #[inline(always)]
212 pub fn prsch8(self) -> &'a mut W {
213 self.variant(PRSSEL_A::PRSCH8)
214 }
215 #[doc = "PRS ch 9 triggers channel 0 conversion."]
216 #[inline(always)]
217 pub fn prsch9(self) -> &'a mut W {
218 self.variant(PRSSEL_A::PRSCH9)
219 }
220 #[doc = "PRS ch 10 triggers channel 0 conversion."]
221 #[inline(always)]
222 pub fn prsch10(self) -> &'a mut W {
223 self.variant(PRSSEL_A::PRSCH10)
224 }
225 #[doc = "PRS ch 11 triggers channel 0 conversion."]
226 #[inline(always)]
227 pub fn prsch11(self) -> &'a mut W {
228 self.variant(PRSSEL_A::PRSCH11)
229 }
230}
231impl R {
232 #[doc = "Bit 0 - Channel 0 Enable"]
233 #[inline(always)]
234 pub fn en(&self) -> EN_R {
235 EN_R::new((self.bits & 1) != 0)
236 }
237 #[doc = "Bit 1 - Channel 0 Automatic Refresh Enable"]
238 #[inline(always)]
239 pub fn refren(&self) -> REFREN_R {
240 REFREN_R::new(((self.bits >> 1) & 1) != 0)
241 }
242 #[doc = "Bit 2 - Channel 0 PRS Trigger Enable"]
243 #[inline(always)]
244 pub fn prsen(&self) -> PRSEN_R {
245 PRSEN_R::new(((self.bits >> 2) & 1) != 0)
246 }
247 #[doc = "Bits 4:7 - Channel 0 PRS Trigger Select"]
248 #[inline(always)]
249 pub fn prssel(&self) -> PRSSEL_R {
250 PRSSEL_R::new(((self.bits >> 4) & 0x0f) as u8)
251 }
252}
253impl W {
254 #[doc = "Bit 0 - Channel 0 Enable"]
255 #[inline(always)]
256 pub fn en(&mut self) -> EN_W {
257 EN_W::new(self)
258 }
259 #[doc = "Bit 1 - Channel 0 Automatic Refresh Enable"]
260 #[inline(always)]
261 pub fn refren(&mut self) -> REFREN_W {
262 REFREN_W::new(self)
263 }
264 #[doc = "Bit 2 - Channel 0 PRS Trigger Enable"]
265 #[inline(always)]
266 pub fn prsen(&mut self) -> PRSEN_W {
267 PRSEN_W::new(self)
268 }
269 #[doc = "Bits 4:7 - Channel 0 PRS Trigger Select"]
270 #[inline(always)]
271 pub fn prssel(&mut self) -> PRSSEL_W {
272 PRSSEL_W::new(self)
273 }
274 #[doc = "Writes raw bits to the register."]
275 #[inline(always)]
276 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
277 self.0.bits(bits);
278 self
279 }
280}
281#[doc = "Channel 0 Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0ctrl](index.html) module"]
282pub struct CH0CTRL_SPEC;
283impl crate::RegisterSpec for CH0CTRL_SPEC {
284 type Ux = u32;
285}
286#[doc = "`read()` method returns [ch0ctrl::R](R) reader structure"]
287impl crate::Readable for CH0CTRL_SPEC {
288 type Reader = R;
289}
290#[doc = "`write(|w| ..)` method takes [ch0ctrl::W](W) writer structure"]
291impl crate::Writable for CH0CTRL_SPEC {
292 type Writer = W;
293}
294#[doc = "`reset()` method sets CH0CTRL to value 0"]
295impl crate::Resettable for CH0CTRL_SPEC {
296 #[inline(always)]
297 fn reset_value() -> Self::Ux {
298 0
299 }
300}