efm32wg230_pac/usart2/
route.rs

1#[doc = "Register `ROUTE` reader"]
2pub struct R(crate::R<ROUTE_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ROUTE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ROUTE_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ROUTE_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ROUTE` writer"]
17pub struct W(crate::W<ROUTE_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ROUTE_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ROUTE_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ROUTE_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `RXPEN` reader - RX Pin Enable"]
38pub type RXPEN_R = crate::BitReader<bool>;
39#[doc = "Field `RXPEN` writer - RX Pin Enable"]
40pub type RXPEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 0>;
41#[doc = "Field `TXPEN` reader - TX Pin Enable"]
42pub type TXPEN_R = crate::BitReader<bool>;
43#[doc = "Field `TXPEN` writer - TX Pin Enable"]
44pub type TXPEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 1>;
45#[doc = "Field `CSPEN` reader - CS Pin Enable"]
46pub type CSPEN_R = crate::BitReader<bool>;
47#[doc = "Field `CSPEN` writer - CS Pin Enable"]
48pub type CSPEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 2>;
49#[doc = "Field `CLKPEN` reader - CLK Pin Enable"]
50pub type CLKPEN_R = crate::BitReader<bool>;
51#[doc = "Field `CLKPEN` writer - CLK Pin Enable"]
52pub type CLKPEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 3>;
53#[doc = "I/O Location\n\nValue on reset: 0"]
54#[derive(Clone, Copy, Debug, PartialEq)]
55#[repr(u8)]
56pub enum LOCATION_A {
57    #[doc = "0: Location 0"]
58    LOC0 = 0,
59    #[doc = "1: Location 1"]
60    LOC1 = 1,
61    #[doc = "2: Location 2"]
62    LOC2 = 2,
63    #[doc = "3: Location 3"]
64    LOC3 = 3,
65    #[doc = "4: Location 4"]
66    LOC4 = 4,
67    #[doc = "5: Location 5"]
68    LOC5 = 5,
69}
70impl From<LOCATION_A> for u8 {
71    #[inline(always)]
72    fn from(variant: LOCATION_A) -> Self {
73        variant as _
74    }
75}
76#[doc = "Field `LOCATION` reader - I/O Location"]
77pub type LOCATION_R = crate::FieldReader<u8, LOCATION_A>;
78impl LOCATION_R {
79    #[doc = "Get enumerated values variant"]
80    #[inline(always)]
81    pub fn variant(&self) -> Option<LOCATION_A> {
82        match self.bits {
83            0 => Some(LOCATION_A::LOC0),
84            1 => Some(LOCATION_A::LOC1),
85            2 => Some(LOCATION_A::LOC2),
86            3 => Some(LOCATION_A::LOC3),
87            4 => Some(LOCATION_A::LOC4),
88            5 => Some(LOCATION_A::LOC5),
89            _ => None,
90        }
91    }
92    #[doc = "Checks if the value of the field is `LOC0`"]
93    #[inline(always)]
94    pub fn is_loc0(&self) -> bool {
95        *self == LOCATION_A::LOC0
96    }
97    #[doc = "Checks if the value of the field is `LOC1`"]
98    #[inline(always)]
99    pub fn is_loc1(&self) -> bool {
100        *self == LOCATION_A::LOC1
101    }
102    #[doc = "Checks if the value of the field is `LOC2`"]
103    #[inline(always)]
104    pub fn is_loc2(&self) -> bool {
105        *self == LOCATION_A::LOC2
106    }
107    #[doc = "Checks if the value of the field is `LOC3`"]
108    #[inline(always)]
109    pub fn is_loc3(&self) -> bool {
110        *self == LOCATION_A::LOC3
111    }
112    #[doc = "Checks if the value of the field is `LOC4`"]
113    #[inline(always)]
114    pub fn is_loc4(&self) -> bool {
115        *self == LOCATION_A::LOC4
116    }
117    #[doc = "Checks if the value of the field is `LOC5`"]
118    #[inline(always)]
119    pub fn is_loc5(&self) -> bool {
120        *self == LOCATION_A::LOC5
121    }
122}
123#[doc = "Field `LOCATION` writer - I/O Location"]
124pub type LOCATION_W<'a> = crate::FieldWriter<'a, u32, ROUTE_SPEC, u8, LOCATION_A, 3, 8>;
125impl<'a> LOCATION_W<'a> {
126    #[doc = "Location 0"]
127    #[inline(always)]
128    pub fn loc0(self) -> &'a mut W {
129        self.variant(LOCATION_A::LOC0)
130    }
131    #[doc = "Location 1"]
132    #[inline(always)]
133    pub fn loc1(self) -> &'a mut W {
134        self.variant(LOCATION_A::LOC1)
135    }
136    #[doc = "Location 2"]
137    #[inline(always)]
138    pub fn loc2(self) -> &'a mut W {
139        self.variant(LOCATION_A::LOC2)
140    }
141    #[doc = "Location 3"]
142    #[inline(always)]
143    pub fn loc3(self) -> &'a mut W {
144        self.variant(LOCATION_A::LOC3)
145    }
146    #[doc = "Location 4"]
147    #[inline(always)]
148    pub fn loc4(self) -> &'a mut W {
149        self.variant(LOCATION_A::LOC4)
150    }
151    #[doc = "Location 5"]
152    #[inline(always)]
153    pub fn loc5(self) -> &'a mut W {
154        self.variant(LOCATION_A::LOC5)
155    }
156}
157impl R {
158    #[doc = "Bit 0 - RX Pin Enable"]
159    #[inline(always)]
160    pub fn rxpen(&self) -> RXPEN_R {
161        RXPEN_R::new((self.bits & 1) != 0)
162    }
163    #[doc = "Bit 1 - TX Pin Enable"]
164    #[inline(always)]
165    pub fn txpen(&self) -> TXPEN_R {
166        TXPEN_R::new(((self.bits >> 1) & 1) != 0)
167    }
168    #[doc = "Bit 2 - CS Pin Enable"]
169    #[inline(always)]
170    pub fn cspen(&self) -> CSPEN_R {
171        CSPEN_R::new(((self.bits >> 2) & 1) != 0)
172    }
173    #[doc = "Bit 3 - CLK Pin Enable"]
174    #[inline(always)]
175    pub fn clkpen(&self) -> CLKPEN_R {
176        CLKPEN_R::new(((self.bits >> 3) & 1) != 0)
177    }
178    #[doc = "Bits 8:10 - I/O Location"]
179    #[inline(always)]
180    pub fn location(&self) -> LOCATION_R {
181        LOCATION_R::new(((self.bits >> 8) & 7) as u8)
182    }
183}
184impl W {
185    #[doc = "Bit 0 - RX Pin Enable"]
186    #[inline(always)]
187    pub fn rxpen(&mut self) -> RXPEN_W {
188        RXPEN_W::new(self)
189    }
190    #[doc = "Bit 1 - TX Pin Enable"]
191    #[inline(always)]
192    pub fn txpen(&mut self) -> TXPEN_W {
193        TXPEN_W::new(self)
194    }
195    #[doc = "Bit 2 - CS Pin Enable"]
196    #[inline(always)]
197    pub fn cspen(&mut self) -> CSPEN_W {
198        CSPEN_W::new(self)
199    }
200    #[doc = "Bit 3 - CLK Pin Enable"]
201    #[inline(always)]
202    pub fn clkpen(&mut self) -> CLKPEN_W {
203        CLKPEN_W::new(self)
204    }
205    #[doc = "Bits 8:10 - I/O Location"]
206    #[inline(always)]
207    pub fn location(&mut self) -> LOCATION_W {
208        LOCATION_W::new(self)
209    }
210    #[doc = "Writes raw bits to the register."]
211    #[inline(always)]
212    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
213        self.0.bits(bits);
214        self
215    }
216}
217#[doc = "I/O Routing Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [route](index.html) module"]
218pub struct ROUTE_SPEC;
219impl crate::RegisterSpec for ROUTE_SPEC {
220    type Ux = u32;
221}
222#[doc = "`read()` method returns [route::R](R) reader structure"]
223impl crate::Readable for ROUTE_SPEC {
224    type Reader = R;
225}
226#[doc = "`write(|w| ..)` method takes [route::W](W) writer structure"]
227impl crate::Writable for ROUTE_SPEC {
228    type Writer = W;
229}
230#[doc = "`reset()` method sets ROUTE to value 0"]
231impl crate::Resettable for ROUTE_SPEC {
232    #[inline(always)]
233    fn reset_value() -> Self::Ux {
234        0
235    }
236}
efm32wg230_pac/usart2/route.rs

efm32wg230_pac/usart2/
route.rs
