efm32wg230_pac/lesense/
perctrl.rs

1#[doc = "Register `PERCTRL` reader"]
2pub struct R(crate::R<PERCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PERCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PERCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PERCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PERCTRL` writer"]
17pub struct W(crate::W<PERCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PERCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PERCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PERCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DACCH0DATA` reader - DAC CH0 data selection."]
38pub type DACCH0DATA_R = crate::BitReader<bool>;
39#[doc = "Field `DACCH0DATA` writer - DAC CH0 data selection."]
40pub type DACCH0DATA_W<'a> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, 0>;
41#[doc = "Field `DACCH1DATA` reader - DAC CH1 data selection."]
42pub type DACCH1DATA_R = crate::BitReader<bool>;
43#[doc = "Field `DACCH1DATA` writer - DAC CH1 data selection."]
44pub type DACCH1DATA_W<'a> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, 1>;
45#[doc = "DAC channel 0 conversion mode\n\nValue on reset: 0"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47#[repr(u8)]
48pub enum DACCH0CONV_A {
49    #[doc = "0: LESENSE does not control DAC CH0."]
50    DISABLE = 0,
51    #[doc = "1: DAC channel 0 is driven in continuous mode."]
52    CONTINUOUS = 1,
53    #[doc = "2: DAC channel 0 is driven in sample hold mode."]
54    SAMPLEHOLD = 2,
55    #[doc = "3: DAC channel 0 is driven in sample off mode."]
56    SAMPLEOFF = 3,
57}
58impl From<DACCH0CONV_A> for u8 {
59    #[inline(always)]
60    fn from(variant: DACCH0CONV_A) -> Self {
61        variant as _
62    }
63}
64#[doc = "Field `DACCH0CONV` reader - DAC channel 0 conversion mode"]
65pub type DACCH0CONV_R = crate::FieldReader<u8, DACCH0CONV_A>;
66impl DACCH0CONV_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> DACCH0CONV_A {
70        match self.bits {
71            0 => DACCH0CONV_A::DISABLE,
72            1 => DACCH0CONV_A::CONTINUOUS,
73            2 => DACCH0CONV_A::SAMPLEHOLD,
74            3 => DACCH0CONV_A::SAMPLEOFF,
75            _ => unreachable!(),
76        }
77    }
78    #[doc = "Checks if the value of the field is `DISABLE`"]
79    #[inline(always)]
80    pub fn is_disable(&self) -> bool {
81        *self == DACCH0CONV_A::DISABLE
82    }
83    #[doc = "Checks if the value of the field is `CONTINUOUS`"]
84    #[inline(always)]
85    pub fn is_continuous(&self) -> bool {
86        *self == DACCH0CONV_A::CONTINUOUS
87    }
88    #[doc = "Checks if the value of the field is `SAMPLEHOLD`"]
89    #[inline(always)]
90    pub fn is_samplehold(&self) -> bool {
91        *self == DACCH0CONV_A::SAMPLEHOLD
92    }
93    #[doc = "Checks if the value of the field is `SAMPLEOFF`"]
94    #[inline(always)]
95    pub fn is_sampleoff(&self) -> bool {
96        *self == DACCH0CONV_A::SAMPLEOFF
97    }
98}
99#[doc = "Field `DACCH0CONV` writer - DAC channel 0 conversion mode"]
100pub type DACCH0CONV_W<'a> = crate::FieldWriterSafe<'a, u32, PERCTRL_SPEC, u8, DACCH0CONV_A, 2, 2>;
101impl<'a> DACCH0CONV_W<'a> {
102    #[doc = "LESENSE does not control DAC CH0."]
103    #[inline(always)]
104    pub fn disable(self) -> &'a mut W {
105        self.variant(DACCH0CONV_A::DISABLE)
106    }
107    #[doc = "DAC channel 0 is driven in continuous mode."]
108    #[inline(always)]
109    pub fn continuous(self) -> &'a mut W {
110        self.variant(DACCH0CONV_A::CONTINUOUS)
111    }
112    #[doc = "DAC channel 0 is driven in sample hold mode."]
113    #[inline(always)]
114    pub fn samplehold(self) -> &'a mut W {
115        self.variant(DACCH0CONV_A::SAMPLEHOLD)
116    }
117    #[doc = "DAC channel 0 is driven in sample off mode."]
118    #[inline(always)]
119    pub fn sampleoff(self) -> &'a mut W {
120        self.variant(DACCH0CONV_A::SAMPLEOFF)
121    }
122}
123#[doc = "DAC channel 1 conversion mode\n\nValue on reset: 0"]
124#[derive(Clone, Copy, Debug, PartialEq)]
125#[repr(u8)]
126pub enum DACCH1CONV_A {
127    #[doc = "0: LESENSE does not control DAC CH1."]
128    DISABLE = 0,
129    #[doc = "1: DAC channel 1 is driven in continuous mode."]
130    CONTINUOUS = 1,
131    #[doc = "2: DAC channel 1 is driven in sample hold mode."]
132    SAMPLEHOLD = 2,
133    #[doc = "3: DAC channel 1 is driven in sample off mode."]
134    SAMPLEOFF = 3,
135}
136impl From<DACCH1CONV_A> for u8 {
137    #[inline(always)]
138    fn from(variant: DACCH1CONV_A) -> Self {
139        variant as _
140    }
141}
142#[doc = "Field `DACCH1CONV` reader - DAC channel 1 conversion mode"]
143pub type DACCH1CONV_R = crate::FieldReader<u8, DACCH1CONV_A>;
144impl DACCH1CONV_R {
145    #[doc = "Get enumerated values variant"]
146    #[inline(always)]
147    pub fn variant(&self) -> DACCH1CONV_A {
148        match self.bits {
149            0 => DACCH1CONV_A::DISABLE,
150            1 => DACCH1CONV_A::CONTINUOUS,
151            2 => DACCH1CONV_A::SAMPLEHOLD,
152            3 => DACCH1CONV_A::SAMPLEOFF,
153            _ => unreachable!(),
154        }
155    }
156    #[doc = "Checks if the value of the field is `DISABLE`"]
157    #[inline(always)]
158    pub fn is_disable(&self) -> bool {
159        *self == DACCH1CONV_A::DISABLE
160    }
161    #[doc = "Checks if the value of the field is `CONTINUOUS`"]
162    #[inline(always)]
163    pub fn is_continuous(&self) -> bool {
164        *self == DACCH1CONV_A::CONTINUOUS
165    }
166    #[doc = "Checks if the value of the field is `SAMPLEHOLD`"]
167    #[inline(always)]
168    pub fn is_samplehold(&self) -> bool {
169        *self == DACCH1CONV_A::SAMPLEHOLD
170    }
171    #[doc = "Checks if the value of the field is `SAMPLEOFF`"]
172    #[inline(always)]
173    pub fn is_sampleoff(&self) -> bool {
174        *self == DACCH1CONV_A::SAMPLEOFF
175    }
176}
177#[doc = "Field `DACCH1CONV` writer - DAC channel 1 conversion mode"]
178pub type DACCH1CONV_W<'a> = crate::FieldWriterSafe<'a, u32, PERCTRL_SPEC, u8, DACCH1CONV_A, 2, 4>;
179impl<'a> DACCH1CONV_W<'a> {
180    #[doc = "LESENSE does not control DAC CH1."]
181    #[inline(always)]
182    pub fn disable(self) -> &'a mut W {
183        self.variant(DACCH1CONV_A::DISABLE)
184    }
185    #[doc = "DAC channel 1 is driven in continuous mode."]
186    #[inline(always)]
187    pub fn continuous(self) -> &'a mut W {
188        self.variant(DACCH1CONV_A::CONTINUOUS)
189    }
190    #[doc = "DAC channel 1 is driven in sample hold mode."]
191    #[inline(always)]
192    pub fn samplehold(self) -> &'a mut W {
193        self.variant(DACCH1CONV_A::SAMPLEHOLD)
194    }
195    #[doc = "DAC channel 1 is driven in sample off mode."]
196    #[inline(always)]
197    pub fn sampleoff(self) -> &'a mut W {
198        self.variant(DACCH1CONV_A::SAMPLEOFF)
199    }
200}
201#[doc = "DAC channel 0 output mode\n\nValue on reset: 0"]
202#[derive(Clone, Copy, Debug, PartialEq)]
203#[repr(u8)]
204pub enum DACCH0OUT_A {
205    #[doc = "0: DAC CH0 output to pin and ACMP/ADC disabled"]
206    DISABLE = 0,
207    #[doc = "1: DAC CH0 output to pin enabled, output to ADC and ACMP disabled"]
208    PIN = 1,
209    #[doc = "2: DAC CH0 output to pin disabled, output to ADC and ACMP enabled"]
210    ADCACMP = 2,
211    #[doc = "3: DAC CH0 output to pin, ADC, and ACMP enabled."]
212    PINADCACMP = 3,
213}
214impl From<DACCH0OUT_A> for u8 {
215    #[inline(always)]
216    fn from(variant: DACCH0OUT_A) -> Self {
217        variant as _
218    }
219}
220#[doc = "Field `DACCH0OUT` reader - DAC channel 0 output mode"]
221pub type DACCH0OUT_R = crate::FieldReader<u8, DACCH0OUT_A>;
222impl DACCH0OUT_R {
223    #[doc = "Get enumerated values variant"]
224    #[inline(always)]
225    pub fn variant(&self) -> DACCH0OUT_A {
226        match self.bits {
227            0 => DACCH0OUT_A::DISABLE,
228            1 => DACCH0OUT_A::PIN,
229            2 => DACCH0OUT_A::ADCACMP,
230            3 => DACCH0OUT_A::PINADCACMP,
231            _ => unreachable!(),
232        }
233    }
234    #[doc = "Checks if the value of the field is `DISABLE`"]
235    #[inline(always)]
236    pub fn is_disable(&self) -> bool {
237        *self == DACCH0OUT_A::DISABLE
238    }
239    #[doc = "Checks if the value of the field is `PIN`"]
240    #[inline(always)]
241    pub fn is_pin(&self) -> bool {
242        *self == DACCH0OUT_A::PIN
243    }
244    #[doc = "Checks if the value of the field is `ADCACMP`"]
245    #[inline(always)]
246    pub fn is_adcacmp(&self) -> bool {
247        *self == DACCH0OUT_A::ADCACMP
248    }
249    #[doc = "Checks if the value of the field is `PINADCACMP`"]
250    #[inline(always)]
251    pub fn is_pinadcacmp(&self) -> bool {
252        *self == DACCH0OUT_A::PINADCACMP
253    }
254}
255#[doc = "Field `DACCH0OUT` writer - DAC channel 0 output mode"]
256pub type DACCH0OUT_W<'a> = crate::FieldWriterSafe<'a, u32, PERCTRL_SPEC, u8, DACCH0OUT_A, 2, 6>;
257impl<'a> DACCH0OUT_W<'a> {
258    #[doc = "DAC CH0 output to pin and ACMP/ADC disabled"]
259    #[inline(always)]
260    pub fn disable(self) -> &'a mut W {
261        self.variant(DACCH0OUT_A::DISABLE)
262    }
263    #[doc = "DAC CH0 output to pin enabled, output to ADC and ACMP disabled"]
264    #[inline(always)]
265    pub fn pin(self) -> &'a mut W {
266        self.variant(DACCH0OUT_A::PIN)
267    }
268    #[doc = "DAC CH0 output to pin disabled, output to ADC and ACMP enabled"]
269    #[inline(always)]
270    pub fn adcacmp(self) -> &'a mut W {
271        self.variant(DACCH0OUT_A::ADCACMP)
272    }
273    #[doc = "DAC CH0 output to pin, ADC, and ACMP enabled."]
274    #[inline(always)]
275    pub fn pinadcacmp(self) -> &'a mut W {
276        self.variant(DACCH0OUT_A::PINADCACMP)
277    }
278}
279#[doc = "DAC channel 1 output mode\n\nValue on reset: 0"]
280#[derive(Clone, Copy, Debug, PartialEq)]
281#[repr(u8)]
282pub enum DACCH1OUT_A {
283    #[doc = "0: DAC CH1 output to pin and ACMP/ADC disabled"]
284    DISABLE = 0,
285    #[doc = "1: DAC CH1 output to pin enabled, output to ADC and ACMP disabled"]
286    PIN = 1,
287    #[doc = "2: DAC CH1 output to pin disabled, output to ADC and ACMP enabled"]
288    ADCACMP = 2,
289    #[doc = "3: DAC CH1 output to pin, ADC, and ACMP enabled."]
290    PINADCACMP = 3,
291}
292impl From<DACCH1OUT_A> for u8 {
293    #[inline(always)]
294    fn from(variant: DACCH1OUT_A) -> Self {
295        variant as _
296    }
297}
298#[doc = "Field `DACCH1OUT` reader - DAC channel 1 output mode"]
299pub type DACCH1OUT_R = crate::FieldReader<u8, DACCH1OUT_A>;
300impl DACCH1OUT_R {
301    #[doc = "Get enumerated values variant"]
302    #[inline(always)]
303    pub fn variant(&self) -> DACCH1OUT_A {
304        match self.bits {
305            0 => DACCH1OUT_A::DISABLE,
306            1 => DACCH1OUT_A::PIN,
307            2 => DACCH1OUT_A::ADCACMP,
308            3 => DACCH1OUT_A::PINADCACMP,
309            _ => unreachable!(),
310        }
311    }
312    #[doc = "Checks if the value of the field is `DISABLE`"]
313    #[inline(always)]
314    pub fn is_disable(&self) -> bool {
315        *self == DACCH1OUT_A::DISABLE
316    }
317    #[doc = "Checks if the value of the field is `PIN`"]
318    #[inline(always)]
319    pub fn is_pin(&self) -> bool {
320        *self == DACCH1OUT_A::PIN
321    }
322    #[doc = "Checks if the value of the field is `ADCACMP`"]
323    #[inline(always)]
324    pub fn is_adcacmp(&self) -> bool {
325        *self == DACCH1OUT_A::ADCACMP
326    }
327    #[doc = "Checks if the value of the field is `PINADCACMP`"]
328    #[inline(always)]
329    pub fn is_pinadcacmp(&self) -> bool {
330        *self == DACCH1OUT_A::PINADCACMP
331    }
332}
333#[doc = "Field `DACCH1OUT` writer - DAC channel 1 output mode"]
334pub type DACCH1OUT_W<'a> = crate::FieldWriterSafe<'a, u32, PERCTRL_SPEC, u8, DACCH1OUT_A, 2, 8>;
335impl<'a> DACCH1OUT_W<'a> {
336    #[doc = "DAC CH1 output to pin and ACMP/ADC disabled"]
337    #[inline(always)]
338    pub fn disable(self) -> &'a mut W {
339        self.variant(DACCH1OUT_A::DISABLE)
340    }
341    #[doc = "DAC CH1 output to pin enabled, output to ADC and ACMP disabled"]
342    #[inline(always)]
343    pub fn pin(self) -> &'a mut W {
344        self.variant(DACCH1OUT_A::PIN)
345    }
346    #[doc = "DAC CH1 output to pin disabled, output to ADC and ACMP enabled"]
347    #[inline(always)]
348    pub fn adcacmp(self) -> &'a mut W {
349        self.variant(DACCH1OUT_A::ADCACMP)
350    }
351    #[doc = "DAC CH1 output to pin, ADC, and ACMP enabled."]
352    #[inline(always)]
353    pub fn pinadcacmp(self) -> &'a mut W {
354        self.variant(DACCH1OUT_A::PINADCACMP)
355    }
356}
357#[doc = "Field `DACPRESC` reader - DAC prescaler configuration."]
358pub type DACPRESC_R = crate::FieldReader<u8, u8>;
359#[doc = "Field `DACPRESC` writer - DAC prescaler configuration."]
360pub type DACPRESC_W<'a> = crate::FieldWriter<'a, u32, PERCTRL_SPEC, u8, u8, 5, 10>;
361#[doc = "Field `DACREF` reader - DAC bandgap reference used"]
362pub type DACREF_R = crate::BitReader<bool>;
363#[doc = "Field `DACREF` writer - DAC bandgap reference used"]
364pub type DACREF_W<'a> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, 18>;
365#[doc = "ACMP0 mode\n\nValue on reset: 0"]
366#[derive(Clone, Copy, Debug, PartialEq)]
367#[repr(u8)]
368pub enum ACMP0MODE_A {
369    #[doc = "0: LESENSE does not control ACMP0"]
370    DISABLE = 0,
371    #[doc = "1: LESENSE controls the input mux (POSSEL) of ACMP0"]
372    MUX = 1,
373    #[doc = "2: LESENSE controls the input mux (POSSEL) and the threshold value (VDDLEVEL) of ACMP0"]
374    MUXTHRES = 2,
375}
376impl From<ACMP0MODE_A> for u8 {
377    #[inline(always)]
378    fn from(variant: ACMP0MODE_A) -> Self {
379        variant as _
380    }
381}
382#[doc = "Field `ACMP0MODE` reader - ACMP0 mode"]
383pub type ACMP0MODE_R = crate::FieldReader<u8, ACMP0MODE_A>;
384impl ACMP0MODE_R {
385    #[doc = "Get enumerated values variant"]
386    #[inline(always)]
387    pub fn variant(&self) -> Option<ACMP0MODE_A> {
388        match self.bits {
389            0 => Some(ACMP0MODE_A::DISABLE),
390            1 => Some(ACMP0MODE_A::MUX),
391            2 => Some(ACMP0MODE_A::MUXTHRES),
392            _ => None,
393        }
394    }
395    #[doc = "Checks if the value of the field is `DISABLE`"]
396    #[inline(always)]
397    pub fn is_disable(&self) -> bool {
398        *self == ACMP0MODE_A::DISABLE
399    }
400    #[doc = "Checks if the value of the field is `MUX`"]
401    #[inline(always)]
402    pub fn is_mux(&self) -> bool {
403        *self == ACMP0MODE_A::MUX
404    }
405    #[doc = "Checks if the value of the field is `MUXTHRES`"]
406    #[inline(always)]
407    pub fn is_muxthres(&self) -> bool {
408        *self == ACMP0MODE_A::MUXTHRES
409    }
410}
411#[doc = "Field `ACMP0MODE` writer - ACMP0 mode"]
412pub type ACMP0MODE_W<'a> = crate::FieldWriter<'a, u32, PERCTRL_SPEC, u8, ACMP0MODE_A, 2, 20>;
413impl<'a> ACMP0MODE_W<'a> {
414    #[doc = "LESENSE does not control ACMP0"]
415    #[inline(always)]
416    pub fn disable(self) -> &'a mut W {
417        self.variant(ACMP0MODE_A::DISABLE)
418    }
419    #[doc = "LESENSE controls the input mux (POSSEL) of ACMP0"]
420    #[inline(always)]
421    pub fn mux(self) -> &'a mut W {
422        self.variant(ACMP0MODE_A::MUX)
423    }
424    #[doc = "LESENSE controls the input mux (POSSEL) and the threshold value (VDDLEVEL) of ACMP0"]
425    #[inline(always)]
426    pub fn muxthres(self) -> &'a mut W {
427        self.variant(ACMP0MODE_A::MUXTHRES)
428    }
429}
430#[doc = "ACMP1 mode\n\nValue on reset: 0"]
431#[derive(Clone, Copy, Debug, PartialEq)]
432#[repr(u8)]
433pub enum ACMP1MODE_A {
434    #[doc = "0: LESENSE does not control ACMP1"]
435    DISABLE = 0,
436    #[doc = "1: LESENSE controls the input mux (POSSEL) of ACMP1"]
437    MUX = 1,
438    #[doc = "2: LESENSE controls the input mux and the threshold value (VDDLEVEL) of ACMP1"]
439    MUXTHRES = 2,
440}
441impl From<ACMP1MODE_A> for u8 {
442    #[inline(always)]
443    fn from(variant: ACMP1MODE_A) -> Self {
444        variant as _
445    }
446}
447#[doc = "Field `ACMP1MODE` reader - ACMP1 mode"]
448pub type ACMP1MODE_R = crate::FieldReader<u8, ACMP1MODE_A>;
449impl ACMP1MODE_R {
450    #[doc = "Get enumerated values variant"]
451    #[inline(always)]
452    pub fn variant(&self) -> Option<ACMP1MODE_A> {
453        match self.bits {
454            0 => Some(ACMP1MODE_A::DISABLE),
455            1 => Some(ACMP1MODE_A::MUX),
456            2 => Some(ACMP1MODE_A::MUXTHRES),
457            _ => None,
458        }
459    }
460    #[doc = "Checks if the value of the field is `DISABLE`"]
461    #[inline(always)]
462    pub fn is_disable(&self) -> bool {
463        *self == ACMP1MODE_A::DISABLE
464    }
465    #[doc = "Checks if the value of the field is `MUX`"]
466    #[inline(always)]
467    pub fn is_mux(&self) -> bool {
468        *self == ACMP1MODE_A::MUX
469    }
470    #[doc = "Checks if the value of the field is `MUXTHRES`"]
471    #[inline(always)]
472    pub fn is_muxthres(&self) -> bool {
473        *self == ACMP1MODE_A::MUXTHRES
474    }
475}
476#[doc = "Field `ACMP1MODE` writer - ACMP1 mode"]
477pub type ACMP1MODE_W<'a> = crate::FieldWriter<'a, u32, PERCTRL_SPEC, u8, ACMP1MODE_A, 2, 22>;
478impl<'a> ACMP1MODE_W<'a> {
479    #[doc = "LESENSE does not control ACMP1"]
480    #[inline(always)]
481    pub fn disable(self) -> &'a mut W {
482        self.variant(ACMP1MODE_A::DISABLE)
483    }
484    #[doc = "LESENSE controls the input mux (POSSEL) of ACMP1"]
485    #[inline(always)]
486    pub fn mux(self) -> &'a mut W {
487        self.variant(ACMP1MODE_A::MUX)
488    }
489    #[doc = "LESENSE controls the input mux and the threshold value (VDDLEVEL) of ACMP1"]
490    #[inline(always)]
491    pub fn muxthres(self) -> &'a mut W {
492        self.variant(ACMP1MODE_A::MUXTHRES)
493    }
494}
495#[doc = "ACMP and DAC duty cycle mode\n\nValue on reset: 0"]
496#[derive(Clone, Copy, Debug, PartialEq)]
497#[repr(u8)]
498pub enum WARMUPMODE_A {
499    #[doc = "0: The analog comparators and DAC are shut down when LESENSE is idle"]
500    NORMAL = 0,
501    #[doc = "1: The analog comparators are kept powered up when LESENSE is idle"]
502    KEEPACMPWARM = 1,
503    #[doc = "2: The DAC is kept powered up when LESENSE is idle"]
504    KEEPDACWARM = 2,
505    #[doc = "3: The analog comparators and DAC are kept powered up when LESENSE is idle"]
506    KEEPACMPDACWARM = 3,
507}
508impl From<WARMUPMODE_A> for u8 {
509    #[inline(always)]
510    fn from(variant: WARMUPMODE_A) -> Self {
511        variant as _
512    }
513}
514#[doc = "Field `WARMUPMODE` reader - ACMP and DAC duty cycle mode"]
515pub type WARMUPMODE_R = crate::FieldReader<u8, WARMUPMODE_A>;
516impl WARMUPMODE_R {
517    #[doc = "Get enumerated values variant"]
518    #[inline(always)]
519    pub fn variant(&self) -> WARMUPMODE_A {
520        match self.bits {
521            0 => WARMUPMODE_A::NORMAL,
522            1 => WARMUPMODE_A::KEEPACMPWARM,
523            2 => WARMUPMODE_A::KEEPDACWARM,
524            3 => WARMUPMODE_A::KEEPACMPDACWARM,
525            _ => unreachable!(),
526        }
527    }
528    #[doc = "Checks if the value of the field is `NORMAL`"]
529    #[inline(always)]
530    pub fn is_normal(&self) -> bool {
531        *self == WARMUPMODE_A::NORMAL
532    }
533    #[doc = "Checks if the value of the field is `KEEPACMPWARM`"]
534    #[inline(always)]
535    pub fn is_keepacmpwarm(&self) -> bool {
536        *self == WARMUPMODE_A::KEEPACMPWARM
537    }
538    #[doc = "Checks if the value of the field is `KEEPDACWARM`"]
539    #[inline(always)]
540    pub fn is_keepdacwarm(&self) -> bool {
541        *self == WARMUPMODE_A::KEEPDACWARM
542    }
543    #[doc = "Checks if the value of the field is `KEEPACMPDACWARM`"]
544    #[inline(always)]
545    pub fn is_keepacmpdacwarm(&self) -> bool {
546        *self == WARMUPMODE_A::KEEPACMPDACWARM
547    }
548}
549#[doc = "Field `WARMUPMODE` writer - ACMP and DAC duty cycle mode"]
550pub type WARMUPMODE_W<'a> = crate::FieldWriterSafe<'a, u32, PERCTRL_SPEC, u8, WARMUPMODE_A, 2, 26>;
551impl<'a> WARMUPMODE_W<'a> {
552    #[doc = "The analog comparators and DAC are shut down when LESENSE is idle"]
553    #[inline(always)]
554    pub fn normal(self) -> &'a mut W {
555        self.variant(WARMUPMODE_A::NORMAL)
556    }
557    #[doc = "The analog comparators are kept powered up when LESENSE is idle"]
558    #[inline(always)]
559    pub fn keepacmpwarm(self) -> &'a mut W {
560        self.variant(WARMUPMODE_A::KEEPACMPWARM)
561    }
562    #[doc = "The DAC is kept powered up when LESENSE is idle"]
563    #[inline(always)]
564    pub fn keepdacwarm(self) -> &'a mut W {
565        self.variant(WARMUPMODE_A::KEEPDACWARM)
566    }
567    #[doc = "The analog comparators and DAC are kept powered up when LESENSE is idle"]
568    #[inline(always)]
569    pub fn keepacmpdacwarm(self) -> &'a mut W {
570        self.variant(WARMUPMODE_A::KEEPACMPDACWARM)
571    }
572}
573impl R {
574    #[doc = "Bit 0 - DAC CH0 data selection."]
575    #[inline(always)]
576    pub fn dacch0data(&self) -> DACCH0DATA_R {
577        DACCH0DATA_R::new((self.bits & 1) != 0)
578    }
579    #[doc = "Bit 1 - DAC CH1 data selection."]
580    #[inline(always)]
581    pub fn dacch1data(&self) -> DACCH1DATA_R {
582        DACCH1DATA_R::new(((self.bits >> 1) & 1) != 0)
583    }
584    #[doc = "Bits 2:3 - DAC channel 0 conversion mode"]
585    #[inline(always)]
586    pub fn dacch0conv(&self) -> DACCH0CONV_R {
587        DACCH0CONV_R::new(((self.bits >> 2) & 3) as u8)
588    }
589    #[doc = "Bits 4:5 - DAC channel 1 conversion mode"]
590    #[inline(always)]
591    pub fn dacch1conv(&self) -> DACCH1CONV_R {
592        DACCH1CONV_R::new(((self.bits >> 4) & 3) as u8)
593    }
594    #[doc = "Bits 6:7 - DAC channel 0 output mode"]
595    #[inline(always)]
596    pub fn dacch0out(&self) -> DACCH0OUT_R {
597        DACCH0OUT_R::new(((self.bits >> 6) & 3) as u8)
598    }
599    #[doc = "Bits 8:9 - DAC channel 1 output mode"]
600    #[inline(always)]
601    pub fn dacch1out(&self) -> DACCH1OUT_R {
602        DACCH1OUT_R::new(((self.bits >> 8) & 3) as u8)
603    }
604    #[doc = "Bits 10:14 - DAC prescaler configuration."]
605    #[inline(always)]
606    pub fn dacpresc(&self) -> DACPRESC_R {
607        DACPRESC_R::new(((self.bits >> 10) & 0x1f) as u8)
608    }
609    #[doc = "Bit 18 - DAC bandgap reference used"]
610    #[inline(always)]
611    pub fn dacref(&self) -> DACREF_R {
612        DACREF_R::new(((self.bits >> 18) & 1) != 0)
613    }
614    #[doc = "Bits 20:21 - ACMP0 mode"]
615    #[inline(always)]
616    pub fn acmp0mode(&self) -> ACMP0MODE_R {
617        ACMP0MODE_R::new(((self.bits >> 20) & 3) as u8)
618    }
619    #[doc = "Bits 22:23 - ACMP1 mode"]
620    #[inline(always)]
621    pub fn acmp1mode(&self) -> ACMP1MODE_R {
622        ACMP1MODE_R::new(((self.bits >> 22) & 3) as u8)
623    }
624    #[doc = "Bits 26:27 - ACMP and DAC duty cycle mode"]
625    #[inline(always)]
626    pub fn warmupmode(&self) -> WARMUPMODE_R {
627        WARMUPMODE_R::new(((self.bits >> 26) & 3) as u8)
628    }
629}
630impl W {
631    #[doc = "Bit 0 - DAC CH0 data selection."]
632    #[inline(always)]
633    pub fn dacch0data(&mut self) -> DACCH0DATA_W {
634        DACCH0DATA_W::new(self)
635    }
636    #[doc = "Bit 1 - DAC CH1 data selection."]
637    #[inline(always)]
638    pub fn dacch1data(&mut self) -> DACCH1DATA_W {
639        DACCH1DATA_W::new(self)
640    }
641    #[doc = "Bits 2:3 - DAC channel 0 conversion mode"]
642    #[inline(always)]
643    pub fn dacch0conv(&mut self) -> DACCH0CONV_W {
644        DACCH0CONV_W::new(self)
645    }
646    #[doc = "Bits 4:5 - DAC channel 1 conversion mode"]
647    #[inline(always)]
648    pub fn dacch1conv(&mut self) -> DACCH1CONV_W {
649        DACCH1CONV_W::new(self)
650    }
651    #[doc = "Bits 6:7 - DAC channel 0 output mode"]
652    #[inline(always)]
653    pub fn dacch0out(&mut self) -> DACCH0OUT_W {
654        DACCH0OUT_W::new(self)
655    }
656    #[doc = "Bits 8:9 - DAC channel 1 output mode"]
657    #[inline(always)]
658    pub fn dacch1out(&mut self) -> DACCH1OUT_W {
659        DACCH1OUT_W::new(self)
660    }
661    #[doc = "Bits 10:14 - DAC prescaler configuration."]
662    #[inline(always)]
663    pub fn dacpresc(&mut self) -> DACPRESC_W {
664        DACPRESC_W::new(self)
665    }
666    #[doc = "Bit 18 - DAC bandgap reference used"]
667    #[inline(always)]
668    pub fn dacref(&mut self) -> DACREF_W {
669        DACREF_W::new(self)
670    }
671    #[doc = "Bits 20:21 - ACMP0 mode"]
672    #[inline(always)]
673    pub fn acmp0mode(&mut self) -> ACMP0MODE_W {
674        ACMP0MODE_W::new(self)
675    }
676    #[doc = "Bits 22:23 - ACMP1 mode"]
677    #[inline(always)]
678    pub fn acmp1mode(&mut self) -> ACMP1MODE_W {
679        ACMP1MODE_W::new(self)
680    }
681    #[doc = "Bits 26:27 - ACMP and DAC duty cycle mode"]
682    #[inline(always)]
683    pub fn warmupmode(&mut self) -> WARMUPMODE_W {
684        WARMUPMODE_W::new(self)
685    }
686    #[doc = "Writes raw bits to the register."]
687    #[inline(always)]
688    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
689        self.0.bits(bits);
690        self
691    }
692}
693#[doc = "Peripheral Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perctrl](index.html) module"]
694pub struct PERCTRL_SPEC;
695impl crate::RegisterSpec for PERCTRL_SPEC {
696    type Ux = u32;
697}
698#[doc = "`read()` method returns [perctrl::R](R) reader structure"]
699impl crate::Readable for PERCTRL_SPEC {
700    type Reader = R;
701}
702#[doc = "`write(|w| ..)` method takes [perctrl::W](W) writer structure"]
703impl crate::Writable for PERCTRL_SPEC {
704    type Writer = W;
705}
706#[doc = "`reset()` method sets PERCTRL to value 0"]
707impl crate::Resettable for PERCTRL_SPEC {
708    #[inline(always)]
709    fn reset_value() -> Self::Ux {
710        0
711    }
712}
efm32wg230_pac/lesense/perctrl.rs

efm32wg230_pac/lesense/
perctrl.rs
