efm32wg230_pac/fpueh/
ifs.rs

1#[doc = "Register `IFS` writer"]
2pub struct W(crate::W<IFS_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IFS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IFS_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IFS_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `FPIOC` writer - Set FPIOC Interrupt Flag"]
23pub type FPIOC_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 0>;
24#[doc = "Field `FPDZC` writer - Set FPDZC Interrupt Flag"]
25pub type FPDZC_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 1>;
26#[doc = "Field `FPUFC` writer - Set FPUFC Interrupt Flag"]
27pub type FPUFC_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 2>;
28#[doc = "Field `FPOFC` writer - Set FPOFC Interrupt Flag"]
29pub type FPOFC_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 3>;
30#[doc = "Field `FPIDC` writer - Set FPIDC Interrupt Flag"]
31pub type FPIDC_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 4>;
32#[doc = "Field `FPIXC` writer - Set FPIXC Interrupt Flag"]
33pub type FPIXC_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 5>;
34impl W {
35    #[doc = "Bit 0 - Set FPIOC Interrupt Flag"]
36    #[inline(always)]
37    pub fn fpioc(&mut self) -> FPIOC_W {
38        FPIOC_W::new(self)
39    }
40    #[doc = "Bit 1 - Set FPDZC Interrupt Flag"]
41    #[inline(always)]
42    pub fn fpdzc(&mut self) -> FPDZC_W {
43        FPDZC_W::new(self)
44    }
45    #[doc = "Bit 2 - Set FPUFC Interrupt Flag"]
46    #[inline(always)]
47    pub fn fpufc(&mut self) -> FPUFC_W {
48        FPUFC_W::new(self)
49    }
50    #[doc = "Bit 3 - Set FPOFC Interrupt Flag"]
51    #[inline(always)]
52    pub fn fpofc(&mut self) -> FPOFC_W {
53        FPOFC_W::new(self)
54    }
55    #[doc = "Bit 4 - Set FPIDC Interrupt Flag"]
56    #[inline(always)]
57    pub fn fpidc(&mut self) -> FPIDC_W {
58        FPIDC_W::new(self)
59    }
60    #[doc = "Bit 5 - Set FPIXC Interrupt Flag"]
61    #[inline(always)]
62    pub fn fpixc(&mut self) -> FPIXC_W {
63        FPIXC_W::new(self)
64    }
65    #[doc = "Writes raw bits to the register."]
66    #[inline(always)]
67    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
68        self.0.bits(bits);
69        self
70    }
71}
72#[doc = "Interrupt Flag Set Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifs](index.html) module"]
73pub struct IFS_SPEC;
74impl crate::RegisterSpec for IFS_SPEC {
75    type Ux = u32;
76}
77#[doc = "`write(|w| ..)` method takes [ifs::W](W) writer structure"]
78impl crate::Writable for IFS_SPEC {
79    type Writer = W;
80}
81#[doc = "`reset()` method sets IFS to value 0"]
82impl crate::Resettable for IFS_SPEC {
83    #[inline(always)]
84    fn reset_value() -> Self::Ux {
85        0
86    }
87}
efm32wg230_pac/fpueh/ifs.rs

efm32wg230_pac/fpueh/
ifs.rs
