efm32wg230_pac/dma/
rect0.rs

1#[doc = "Register `RECT0` reader"]
2pub struct R(crate::R<RECT0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<RECT0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<RECT0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<RECT0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `RECT0` writer"]
17pub struct W(crate::W<RECT0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<RECT0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<RECT0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<RECT0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `HEIGHT` reader - DMA Channel 0 Rectangle Height"]
38pub type HEIGHT_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `HEIGHT` writer - DMA Channel 0 Rectangle Height"]
40pub type HEIGHT_W<'a> = crate::FieldWriter<'a, u32, RECT0_SPEC, u16, u16, 10, 0>;
41#[doc = "Field `SRCSTRIDE` reader - DMA Channel 0 Source Stride"]
42pub type SRCSTRIDE_R = crate::FieldReader<u16, u16>;
43#[doc = "Field `SRCSTRIDE` writer - DMA Channel 0 Source Stride"]
44pub type SRCSTRIDE_W<'a> = crate::FieldWriter<'a, u32, RECT0_SPEC, u16, u16, 11, 10>;
45#[doc = "Field `DSTSTRIDE` reader - DMA Channel 0 Destination Stride"]
46pub type DSTSTRIDE_R = crate::FieldReader<u16, u16>;
47#[doc = "Field `DSTSTRIDE` writer - DMA Channel 0 Destination Stride"]
48pub type DSTSTRIDE_W<'a> = crate::FieldWriter<'a, u32, RECT0_SPEC, u16, u16, 11, 21>;
49impl R {
50    #[doc = "Bits 0:9 - DMA Channel 0 Rectangle Height"]
51    #[inline(always)]
52    pub fn height(&self) -> HEIGHT_R {
53        HEIGHT_R::new((self.bits & 0x03ff) as u16)
54    }
55    #[doc = "Bits 10:20 - DMA Channel 0 Source Stride"]
56    #[inline(always)]
57    pub fn srcstride(&self) -> SRCSTRIDE_R {
58        SRCSTRIDE_R::new(((self.bits >> 10) & 0x07ff) as u16)
59    }
60    #[doc = "Bits 21:31 - DMA Channel 0 Destination Stride"]
61    #[inline(always)]
62    pub fn dststride(&self) -> DSTSTRIDE_R {
63        DSTSTRIDE_R::new(((self.bits >> 21) & 0x07ff) as u16)
64    }
65}
66impl W {
67    #[doc = "Bits 0:9 - DMA Channel 0 Rectangle Height"]
68    #[inline(always)]
69    pub fn height(&mut self) -> HEIGHT_W {
70        HEIGHT_W::new(self)
71    }
72    #[doc = "Bits 10:20 - DMA Channel 0 Source Stride"]
73    #[inline(always)]
74    pub fn srcstride(&mut self) -> SRCSTRIDE_W {
75        SRCSTRIDE_W::new(self)
76    }
77    #[doc = "Bits 21:31 - DMA Channel 0 Destination Stride"]
78    #[inline(always)]
79    pub fn dststride(&mut self) -> DSTSTRIDE_W {
80        DSTSTRIDE_W::new(self)
81    }
82    #[doc = "Writes raw bits to the register."]
83    #[inline(always)]
84    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
85        self.0.bits(bits);
86        self
87    }
88}
89#[doc = "Channel 0 Rectangle Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rect0](index.html) module"]
90pub struct RECT0_SPEC;
91impl crate::RegisterSpec for RECT0_SPEC {
92    type Ux = u32;
93}
94#[doc = "`read()` method returns [rect0::R](R) reader structure"]
95impl crate::Readable for RECT0_SPEC {
96    type Reader = R;
97}
98#[doc = "`write(|w| ..)` method takes [rect0::W](W) writer structure"]
99impl crate::Writable for RECT0_SPEC {
100    type Writer = W;
101}
102#[doc = "`reset()` method sets RECT0 to value 0"]
103impl crate::Resettable for RECT0_SPEC {
104    #[inline(always)]
105    fn reset_value() -> Self::Ux {
106        0
107    }
108}
efm32wg230_pac/dma/rect0.rs

efm32wg230_pac/dma/
rect0.rs
