efm32wg230_pac/dma/
ifc.rs

1#[doc = "Register `IFC` writer"]
2pub struct W(crate::W<IFC_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IFC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IFC_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IFC_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `CH0DONE` writer - DMA Channel 0 Complete Interrupt Flag Clear"]
23pub type CH0DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 0>;
24#[doc = "Field `CH1DONE` writer - DMA Channel 1 Complete Interrupt Flag Clear"]
25pub type CH1DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 1>;
26#[doc = "Field `CH2DONE` writer - DMA Channel 2 Complete Interrupt Flag Clear"]
27pub type CH2DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 2>;
28#[doc = "Field `CH3DONE` writer - DMA Channel 3 Complete Interrupt Flag Clear"]
29pub type CH3DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 3>;
30#[doc = "Field `CH4DONE` writer - DMA Channel 4 Complete Interrupt Flag Clear"]
31pub type CH4DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 4>;
32#[doc = "Field `CH5DONE` writer - DMA Channel 5 Complete Interrupt Flag Clear"]
33pub type CH5DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 5>;
34#[doc = "Field `CH6DONE` writer - DMA Channel 6 Complete Interrupt Flag Clear"]
35pub type CH6DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 6>;
36#[doc = "Field `CH7DONE` writer - DMA Channel 7 Complete Interrupt Flag Clear"]
37pub type CH7DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 7>;
38#[doc = "Field `CH8DONE` writer - DMA Channel 8 Complete Interrupt Flag Clear"]
39pub type CH8DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 8>;
40#[doc = "Field `CH9DONE` writer - DMA Channel 9 Complete Interrupt Flag Clear"]
41pub type CH9DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 9>;
42#[doc = "Field `CH10DONE` writer - DMA Channel 10 Complete Interrupt Flag Clear"]
43pub type CH10DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 10>;
44#[doc = "Field `CH11DONE` writer - DMA Channel 11 Complete Interrupt Flag Clear"]
45pub type CH11DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 11>;
46#[doc = "Field `ERR` writer - DMA Error Interrupt Flag Clear"]
47pub type ERR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 31>;
48impl W {
49    #[doc = "Bit 0 - DMA Channel 0 Complete Interrupt Flag Clear"]
50    #[inline(always)]
51    pub fn ch0done(&mut self) -> CH0DONE_W {
52        CH0DONE_W::new(self)
53    }
54    #[doc = "Bit 1 - DMA Channel 1 Complete Interrupt Flag Clear"]
55    #[inline(always)]
56    pub fn ch1done(&mut self) -> CH1DONE_W {
57        CH1DONE_W::new(self)
58    }
59    #[doc = "Bit 2 - DMA Channel 2 Complete Interrupt Flag Clear"]
60    #[inline(always)]
61    pub fn ch2done(&mut self) -> CH2DONE_W {
62        CH2DONE_W::new(self)
63    }
64    #[doc = "Bit 3 - DMA Channel 3 Complete Interrupt Flag Clear"]
65    #[inline(always)]
66    pub fn ch3done(&mut self) -> CH3DONE_W {
67        CH3DONE_W::new(self)
68    }
69    #[doc = "Bit 4 - DMA Channel 4 Complete Interrupt Flag Clear"]
70    #[inline(always)]
71    pub fn ch4done(&mut self) -> CH4DONE_W {
72        CH4DONE_W::new(self)
73    }
74    #[doc = "Bit 5 - DMA Channel 5 Complete Interrupt Flag Clear"]
75    #[inline(always)]
76    pub fn ch5done(&mut self) -> CH5DONE_W {
77        CH5DONE_W::new(self)
78    }
79    #[doc = "Bit 6 - DMA Channel 6 Complete Interrupt Flag Clear"]
80    #[inline(always)]
81    pub fn ch6done(&mut self) -> CH6DONE_W {
82        CH6DONE_W::new(self)
83    }
84    #[doc = "Bit 7 - DMA Channel 7 Complete Interrupt Flag Clear"]
85    #[inline(always)]
86    pub fn ch7done(&mut self) -> CH7DONE_W {
87        CH7DONE_W::new(self)
88    }
89    #[doc = "Bit 8 - DMA Channel 8 Complete Interrupt Flag Clear"]
90    #[inline(always)]
91    pub fn ch8done(&mut self) -> CH8DONE_W {
92        CH8DONE_W::new(self)
93    }
94    #[doc = "Bit 9 - DMA Channel 9 Complete Interrupt Flag Clear"]
95    #[inline(always)]
96    pub fn ch9done(&mut self) -> CH9DONE_W {
97        CH9DONE_W::new(self)
98    }
99    #[doc = "Bit 10 - DMA Channel 10 Complete Interrupt Flag Clear"]
100    #[inline(always)]
101    pub fn ch10done(&mut self) -> CH10DONE_W {
102        CH10DONE_W::new(self)
103    }
104    #[doc = "Bit 11 - DMA Channel 11 Complete Interrupt Flag Clear"]
105    #[inline(always)]
106    pub fn ch11done(&mut self) -> CH11DONE_W {
107        CH11DONE_W::new(self)
108    }
109    #[doc = "Bit 31 - DMA Error Interrupt Flag Clear"]
110    #[inline(always)]
111    pub fn err(&mut self) -> ERR_W {
112        ERR_W::new(self)
113    }
114    #[doc = "Writes raw bits to the register."]
115    #[inline(always)]
116    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
117        self.0.bits(bits);
118        self
119    }
120}
121#[doc = "Interrupt Flag Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifc](index.html) module"]
122pub struct IFC_SPEC;
123impl crate::RegisterSpec for IFC_SPEC {
124    type Ux = u32;
125}
126#[doc = "`write(|w| ..)` method takes [ifc::W](W) writer structure"]
127impl crate::Writable for IFC_SPEC {
128    type Writer = W;
129}
130#[doc = "`reset()` method sets IFC to value 0"]
131impl crate::Resettable for IFC_SPEC {
132    #[inline(always)]
133    fn reset_value() -> Self::Ux {
134        0
135    }
136}
efm32wg230_pac/dma/ifc.rs

efm32wg230_pac/dma/
ifc.rs
