efm32wg230_pac/dma/
ien.rs

1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CH0DONE` reader - DMA Channel 0 Complete Interrupt Enable"]
38pub type CH0DONE_R = crate::BitReader<bool>;
39#[doc = "Field `CH0DONE` writer - DMA Channel 0 Complete Interrupt Enable"]
40pub type CH0DONE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 0>;
41#[doc = "Field `CH1DONE` reader - DMA Channel 1 Complete Interrupt Enable"]
42pub type CH1DONE_R = crate::BitReader<bool>;
43#[doc = "Field `CH1DONE` writer - DMA Channel 1 Complete Interrupt Enable"]
44pub type CH1DONE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 1>;
45#[doc = "Field `CH2DONE` reader - DMA Channel 2 Complete Interrupt Enable"]
46pub type CH2DONE_R = crate::BitReader<bool>;
47#[doc = "Field `CH2DONE` writer - DMA Channel 2 Complete Interrupt Enable"]
48pub type CH2DONE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 2>;
49#[doc = "Field `CH3DONE` reader - DMA Channel 3 Complete Interrupt Enable"]
50pub type CH3DONE_R = crate::BitReader<bool>;
51#[doc = "Field `CH3DONE` writer - DMA Channel 3 Complete Interrupt Enable"]
52pub type CH3DONE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 3>;
53#[doc = "Field `CH4DONE` reader - DMA Channel 4 Complete Interrupt Enable"]
54pub type CH4DONE_R = crate::BitReader<bool>;
55#[doc = "Field `CH4DONE` writer - DMA Channel 4 Complete Interrupt Enable"]
56pub type CH4DONE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 4>;
57#[doc = "Field `CH5DONE` reader - DMA Channel 5 Complete Interrupt Enable"]
58pub type CH5DONE_R = crate::BitReader<bool>;
59#[doc = "Field `CH5DONE` writer - DMA Channel 5 Complete Interrupt Enable"]
60pub type CH5DONE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 5>;
61#[doc = "Field `CH6DONE` reader - DMA Channel 6 Complete Interrupt Enable"]
62pub type CH6DONE_R = crate::BitReader<bool>;
63#[doc = "Field `CH6DONE` writer - DMA Channel 6 Complete Interrupt Enable"]
64pub type CH6DONE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 6>;
65#[doc = "Field `CH7DONE` reader - DMA Channel 7 Complete Interrupt Enable"]
66pub type CH7DONE_R = crate::BitReader<bool>;
67#[doc = "Field `CH7DONE` writer - DMA Channel 7 Complete Interrupt Enable"]
68pub type CH7DONE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 7>;
69#[doc = "Field `CH8DONE` reader - DMA Channel 8 Complete Interrupt Enable"]
70pub type CH8DONE_R = crate::BitReader<bool>;
71#[doc = "Field `CH8DONE` writer - DMA Channel 8 Complete Interrupt Enable"]
72pub type CH8DONE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 8>;
73#[doc = "Field `CH9DONE` reader - DMA Channel 9 Complete Interrupt Enable"]
74pub type CH9DONE_R = crate::BitReader<bool>;
75#[doc = "Field `CH9DONE` writer - DMA Channel 9 Complete Interrupt Enable"]
76pub type CH9DONE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 9>;
77#[doc = "Field `CH10DONE` reader - DMA Channel 10 Complete Interrupt Enable"]
78pub type CH10DONE_R = crate::BitReader<bool>;
79#[doc = "Field `CH10DONE` writer - DMA Channel 10 Complete Interrupt Enable"]
80pub type CH10DONE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 10>;
81#[doc = "Field `CH11DONE` reader - DMA Channel 11 Complete Interrupt Enable"]
82pub type CH11DONE_R = crate::BitReader<bool>;
83#[doc = "Field `CH11DONE` writer - DMA Channel 11 Complete Interrupt Enable"]
84pub type CH11DONE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 11>;
85#[doc = "Field `ERR` reader - DMA Error Interrupt Flag Enable"]
86pub type ERR_R = crate::BitReader<bool>;
87#[doc = "Field `ERR` writer - DMA Error Interrupt Flag Enable"]
88pub type ERR_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 31>;
89impl R {
90    #[doc = "Bit 0 - DMA Channel 0 Complete Interrupt Enable"]
91    #[inline(always)]
92    pub fn ch0done(&self) -> CH0DONE_R {
93        CH0DONE_R::new((self.bits & 1) != 0)
94    }
95    #[doc = "Bit 1 - DMA Channel 1 Complete Interrupt Enable"]
96    #[inline(always)]
97    pub fn ch1done(&self) -> CH1DONE_R {
98        CH1DONE_R::new(((self.bits >> 1) & 1) != 0)
99    }
100    #[doc = "Bit 2 - DMA Channel 2 Complete Interrupt Enable"]
101    #[inline(always)]
102    pub fn ch2done(&self) -> CH2DONE_R {
103        CH2DONE_R::new(((self.bits >> 2) & 1) != 0)
104    }
105    #[doc = "Bit 3 - DMA Channel 3 Complete Interrupt Enable"]
106    #[inline(always)]
107    pub fn ch3done(&self) -> CH3DONE_R {
108        CH3DONE_R::new(((self.bits >> 3) & 1) != 0)
109    }
110    #[doc = "Bit 4 - DMA Channel 4 Complete Interrupt Enable"]
111    #[inline(always)]
112    pub fn ch4done(&self) -> CH4DONE_R {
113        CH4DONE_R::new(((self.bits >> 4) & 1) != 0)
114    }
115    #[doc = "Bit 5 - DMA Channel 5 Complete Interrupt Enable"]
116    #[inline(always)]
117    pub fn ch5done(&self) -> CH5DONE_R {
118        CH5DONE_R::new(((self.bits >> 5) & 1) != 0)
119    }
120    #[doc = "Bit 6 - DMA Channel 6 Complete Interrupt Enable"]
121    #[inline(always)]
122    pub fn ch6done(&self) -> CH6DONE_R {
123        CH6DONE_R::new(((self.bits >> 6) & 1) != 0)
124    }
125    #[doc = "Bit 7 - DMA Channel 7 Complete Interrupt Enable"]
126    #[inline(always)]
127    pub fn ch7done(&self) -> CH7DONE_R {
128        CH7DONE_R::new(((self.bits >> 7) & 1) != 0)
129    }
130    #[doc = "Bit 8 - DMA Channel 8 Complete Interrupt Enable"]
131    #[inline(always)]
132    pub fn ch8done(&self) -> CH8DONE_R {
133        CH8DONE_R::new(((self.bits >> 8) & 1) != 0)
134    }
135    #[doc = "Bit 9 - DMA Channel 9 Complete Interrupt Enable"]
136    #[inline(always)]
137    pub fn ch9done(&self) -> CH9DONE_R {
138        CH9DONE_R::new(((self.bits >> 9) & 1) != 0)
139    }
140    #[doc = "Bit 10 - DMA Channel 10 Complete Interrupt Enable"]
141    #[inline(always)]
142    pub fn ch10done(&self) -> CH10DONE_R {
143        CH10DONE_R::new(((self.bits >> 10) & 1) != 0)
144    }
145    #[doc = "Bit 11 - DMA Channel 11 Complete Interrupt Enable"]
146    #[inline(always)]
147    pub fn ch11done(&self) -> CH11DONE_R {
148        CH11DONE_R::new(((self.bits >> 11) & 1) != 0)
149    }
150    #[doc = "Bit 31 - DMA Error Interrupt Flag Enable"]
151    #[inline(always)]
152    pub fn err(&self) -> ERR_R {
153        ERR_R::new(((self.bits >> 31) & 1) != 0)
154    }
155}
156impl W {
157    #[doc = "Bit 0 - DMA Channel 0 Complete Interrupt Enable"]
158    #[inline(always)]
159    pub fn ch0done(&mut self) -> CH0DONE_W {
160        CH0DONE_W::new(self)
161    }
162    #[doc = "Bit 1 - DMA Channel 1 Complete Interrupt Enable"]
163    #[inline(always)]
164    pub fn ch1done(&mut self) -> CH1DONE_W {
165        CH1DONE_W::new(self)
166    }
167    #[doc = "Bit 2 - DMA Channel 2 Complete Interrupt Enable"]
168    #[inline(always)]
169    pub fn ch2done(&mut self) -> CH2DONE_W {
170        CH2DONE_W::new(self)
171    }
172    #[doc = "Bit 3 - DMA Channel 3 Complete Interrupt Enable"]
173    #[inline(always)]
174    pub fn ch3done(&mut self) -> CH3DONE_W {
175        CH3DONE_W::new(self)
176    }
177    #[doc = "Bit 4 - DMA Channel 4 Complete Interrupt Enable"]
178    #[inline(always)]
179    pub fn ch4done(&mut self) -> CH4DONE_W {
180        CH4DONE_W::new(self)
181    }
182    #[doc = "Bit 5 - DMA Channel 5 Complete Interrupt Enable"]
183    #[inline(always)]
184    pub fn ch5done(&mut self) -> CH5DONE_W {
185        CH5DONE_W::new(self)
186    }
187    #[doc = "Bit 6 - DMA Channel 6 Complete Interrupt Enable"]
188    #[inline(always)]
189    pub fn ch6done(&mut self) -> CH6DONE_W {
190        CH6DONE_W::new(self)
191    }
192    #[doc = "Bit 7 - DMA Channel 7 Complete Interrupt Enable"]
193    #[inline(always)]
194    pub fn ch7done(&mut self) -> CH7DONE_W {
195        CH7DONE_W::new(self)
196    }
197    #[doc = "Bit 8 - DMA Channel 8 Complete Interrupt Enable"]
198    #[inline(always)]
199    pub fn ch8done(&mut self) -> CH8DONE_W {
200        CH8DONE_W::new(self)
201    }
202    #[doc = "Bit 9 - DMA Channel 9 Complete Interrupt Enable"]
203    #[inline(always)]
204    pub fn ch9done(&mut self) -> CH9DONE_W {
205        CH9DONE_W::new(self)
206    }
207    #[doc = "Bit 10 - DMA Channel 10 Complete Interrupt Enable"]
208    #[inline(always)]
209    pub fn ch10done(&mut self) -> CH10DONE_W {
210        CH10DONE_W::new(self)
211    }
212    #[doc = "Bit 11 - DMA Channel 11 Complete Interrupt Enable"]
213    #[inline(always)]
214    pub fn ch11done(&mut self) -> CH11DONE_W {
215        CH11DONE_W::new(self)
216    }
217    #[doc = "Bit 31 - DMA Error Interrupt Flag Enable"]
218    #[inline(always)]
219    pub fn err(&mut self) -> ERR_W {
220        ERR_W::new(self)
221    }
222    #[doc = "Writes raw bits to the register."]
223    #[inline(always)]
224    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
225        self.0.bits(bits);
226        self
227    }
228}
229#[doc = "Interrupt Enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
230pub struct IEN_SPEC;
231impl crate::RegisterSpec for IEN_SPEC {
232    type Ux = u32;
233}
234#[doc = "`read()` method returns [ien::R](R) reader structure"]
235impl crate::Readable for IEN_SPEC {
236    type Reader = R;
237}
238#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
239impl crate::Writable for IEN_SPEC {
240    type Writer = W;
241}
242#[doc = "`reset()` method sets IEN to value 0"]
243impl crate::Resettable for IEN_SPEC {
244    #[inline(always)]
245    fn reset_value() -> Self::Ux {
246        0
247    }
248}
efm32wg230_pac/dma/ien.rs

efm32wg230_pac/dma/
ien.rs
