efm32wg230_pac/timer0/
route.rs

1#[doc = "Register `ROUTE` reader"]
2pub struct R(crate::R<ROUTE_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ROUTE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ROUTE_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ROUTE_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ROUTE` writer"]
17pub struct W(crate::W<ROUTE_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ROUTE_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ROUTE_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ROUTE_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CC0PEN` reader - CC Channel 0 Pin Enable"]
38pub type CC0PEN_R = crate::BitReader<bool>;
39#[doc = "Field `CC0PEN` writer - CC Channel 0 Pin Enable"]
40pub type CC0PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 0>;
41#[doc = "Field `CC1PEN` reader - CC Channel 1 Pin Enable"]
42pub type CC1PEN_R = crate::BitReader<bool>;
43#[doc = "Field `CC1PEN` writer - CC Channel 1 Pin Enable"]
44pub type CC1PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 1>;
45#[doc = "Field `CC2PEN` reader - CC Channel 2 Pin Enable"]
46pub type CC2PEN_R = crate::BitReader<bool>;
47#[doc = "Field `CC2PEN` writer - CC Channel 2 Pin Enable"]
48pub type CC2PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 2>;
49#[doc = "Field `CDTI0PEN` reader - CC Channel 0 Complementary Dead-Time Insertion Pin Enable"]
50pub type CDTI0PEN_R = crate::BitReader<bool>;
51#[doc = "Field `CDTI0PEN` writer - CC Channel 0 Complementary Dead-Time Insertion Pin Enable"]
52pub type CDTI0PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 8>;
53#[doc = "Field `CDTI1PEN` reader - CC Channel 1 Complementary Dead-Time Insertion Pin Enable"]
54pub type CDTI1PEN_R = crate::BitReader<bool>;
55#[doc = "Field `CDTI1PEN` writer - CC Channel 1 Complementary Dead-Time Insertion Pin Enable"]
56pub type CDTI1PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 9>;
57#[doc = "Field `CDTI2PEN` reader - CC Channel 2 Complementary Dead-Time Insertion Pin Enable"]
58pub type CDTI2PEN_R = crate::BitReader<bool>;
59#[doc = "Field `CDTI2PEN` writer - CC Channel 2 Complementary Dead-Time Insertion Pin Enable"]
60pub type CDTI2PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 10>;
61#[doc = "I/O Location\n\nValue on reset: 0"]
62#[derive(Clone, Copy, Debug, PartialEq)]
63#[repr(u8)]
64pub enum LOCATION_A {
65    #[doc = "0: Location 0"]
66    LOC0 = 0,
67    #[doc = "1: Location 1"]
68    LOC1 = 1,
69    #[doc = "2: Location 2"]
70    LOC2 = 2,
71    #[doc = "3: Location 3"]
72    LOC3 = 3,
73    #[doc = "4: Location 4"]
74    LOC4 = 4,
75    #[doc = "5: Location 5"]
76    LOC5 = 5,
77}
78impl From<LOCATION_A> for u8 {
79    #[inline(always)]
80    fn from(variant: LOCATION_A) -> Self {
81        variant as _
82    }
83}
84#[doc = "Field `LOCATION` reader - I/O Location"]
85pub type LOCATION_R = crate::FieldReader<u8, LOCATION_A>;
86impl LOCATION_R {
87    #[doc = "Get enumerated values variant"]
88    #[inline(always)]
89    pub fn variant(&self) -> Option<LOCATION_A> {
90        match self.bits {
91            0 => Some(LOCATION_A::LOC0),
92            1 => Some(LOCATION_A::LOC1),
93            2 => Some(LOCATION_A::LOC2),
94            3 => Some(LOCATION_A::LOC3),
95            4 => Some(LOCATION_A::LOC4),
96            5 => Some(LOCATION_A::LOC5),
97            _ => None,
98        }
99    }
100    #[doc = "Checks if the value of the field is `LOC0`"]
101    #[inline(always)]
102    pub fn is_loc0(&self) -> bool {
103        *self == LOCATION_A::LOC0
104    }
105    #[doc = "Checks if the value of the field is `LOC1`"]
106    #[inline(always)]
107    pub fn is_loc1(&self) -> bool {
108        *self == LOCATION_A::LOC1
109    }
110    #[doc = "Checks if the value of the field is `LOC2`"]
111    #[inline(always)]
112    pub fn is_loc2(&self) -> bool {
113        *self == LOCATION_A::LOC2
114    }
115    #[doc = "Checks if the value of the field is `LOC3`"]
116    #[inline(always)]
117    pub fn is_loc3(&self) -> bool {
118        *self == LOCATION_A::LOC3
119    }
120    #[doc = "Checks if the value of the field is `LOC4`"]
121    #[inline(always)]
122    pub fn is_loc4(&self) -> bool {
123        *self == LOCATION_A::LOC4
124    }
125    #[doc = "Checks if the value of the field is `LOC5`"]
126    #[inline(always)]
127    pub fn is_loc5(&self) -> bool {
128        *self == LOCATION_A::LOC5
129    }
130}
131#[doc = "Field `LOCATION` writer - I/O Location"]
132pub type LOCATION_W<'a> = crate::FieldWriter<'a, u32, ROUTE_SPEC, u8, LOCATION_A, 3, 16>;
133impl<'a> LOCATION_W<'a> {
134    #[doc = "Location 0"]
135    #[inline(always)]
136    pub fn loc0(self) -> &'a mut W {
137        self.variant(LOCATION_A::LOC0)
138    }
139    #[doc = "Location 1"]
140    #[inline(always)]
141    pub fn loc1(self) -> &'a mut W {
142        self.variant(LOCATION_A::LOC1)
143    }
144    #[doc = "Location 2"]
145    #[inline(always)]
146    pub fn loc2(self) -> &'a mut W {
147        self.variant(LOCATION_A::LOC2)
148    }
149    #[doc = "Location 3"]
150    #[inline(always)]
151    pub fn loc3(self) -> &'a mut W {
152        self.variant(LOCATION_A::LOC3)
153    }
154    #[doc = "Location 4"]
155    #[inline(always)]
156    pub fn loc4(self) -> &'a mut W {
157        self.variant(LOCATION_A::LOC4)
158    }
159    #[doc = "Location 5"]
160    #[inline(always)]
161    pub fn loc5(self) -> &'a mut W {
162        self.variant(LOCATION_A::LOC5)
163    }
164}
165impl R {
166    #[doc = "Bit 0 - CC Channel 0 Pin Enable"]
167    #[inline(always)]
168    pub fn cc0pen(&self) -> CC0PEN_R {
169        CC0PEN_R::new((self.bits & 1) != 0)
170    }
171    #[doc = "Bit 1 - CC Channel 1 Pin Enable"]
172    #[inline(always)]
173    pub fn cc1pen(&self) -> CC1PEN_R {
174        CC1PEN_R::new(((self.bits >> 1) & 1) != 0)
175    }
176    #[doc = "Bit 2 - CC Channel 2 Pin Enable"]
177    #[inline(always)]
178    pub fn cc2pen(&self) -> CC2PEN_R {
179        CC2PEN_R::new(((self.bits >> 2) & 1) != 0)
180    }
181    #[doc = "Bit 8 - CC Channel 0 Complementary Dead-Time Insertion Pin Enable"]
182    #[inline(always)]
183    pub fn cdti0pen(&self) -> CDTI0PEN_R {
184        CDTI0PEN_R::new(((self.bits >> 8) & 1) != 0)
185    }
186    #[doc = "Bit 9 - CC Channel 1 Complementary Dead-Time Insertion Pin Enable"]
187    #[inline(always)]
188    pub fn cdti1pen(&self) -> CDTI1PEN_R {
189        CDTI1PEN_R::new(((self.bits >> 9) & 1) != 0)
190    }
191    #[doc = "Bit 10 - CC Channel 2 Complementary Dead-Time Insertion Pin Enable"]
192    #[inline(always)]
193    pub fn cdti2pen(&self) -> CDTI2PEN_R {
194        CDTI2PEN_R::new(((self.bits >> 10) & 1) != 0)
195    }
196    #[doc = "Bits 16:18 - I/O Location"]
197    #[inline(always)]
198    pub fn location(&self) -> LOCATION_R {
199        LOCATION_R::new(((self.bits >> 16) & 7) as u8)
200    }
201}
202impl W {
203    #[doc = "Bit 0 - CC Channel 0 Pin Enable"]
204    #[inline(always)]
205    pub fn cc0pen(&mut self) -> CC0PEN_W {
206        CC0PEN_W::new(self)
207    }
208    #[doc = "Bit 1 - CC Channel 1 Pin Enable"]
209    #[inline(always)]
210    pub fn cc1pen(&mut self) -> CC1PEN_W {
211        CC1PEN_W::new(self)
212    }
213    #[doc = "Bit 2 - CC Channel 2 Pin Enable"]
214    #[inline(always)]
215    pub fn cc2pen(&mut self) -> CC2PEN_W {
216        CC2PEN_W::new(self)
217    }
218    #[doc = "Bit 8 - CC Channel 0 Complementary Dead-Time Insertion Pin Enable"]
219    #[inline(always)]
220    pub fn cdti0pen(&mut self) -> CDTI0PEN_W {
221        CDTI0PEN_W::new(self)
222    }
223    #[doc = "Bit 9 - CC Channel 1 Complementary Dead-Time Insertion Pin Enable"]
224    #[inline(always)]
225    pub fn cdti1pen(&mut self) -> CDTI1PEN_W {
226        CDTI1PEN_W::new(self)
227    }
228    #[doc = "Bit 10 - CC Channel 2 Complementary Dead-Time Insertion Pin Enable"]
229    #[inline(always)]
230    pub fn cdti2pen(&mut self) -> CDTI2PEN_W {
231        CDTI2PEN_W::new(self)
232    }
233    #[doc = "Bits 16:18 - I/O Location"]
234    #[inline(always)]
235    pub fn location(&mut self) -> LOCATION_W {
236        LOCATION_W::new(self)
237    }
238    #[doc = "Writes raw bits to the register."]
239    #[inline(always)]
240    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
241        self.0.bits(bits);
242        self
243    }
244}
245#[doc = "I/O Routing Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [route](index.html) module"]
246pub struct ROUTE_SPEC;
247impl crate::RegisterSpec for ROUTE_SPEC {
248    type Ux = u32;
249}
250#[doc = "`read()` method returns [route::R](R) reader structure"]
251impl crate::Readable for ROUTE_SPEC {
252    type Reader = R;
253}
254#[doc = "`write(|w| ..)` method takes [route::W](W) writer structure"]
255impl crate::Writable for ROUTE_SPEC {
256    type Writer = W;
257}
258#[doc = "`reset()` method sets ROUTE to value 0"]
259impl crate::Resettable for ROUTE_SPEC {
260    #[inline(always)]
261    fn reset_value() -> Self::Ux {
262        0
263    }
264}
efm32wg230_pac/timer0/route.rs

efm32wg230_pac/timer0/
route.rs
