efm32wg230_pac/timer0/
ifc.rs

1#[doc = "Register `IFC` writer"]
2pub struct W(crate::W<IFC_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IFC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IFC_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IFC_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `OF` writer - Overflow Interrupt Flag Clear"]
23pub type OF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 0>;
24#[doc = "Field `UF` writer - Underflow Interrupt Flag Clear"]
25pub type UF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 1>;
26#[doc = "Field `CC0` writer - CC Channel 0 Interrupt Flag Clear"]
27pub type CC0_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 4>;
28#[doc = "Field `CC1` writer - CC Channel 1 Interrupt Flag Clear"]
29pub type CC1_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 5>;
30#[doc = "Field `CC2` writer - CC Channel 2 Interrupt Flag Clear"]
31pub type CC2_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 6>;
32#[doc = "Field `ICBOF0` writer - CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Clear"]
33pub type ICBOF0_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 8>;
34#[doc = "Field `ICBOF1` writer - CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Clear"]
35pub type ICBOF1_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 9>;
36#[doc = "Field `ICBOF2` writer - CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Clear"]
37pub type ICBOF2_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 10>;
38impl W {
39    #[doc = "Bit 0 - Overflow Interrupt Flag Clear"]
40    #[inline(always)]
41    pub fn of(&mut self) -> OF_W {
42        OF_W::new(self)
43    }
44    #[doc = "Bit 1 - Underflow Interrupt Flag Clear"]
45    #[inline(always)]
46    pub fn uf(&mut self) -> UF_W {
47        UF_W::new(self)
48    }
49    #[doc = "Bit 4 - CC Channel 0 Interrupt Flag Clear"]
50    #[inline(always)]
51    pub fn cc0(&mut self) -> CC0_W {
52        CC0_W::new(self)
53    }
54    #[doc = "Bit 5 - CC Channel 1 Interrupt Flag Clear"]
55    #[inline(always)]
56    pub fn cc1(&mut self) -> CC1_W {
57        CC1_W::new(self)
58    }
59    #[doc = "Bit 6 - CC Channel 2 Interrupt Flag Clear"]
60    #[inline(always)]
61    pub fn cc2(&mut self) -> CC2_W {
62        CC2_W::new(self)
63    }
64    #[doc = "Bit 8 - CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Clear"]
65    #[inline(always)]
66    pub fn icbof0(&mut self) -> ICBOF0_W {
67        ICBOF0_W::new(self)
68    }
69    #[doc = "Bit 9 - CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Clear"]
70    #[inline(always)]
71    pub fn icbof1(&mut self) -> ICBOF1_W {
72        ICBOF1_W::new(self)
73    }
74    #[doc = "Bit 10 - CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Clear"]
75    #[inline(always)]
76    pub fn icbof2(&mut self) -> ICBOF2_W {
77        ICBOF2_W::new(self)
78    }
79    #[doc = "Writes raw bits to the register."]
80    #[inline(always)]
81    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
82        self.0.bits(bits);
83        self
84    }
85}
86#[doc = "Interrupt Flag Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifc](index.html) module"]
87pub struct IFC_SPEC;
88impl crate::RegisterSpec for IFC_SPEC {
89    type Ux = u32;
90}
91#[doc = "`write(|w| ..)` method takes [ifc::W](W) writer structure"]
92impl crate::Writable for IFC_SPEC {
93    type Writer = W;
94}
95#[doc = "`reset()` method sets IFC to value 0"]
96impl crate::Resettable for IFC_SPEC {
97    #[inline(always)]
98    fn reset_value() -> Self::Ux {
99        0
100    }
101}
efm32wg230_pac/timer0/ifc.rs

efm32wg230_pac/timer0/
ifc.rs
