efm32wg230_pac/dma/
ch2_ctrl.rs

1#[doc = "Register `CH2_CTRL` reader"]
2pub struct R(crate::R<CH2_CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CH2_CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CH2_CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CH2_CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CH2_CTRL` writer"]
17pub struct W(crate::W<CH2_CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CH2_CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CH2_CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CH2_CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SIGSEL` reader - Signal Select"]
38pub type SIGSEL_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `SIGSEL` writer - Signal Select"]
40pub type SIGSEL_W<'a> = crate::FieldWriter<'a, u32, CH2_CTRL_SPEC, u8, u8, 4, 0>;
41#[doc = "Source Select\n\nValue on reset: 0"]
42#[derive(Clone, Copy, Debug, PartialEq)]
43#[repr(u8)]
44pub enum SOURCESEL_A {
45    #[doc = "0: No source selected"]
46    NONE = 0,
47    #[doc = "8: Analog to Digital Converter 0"]
48    ADC0 = 8,
49    #[doc = "10: Digital to Analog Converter 0"]
50    DAC0 = 10,
51    #[doc = "12: Universal Synchronous/Asynchronous Receiver/Transmitter 0"]
52    USART0 = 12,
53    #[doc = "13: Universal Synchronous/Asynchronous Receiver/Transmitter 1"]
54    USART1 = 13,
55    #[doc = "14: Universal Synchronous/Asynchronous Receiver/Transmitter 2"]
56    USART2 = 14,
57    #[doc = "16: Low Energy UART 0"]
58    LEUART0 = 16,
59    #[doc = "17: Low Energy UART 1"]
60    LEUART1 = 17,
61    #[doc = "20: I2C 0"]
62    I2C0 = 20,
63    #[doc = "21: I2C 1"]
64    I2C1 = 21,
65    #[doc = "24: Timer 0"]
66    TIMER0 = 24,
67    #[doc = "25: Timer 1"]
68    TIMER1 = 25,
69    #[doc = "26: Timer 2"]
70    TIMER2 = 26,
71    #[doc = "27: Timer 3"]
72    TIMER3 = 27,
73    #[doc = "48: `110000`"]
74    MSC = 48,
75    #[doc = "49: Advanced Encryption Standard Accelerator"]
76    AES = 49,
77    #[doc = "50: Low Energy Sensor Interface"]
78    LESENSE = 50,
79}
80impl From<SOURCESEL_A> for u8 {
81    #[inline(always)]
82    fn from(variant: SOURCESEL_A) -> Self {
83        variant as _
84    }
85}
86#[doc = "Field `SOURCESEL` reader - Source Select"]
87pub type SOURCESEL_R = crate::FieldReader<u8, SOURCESEL_A>;
88impl SOURCESEL_R {
89    #[doc = "Get enumerated values variant"]
90    #[inline(always)]
91    pub fn variant(&self) -> Option<SOURCESEL_A> {
92        match self.bits {
93            0 => Some(SOURCESEL_A::NONE),
94            8 => Some(SOURCESEL_A::ADC0),
95            10 => Some(SOURCESEL_A::DAC0),
96            12 => Some(SOURCESEL_A::USART0),
97            13 => Some(SOURCESEL_A::USART1),
98            14 => Some(SOURCESEL_A::USART2),
99            16 => Some(SOURCESEL_A::LEUART0),
100            17 => Some(SOURCESEL_A::LEUART1),
101            20 => Some(SOURCESEL_A::I2C0),
102            21 => Some(SOURCESEL_A::I2C1),
103            24 => Some(SOURCESEL_A::TIMER0),
104            25 => Some(SOURCESEL_A::TIMER1),
105            26 => Some(SOURCESEL_A::TIMER2),
106            27 => Some(SOURCESEL_A::TIMER3),
107            48 => Some(SOURCESEL_A::MSC),
108            49 => Some(SOURCESEL_A::AES),
109            50 => Some(SOURCESEL_A::LESENSE),
110            _ => None,
111        }
112    }
113    #[doc = "Checks if the value of the field is `NONE`"]
114    #[inline(always)]
115    pub fn is_none(&self) -> bool {
116        *self == SOURCESEL_A::NONE
117    }
118    #[doc = "Checks if the value of the field is `ADC0`"]
119    #[inline(always)]
120    pub fn is_adc0(&self) -> bool {
121        *self == SOURCESEL_A::ADC0
122    }
123    #[doc = "Checks if the value of the field is `DAC0`"]
124    #[inline(always)]
125    pub fn is_dac0(&self) -> bool {
126        *self == SOURCESEL_A::DAC0
127    }
128    #[doc = "Checks if the value of the field is `USART0`"]
129    #[inline(always)]
130    pub fn is_usart0(&self) -> bool {
131        *self == SOURCESEL_A::USART0
132    }
133    #[doc = "Checks if the value of the field is `USART1`"]
134    #[inline(always)]
135    pub fn is_usart1(&self) -> bool {
136        *self == SOURCESEL_A::USART1
137    }
138    #[doc = "Checks if the value of the field is `USART2`"]
139    #[inline(always)]
140    pub fn is_usart2(&self) -> bool {
141        *self == SOURCESEL_A::USART2
142    }
143    #[doc = "Checks if the value of the field is `LEUART0`"]
144    #[inline(always)]
145    pub fn is_leuart0(&self) -> bool {
146        *self == SOURCESEL_A::LEUART0
147    }
148    #[doc = "Checks if the value of the field is `LEUART1`"]
149    #[inline(always)]
150    pub fn is_leuart1(&self) -> bool {
151        *self == SOURCESEL_A::LEUART1
152    }
153    #[doc = "Checks if the value of the field is `I2C0`"]
154    #[inline(always)]
155    pub fn is_i2c0(&self) -> bool {
156        *self == SOURCESEL_A::I2C0
157    }
158    #[doc = "Checks if the value of the field is `I2C1`"]
159    #[inline(always)]
160    pub fn is_i2c1(&self) -> bool {
161        *self == SOURCESEL_A::I2C1
162    }
163    #[doc = "Checks if the value of the field is `TIMER0`"]
164    #[inline(always)]
165    pub fn is_timer0(&self) -> bool {
166        *self == SOURCESEL_A::TIMER0
167    }
168    #[doc = "Checks if the value of the field is `TIMER1`"]
169    #[inline(always)]
170    pub fn is_timer1(&self) -> bool {
171        *self == SOURCESEL_A::TIMER1
172    }
173    #[doc = "Checks if the value of the field is `TIMER2`"]
174    #[inline(always)]
175    pub fn is_timer2(&self) -> bool {
176        *self == SOURCESEL_A::TIMER2
177    }
178    #[doc = "Checks if the value of the field is `TIMER3`"]
179    #[inline(always)]
180    pub fn is_timer3(&self) -> bool {
181        *self == SOURCESEL_A::TIMER3
182    }
183    #[doc = "Checks if the value of the field is `MSC`"]
184    #[inline(always)]
185    pub fn is_msc(&self) -> bool {
186        *self == SOURCESEL_A::MSC
187    }
188    #[doc = "Checks if the value of the field is `AES`"]
189    #[inline(always)]
190    pub fn is_aes(&self) -> bool {
191        *self == SOURCESEL_A::AES
192    }
193    #[doc = "Checks if the value of the field is `LESENSE`"]
194    #[inline(always)]
195    pub fn is_lesense(&self) -> bool {
196        *self == SOURCESEL_A::LESENSE
197    }
198}
199#[doc = "Field `SOURCESEL` writer - Source Select"]
200pub type SOURCESEL_W<'a> = crate::FieldWriter<'a, u32, CH2_CTRL_SPEC, u8, SOURCESEL_A, 6, 16>;
201impl<'a> SOURCESEL_W<'a> {
202    #[doc = "No source selected"]
203    #[inline(always)]
204    pub fn none(self) -> &'a mut W {
205        self.variant(SOURCESEL_A::NONE)
206    }
207    #[doc = "Analog to Digital Converter 0"]
208    #[inline(always)]
209    pub fn adc0(self) -> &'a mut W {
210        self.variant(SOURCESEL_A::ADC0)
211    }
212    #[doc = "Digital to Analog Converter 0"]
213    #[inline(always)]
214    pub fn dac0(self) -> &'a mut W {
215        self.variant(SOURCESEL_A::DAC0)
216    }
217    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 0"]
218    #[inline(always)]
219    pub fn usart0(self) -> &'a mut W {
220        self.variant(SOURCESEL_A::USART0)
221    }
222    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 1"]
223    #[inline(always)]
224    pub fn usart1(self) -> &'a mut W {
225        self.variant(SOURCESEL_A::USART1)
226    }
227    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 2"]
228    #[inline(always)]
229    pub fn usart2(self) -> &'a mut W {
230        self.variant(SOURCESEL_A::USART2)
231    }
232    #[doc = "Low Energy UART 0"]
233    #[inline(always)]
234    pub fn leuart0(self) -> &'a mut W {
235        self.variant(SOURCESEL_A::LEUART0)
236    }
237    #[doc = "Low Energy UART 1"]
238    #[inline(always)]
239    pub fn leuart1(self) -> &'a mut W {
240        self.variant(SOURCESEL_A::LEUART1)
241    }
242    #[doc = "I2C 0"]
243    #[inline(always)]
244    pub fn i2c0(self) -> &'a mut W {
245        self.variant(SOURCESEL_A::I2C0)
246    }
247    #[doc = "I2C 1"]
248    #[inline(always)]
249    pub fn i2c1(self) -> &'a mut W {
250        self.variant(SOURCESEL_A::I2C1)
251    }
252    #[doc = "Timer 0"]
253    #[inline(always)]
254    pub fn timer0(self) -> &'a mut W {
255        self.variant(SOURCESEL_A::TIMER0)
256    }
257    #[doc = "Timer 1"]
258    #[inline(always)]
259    pub fn timer1(self) -> &'a mut W {
260        self.variant(SOURCESEL_A::TIMER1)
261    }
262    #[doc = "Timer 2"]
263    #[inline(always)]
264    pub fn timer2(self) -> &'a mut W {
265        self.variant(SOURCESEL_A::TIMER2)
266    }
267    #[doc = "Timer 3"]
268    #[inline(always)]
269    pub fn timer3(self) -> &'a mut W {
270        self.variant(SOURCESEL_A::TIMER3)
271    }
272    #[doc = "`110000`"]
273    #[inline(always)]
274    pub fn msc(self) -> &'a mut W {
275        self.variant(SOURCESEL_A::MSC)
276    }
277    #[doc = "Advanced Encryption Standard Accelerator"]
278    #[inline(always)]
279    pub fn aes(self) -> &'a mut W {
280        self.variant(SOURCESEL_A::AES)
281    }
282    #[doc = "Low Energy Sensor Interface"]
283    #[inline(always)]
284    pub fn lesense(self) -> &'a mut W {
285        self.variant(SOURCESEL_A::LESENSE)
286    }
287}
288impl R {
289    #[doc = "Bits 0:3 - Signal Select"]
290    #[inline(always)]
291    pub fn sigsel(&self) -> SIGSEL_R {
292        SIGSEL_R::new((self.bits & 0x0f) as u8)
293    }
294    #[doc = "Bits 16:21 - Source Select"]
295    #[inline(always)]
296    pub fn sourcesel(&self) -> SOURCESEL_R {
297        SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8)
298    }
299}
300impl W {
301    #[doc = "Bits 0:3 - Signal Select"]
302    #[inline(always)]
303    pub fn sigsel(&mut self) -> SIGSEL_W {
304        SIGSEL_W::new(self)
305    }
306    #[doc = "Bits 16:21 - Source Select"]
307    #[inline(always)]
308    pub fn sourcesel(&mut self) -> SOURCESEL_W {
309        SOURCESEL_W::new(self)
310    }
311    #[doc = "Writes raw bits to the register."]
312    #[inline(always)]
313    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
314        self.0.bits(bits);
315        self
316    }
317}
318#[doc = "Channel Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_ctrl](index.html) module"]
319pub struct CH2_CTRL_SPEC;
320impl crate::RegisterSpec for CH2_CTRL_SPEC {
321    type Ux = u32;
322}
323#[doc = "`read()` method returns [ch2_ctrl::R](R) reader structure"]
324impl crate::Readable for CH2_CTRL_SPEC {
325    type Reader = R;
326}
327#[doc = "`write(|w| ..)` method takes [ch2_ctrl::W](W) writer structure"]
328impl crate::Writable for CH2_CTRL_SPEC {
329    type Writer = W;
330}
331#[doc = "`reset()` method sets CH2_CTRL to value 0"]
332impl crate::Resettable for CH2_CTRL_SPEC {
333    #[inline(always)]
334    fn reset_value() -> Self::Ux {
335        0
336    }
337}
efm32wg230_pac/dma/ch2_ctrl.rs

efm32wg230_pac/dma/
ch2_ctrl.rs
