efm32wg230_pac/cmu/
ien.rs1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<IEN_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<IEN_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<IEN_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<IEN_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `HFRCORDY` reader - HFRCO Ready Interrupt Enable"]
38pub type HFRCORDY_R = crate::BitReader<bool>;
39#[doc = "Field `HFRCORDY` writer - HFRCO Ready Interrupt Enable"]
40pub type HFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 0>;
41#[doc = "Field `HFXORDY` reader - HFXO Ready Interrupt Enable"]
42pub type HFXORDY_R = crate::BitReader<bool>;
43#[doc = "Field `HFXORDY` writer - HFXO Ready Interrupt Enable"]
44pub type HFXORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 1>;
45#[doc = "Field `LFRCORDY` reader - LFRCO Ready Interrupt Enable"]
46pub type LFRCORDY_R = crate::BitReader<bool>;
47#[doc = "Field `LFRCORDY` writer - LFRCO Ready Interrupt Enable"]
48pub type LFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 2>;
49#[doc = "Field `LFXORDY` reader - LFXO Ready Interrupt Enable"]
50pub type LFXORDY_R = crate::BitReader<bool>;
51#[doc = "Field `LFXORDY` writer - LFXO Ready Interrupt Enable"]
52pub type LFXORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 3>;
53#[doc = "Field `AUXHFRCORDY` reader - AUXHFRCO Ready Interrupt Enable"]
54pub type AUXHFRCORDY_R = crate::BitReader<bool>;
55#[doc = "Field `AUXHFRCORDY` writer - AUXHFRCO Ready Interrupt Enable"]
56pub type AUXHFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 4>;
57#[doc = "Field `CALRDY` reader - Calibration Ready Interrupt Enable"]
58pub type CALRDY_R = crate::BitReader<bool>;
59#[doc = "Field `CALRDY` writer - Calibration Ready Interrupt Enable"]
60pub type CALRDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 5>;
61#[doc = "Field `CALOF` reader - Calibration Overflow Interrupt Enable"]
62pub type CALOF_R = crate::BitReader<bool>;
63#[doc = "Field `CALOF` writer - Calibration Overflow Interrupt Enable"]
64pub type CALOF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 6>;
65impl R {
66 #[doc = "Bit 0 - HFRCO Ready Interrupt Enable"]
67 #[inline(always)]
68 pub fn hfrcordy(&self) -> HFRCORDY_R {
69 HFRCORDY_R::new((self.bits & 1) != 0)
70 }
71 #[doc = "Bit 1 - HFXO Ready Interrupt Enable"]
72 #[inline(always)]
73 pub fn hfxordy(&self) -> HFXORDY_R {
74 HFXORDY_R::new(((self.bits >> 1) & 1) != 0)
75 }
76 #[doc = "Bit 2 - LFRCO Ready Interrupt Enable"]
77 #[inline(always)]
78 pub fn lfrcordy(&self) -> LFRCORDY_R {
79 LFRCORDY_R::new(((self.bits >> 2) & 1) != 0)
80 }
81 #[doc = "Bit 3 - LFXO Ready Interrupt Enable"]
82 #[inline(always)]
83 pub fn lfxordy(&self) -> LFXORDY_R {
84 LFXORDY_R::new(((self.bits >> 3) & 1) != 0)
85 }
86 #[doc = "Bit 4 - AUXHFRCO Ready Interrupt Enable"]
87 #[inline(always)]
88 pub fn auxhfrcordy(&self) -> AUXHFRCORDY_R {
89 AUXHFRCORDY_R::new(((self.bits >> 4) & 1) != 0)
90 }
91 #[doc = "Bit 5 - Calibration Ready Interrupt Enable"]
92 #[inline(always)]
93 pub fn calrdy(&self) -> CALRDY_R {
94 CALRDY_R::new(((self.bits >> 5) & 1) != 0)
95 }
96 #[doc = "Bit 6 - Calibration Overflow Interrupt Enable"]
97 #[inline(always)]
98 pub fn calof(&self) -> CALOF_R {
99 CALOF_R::new(((self.bits >> 6) & 1) != 0)
100 }
101}
102impl W {
103 #[doc = "Bit 0 - HFRCO Ready Interrupt Enable"]
104 #[inline(always)]
105 pub fn hfrcordy(&mut self) -> HFRCORDY_W {
106 HFRCORDY_W::new(self)
107 }
108 #[doc = "Bit 1 - HFXO Ready Interrupt Enable"]
109 #[inline(always)]
110 pub fn hfxordy(&mut self) -> HFXORDY_W {
111 HFXORDY_W::new(self)
112 }
113 #[doc = "Bit 2 - LFRCO Ready Interrupt Enable"]
114 #[inline(always)]
115 pub fn lfrcordy(&mut self) -> LFRCORDY_W {
116 LFRCORDY_W::new(self)
117 }
118 #[doc = "Bit 3 - LFXO Ready Interrupt Enable"]
119 #[inline(always)]
120 pub fn lfxordy(&mut self) -> LFXORDY_W {
121 LFXORDY_W::new(self)
122 }
123 #[doc = "Bit 4 - AUXHFRCO Ready Interrupt Enable"]
124 #[inline(always)]
125 pub fn auxhfrcordy(&mut self) -> AUXHFRCORDY_W {
126 AUXHFRCORDY_W::new(self)
127 }
128 #[doc = "Bit 5 - Calibration Ready Interrupt Enable"]
129 #[inline(always)]
130 pub fn calrdy(&mut self) -> CALRDY_W {
131 CALRDY_W::new(self)
132 }
133 #[doc = "Bit 6 - Calibration Overflow Interrupt Enable"]
134 #[inline(always)]
135 pub fn calof(&mut self) -> CALOF_W {
136 CALOF_W::new(self)
137 }
138 #[doc = "Writes raw bits to the register."]
139 #[inline(always)]
140 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
141 self.0.bits(bits);
142 self
143 }
144}
145#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
146pub struct IEN_SPEC;
147impl crate::RegisterSpec for IEN_SPEC {
148 type Ux = u32;
149}
150#[doc = "`read()` method returns [ien::R](R) reader structure"]
151impl crate::Readable for IEN_SPEC {
152 type Reader = R;
153}
154#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
155impl crate::Writable for IEN_SPEC {
156 type Writer = W;
157}
158#[doc = "`reset()` method sets IEN to value 0"]
159impl crate::Resettable for IEN_SPEC {
160 #[inline(always)]
161 fn reset_value() -> Self::Ux {
162 0
163 }
164}