efm32wg_pac/efm32wg230/msc/
writecmd.rs1#[doc = "Register `WRITECMD` writer"]
2pub struct W(crate::W<WRITECMD_SPEC>);
3impl core::ops::Deref for W {
4 type Target = crate::W<WRITECMD_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl core::ops::DerefMut for W {
11 #[inline(always)]
12 fn deref_mut(&mut self) -> &mut Self::Target {
13 &mut self.0
14 }
15}
16impl From<crate::W<WRITECMD_SPEC>> for W {
17 #[inline(always)]
18 fn from(writer: crate::W<WRITECMD_SPEC>) -> Self {
19 W(writer)
20 }
21}
22#[doc = "Field `LADDRIM` writer - Load MSC_ADDRB into ADDR"]
23pub type LADDRIM_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>;
24#[doc = "Field `ERASEPAGE` writer - Erase Page"]
25pub type ERASEPAGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>;
26#[doc = "Field `WRITEEND` writer - End Write Mode"]
27pub type WRITEEND_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>;
28#[doc = "Field `WRITEONCE` writer - Word Write-Once Trigger"]
29pub type WRITEONCE_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>;
30#[doc = "Field `WRITETRIG` writer - Word Write Sequence Trigger"]
31pub type WRITETRIG_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>;
32#[doc = "Field `ERASEABORT` writer - Abort erase sequence"]
33pub type ERASEABORT_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>;
34#[doc = "Field `ERASEMAIN0` writer - Mass erase region 0"]
35pub type ERASEMAIN0_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>;
36#[doc = "Field `CLEARWDATA` writer - Clear WDATA state"]
37pub type CLEARWDATA_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>;
38impl W {
39 #[doc = "Bit 0 - Load MSC_ADDRB into ADDR"]
40 #[inline(always)]
41 #[must_use]
42 pub fn laddrim(&mut self) -> LADDRIM_W<0> {
43 LADDRIM_W::new(self)
44 }
45 #[doc = "Bit 1 - Erase Page"]
46 #[inline(always)]
47 #[must_use]
48 pub fn erasepage(&mut self) -> ERASEPAGE_W<1> {
49 ERASEPAGE_W::new(self)
50 }
51 #[doc = "Bit 2 - End Write Mode"]
52 #[inline(always)]
53 #[must_use]
54 pub fn writeend(&mut self) -> WRITEEND_W<2> {
55 WRITEEND_W::new(self)
56 }
57 #[doc = "Bit 3 - Word Write-Once Trigger"]
58 #[inline(always)]
59 #[must_use]
60 pub fn writeonce(&mut self) -> WRITEONCE_W<3> {
61 WRITEONCE_W::new(self)
62 }
63 #[doc = "Bit 4 - Word Write Sequence Trigger"]
64 #[inline(always)]
65 #[must_use]
66 pub fn writetrig(&mut self) -> WRITETRIG_W<4> {
67 WRITETRIG_W::new(self)
68 }
69 #[doc = "Bit 5 - Abort erase sequence"]
70 #[inline(always)]
71 #[must_use]
72 pub fn eraseabort(&mut self) -> ERASEABORT_W<5> {
73 ERASEABORT_W::new(self)
74 }
75 #[doc = "Bit 8 - Mass erase region 0"]
76 #[inline(always)]
77 #[must_use]
78 pub fn erasemain0(&mut self) -> ERASEMAIN0_W<8> {
79 ERASEMAIN0_W::new(self)
80 }
81 #[doc = "Bit 12 - Clear WDATA state"]
82 #[inline(always)]
83 #[must_use]
84 pub fn clearwdata(&mut self) -> CLEARWDATA_W<12> {
85 CLEARWDATA_W::new(self)
86 }
87 #[doc = "Writes raw bits to the register."]
88 #[inline(always)]
89 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
90 self.0.bits(bits);
91 self
92 }
93}
94#[doc = "Write Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [writecmd](index.html) module"]
95pub struct WRITECMD_SPEC;
96impl crate::RegisterSpec for WRITECMD_SPEC {
97 type Ux = u32;
98}
99#[doc = "`write(|w| ..)` method takes [writecmd::W](W) writer structure"]
100impl crate::Writable for WRITECMD_SPEC {
101 type Writer = W;
102 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
103 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
104}
105#[doc = "`reset()` method sets WRITECMD to value 0"]
106impl crate::Resettable for WRITECMD_SPEC {
107 const RESET_VALUE: Self::Ux = 0;
108}