efm32wg_pac/efm32wg230/cmu/
oscencmd.rs

1#[doc = "Register `OSCENCMD` writer"]
2pub struct W(crate::W<OSCENCMD_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<OSCENCMD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<OSCENCMD_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<OSCENCMD_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `HFRCOEN` writer - HFRCO Enable"]
23pub type HFRCOEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, O>;
24#[doc = "Field `HFRCODIS` writer - HFRCO Disable"]
25pub type HFRCODIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, O>;
26#[doc = "Field `HFXOEN` writer - HFXO Enable"]
27pub type HFXOEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, O>;
28#[doc = "Field `HFXODIS` writer - HFXO Disable"]
29pub type HFXODIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, O>;
30#[doc = "Field `AUXHFRCOEN` writer - AUXHFRCO Enable"]
31pub type AUXHFRCOEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, O>;
32#[doc = "Field `AUXHFRCODIS` writer - AUXHFRCO Disable"]
33pub type AUXHFRCODIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, O>;
34#[doc = "Field `LFRCOEN` writer - LFRCO Enable"]
35pub type LFRCOEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, O>;
36#[doc = "Field `LFRCODIS` writer - LFRCO Disable"]
37pub type LFRCODIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, O>;
38#[doc = "Field `LFXOEN` writer - LFXO Enable"]
39pub type LFXOEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, O>;
40#[doc = "Field `LFXODIS` writer - LFXO Disable"]
41pub type LFXODIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, O>;
42impl W {
43    #[doc = "Bit 0 - HFRCO Enable"]
44    #[inline(always)]
45    #[must_use]
46    pub fn hfrcoen(&mut self) -> HFRCOEN_W<0> {
47        HFRCOEN_W::new(self)
48    }
49    #[doc = "Bit 1 - HFRCO Disable"]
50    #[inline(always)]
51    #[must_use]
52    pub fn hfrcodis(&mut self) -> HFRCODIS_W<1> {
53        HFRCODIS_W::new(self)
54    }
55    #[doc = "Bit 2 - HFXO Enable"]
56    #[inline(always)]
57    #[must_use]
58    pub fn hfxoen(&mut self) -> HFXOEN_W<2> {
59        HFXOEN_W::new(self)
60    }
61    #[doc = "Bit 3 - HFXO Disable"]
62    #[inline(always)]
63    #[must_use]
64    pub fn hfxodis(&mut self) -> HFXODIS_W<3> {
65        HFXODIS_W::new(self)
66    }
67    #[doc = "Bit 4 - AUXHFRCO Enable"]
68    #[inline(always)]
69    #[must_use]
70    pub fn auxhfrcoen(&mut self) -> AUXHFRCOEN_W<4> {
71        AUXHFRCOEN_W::new(self)
72    }
73    #[doc = "Bit 5 - AUXHFRCO Disable"]
74    #[inline(always)]
75    #[must_use]
76    pub fn auxhfrcodis(&mut self) -> AUXHFRCODIS_W<5> {
77        AUXHFRCODIS_W::new(self)
78    }
79    #[doc = "Bit 6 - LFRCO Enable"]
80    #[inline(always)]
81    #[must_use]
82    pub fn lfrcoen(&mut self) -> LFRCOEN_W<6> {
83        LFRCOEN_W::new(self)
84    }
85    #[doc = "Bit 7 - LFRCO Disable"]
86    #[inline(always)]
87    #[must_use]
88    pub fn lfrcodis(&mut self) -> LFRCODIS_W<7> {
89        LFRCODIS_W::new(self)
90    }
91    #[doc = "Bit 8 - LFXO Enable"]
92    #[inline(always)]
93    #[must_use]
94    pub fn lfxoen(&mut self) -> LFXOEN_W<8> {
95        LFXOEN_W::new(self)
96    }
97    #[doc = "Bit 9 - LFXO Disable"]
98    #[inline(always)]
99    #[must_use]
100    pub fn lfxodis(&mut self) -> LFXODIS_W<9> {
101        LFXODIS_W::new(self)
102    }
103    #[doc = "Writes raw bits to the register."]
104    #[inline(always)]
105    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
106        self.0.bits(bits);
107        self
108    }
109}
110#[doc = "Oscillator Enable/Disable Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [oscencmd](index.html) module"]
111pub struct OSCENCMD_SPEC;
112impl crate::RegisterSpec for OSCENCMD_SPEC {
113    type Ux = u32;
114}
115#[doc = "`write(|w| ..)` method takes [oscencmd::W](W) writer structure"]
116impl crate::Writable for OSCENCMD_SPEC {
117    type Writer = W;
118    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
119    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
120}
121#[doc = "`reset()` method sets OSCENCMD to value 0"]
122impl crate::Resettable for OSCENCMD_SPEC {
123    const RESET_VALUE: Self::Ux = 0;
124}
efm32wg_pac/efm32wg230/cmu/oscencmd.rs

efm32wg_pac/efm32wg230/cmu/
oscencmd.rs
