efm32wg_pac/efm32wg230/acmp1/
ctrl.rs1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `EN` reader - Analog Comparator Enable"]
38pub type EN_R = crate::BitReader<bool>;
39#[doc = "Field `EN` writer - Analog Comparator Enable"]
40pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
41#[doc = "Field `MUXEN` reader - Input Mux Enable"]
42pub type MUXEN_R = crate::BitReader<bool>;
43#[doc = "Field `MUXEN` writer - Input Mux Enable"]
44pub type MUXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
45#[doc = "Field `INACTVAL` reader - Inactive Value"]
46pub type INACTVAL_R = crate::BitReader<bool>;
47#[doc = "Field `INACTVAL` writer - Inactive Value"]
48pub type INACTVAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
49#[doc = "Field `GPIOINV` reader - Comparator GPIO Output Invert"]
50pub type GPIOINV_R = crate::BitReader<bool>;
51#[doc = "Field `GPIOINV` writer - Comparator GPIO Output Invert"]
52pub type GPIOINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
53#[doc = "Field `HYSTSEL` reader - Hysteresis Select"]
54pub type HYSTSEL_R = crate::FieldReader<u8, HYSTSEL_A>;
55#[doc = "Hysteresis Select\n\nValue on reset: 0"]
56#[derive(Clone, Copy, Debug, PartialEq, Eq)]
57#[repr(u8)]
58pub enum HYSTSEL_A {
59 #[doc = "0: No hysteresis."]
60 HYST0 = 0,
61 #[doc = "1: ~15 mV hysteresis."]
62 HYST1 = 1,
63 #[doc = "2: ~22 mV hysteresis."]
64 HYST2 = 2,
65 #[doc = "3: ~29 mV hysteresis."]
66 HYST3 = 3,
67 #[doc = "4: ~36 mV hysteresis."]
68 HYST4 = 4,
69 #[doc = "5: ~43 mV hysteresis."]
70 HYST5 = 5,
71 #[doc = "6: ~50 mV hysteresis."]
72 HYST6 = 6,
73 #[doc = "7: ~57 mV hysteresis."]
74 HYST7 = 7,
75}
76impl From<HYSTSEL_A> for u8 {
77 #[inline(always)]
78 fn from(variant: HYSTSEL_A) -> Self {
79 variant as _
80 }
81}
82impl HYSTSEL_R {
83 #[doc = "Get enumerated values variant"]
84 #[inline(always)]
85 pub fn variant(&self) -> HYSTSEL_A {
86 match self.bits {
87 0 => HYSTSEL_A::HYST0,
88 1 => HYSTSEL_A::HYST1,
89 2 => HYSTSEL_A::HYST2,
90 3 => HYSTSEL_A::HYST3,
91 4 => HYSTSEL_A::HYST4,
92 5 => HYSTSEL_A::HYST5,
93 6 => HYSTSEL_A::HYST6,
94 7 => HYSTSEL_A::HYST7,
95 _ => unreachable!(),
96 }
97 }
98 #[doc = "Checks if the value of the field is `HYST0`"]
99 #[inline(always)]
100 pub fn is_hyst0(&self) -> bool {
101 *self == HYSTSEL_A::HYST0
102 }
103 #[doc = "Checks if the value of the field is `HYST1`"]
104 #[inline(always)]
105 pub fn is_hyst1(&self) -> bool {
106 *self == HYSTSEL_A::HYST1
107 }
108 #[doc = "Checks if the value of the field is `HYST2`"]
109 #[inline(always)]
110 pub fn is_hyst2(&self) -> bool {
111 *self == HYSTSEL_A::HYST2
112 }
113 #[doc = "Checks if the value of the field is `HYST3`"]
114 #[inline(always)]
115 pub fn is_hyst3(&self) -> bool {
116 *self == HYSTSEL_A::HYST3
117 }
118 #[doc = "Checks if the value of the field is `HYST4`"]
119 #[inline(always)]
120 pub fn is_hyst4(&self) -> bool {
121 *self == HYSTSEL_A::HYST4
122 }
123 #[doc = "Checks if the value of the field is `HYST5`"]
124 #[inline(always)]
125 pub fn is_hyst5(&self) -> bool {
126 *self == HYSTSEL_A::HYST5
127 }
128 #[doc = "Checks if the value of the field is `HYST6`"]
129 #[inline(always)]
130 pub fn is_hyst6(&self) -> bool {
131 *self == HYSTSEL_A::HYST6
132 }
133 #[doc = "Checks if the value of the field is `HYST7`"]
134 #[inline(always)]
135 pub fn is_hyst7(&self) -> bool {
136 *self == HYSTSEL_A::HYST7
137 }
138}
139#[doc = "Field `HYSTSEL` writer - Hysteresis Select"]
140pub type HYSTSEL_W<'a, const O: u8> =
141 crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, HYSTSEL_A, 3, O>;
142impl<'a, const O: u8> HYSTSEL_W<'a, O> {
143 #[doc = "No hysteresis."]
144 #[inline(always)]
145 pub fn hyst0(self) -> &'a mut W {
146 self.variant(HYSTSEL_A::HYST0)
147 }
148 #[doc = "~15 mV hysteresis."]
149 #[inline(always)]
150 pub fn hyst1(self) -> &'a mut W {
151 self.variant(HYSTSEL_A::HYST1)
152 }
153 #[doc = "~22 mV hysteresis."]
154 #[inline(always)]
155 pub fn hyst2(self) -> &'a mut W {
156 self.variant(HYSTSEL_A::HYST2)
157 }
158 #[doc = "~29 mV hysteresis."]
159 #[inline(always)]
160 pub fn hyst3(self) -> &'a mut W {
161 self.variant(HYSTSEL_A::HYST3)
162 }
163 #[doc = "~36 mV hysteresis."]
164 #[inline(always)]
165 pub fn hyst4(self) -> &'a mut W {
166 self.variant(HYSTSEL_A::HYST4)
167 }
168 #[doc = "~43 mV hysteresis."]
169 #[inline(always)]
170 pub fn hyst5(self) -> &'a mut W {
171 self.variant(HYSTSEL_A::HYST5)
172 }
173 #[doc = "~50 mV hysteresis."]
174 #[inline(always)]
175 pub fn hyst6(self) -> &'a mut W {
176 self.variant(HYSTSEL_A::HYST6)
177 }
178 #[doc = "~57 mV hysteresis."]
179 #[inline(always)]
180 pub fn hyst7(self) -> &'a mut W {
181 self.variant(HYSTSEL_A::HYST7)
182 }
183}
184#[doc = "Field `WARMTIME` reader - Warm-up Time"]
185pub type WARMTIME_R = crate::FieldReader<u8, WARMTIME_A>;
186#[doc = "Warm-up Time\n\nValue on reset: 0"]
187#[derive(Clone, Copy, Debug, PartialEq, Eq)]
188#[repr(u8)]
189pub enum WARMTIME_A {
190 #[doc = "0: 4 HFPERCLK cycles."]
191 _4CYCLES = 0,
192 #[doc = "1: 8 HFPERCLK cycles."]
193 _8CYCLES = 1,
194 #[doc = "2: 16 HFPERCLK cycles."]
195 _16CYCLES = 2,
196 #[doc = "3: 32 HFPERCLK cycles."]
197 _32CYCLES = 3,
198 #[doc = "4: 64 HFPERCLK cycles."]
199 _64CYCLES = 4,
200 #[doc = "5: 128 HFPERCLK cycles."]
201 _128CYCLES = 5,
202 #[doc = "6: 256 HFPERCLK cycles."]
203 _256CYCLES = 6,
204 #[doc = "7: 512 HFPERCLK cycles."]
205 _512CYCLES = 7,
206}
207impl From<WARMTIME_A> for u8 {
208 #[inline(always)]
209 fn from(variant: WARMTIME_A) -> Self {
210 variant as _
211 }
212}
213impl WARMTIME_R {
214 #[doc = "Get enumerated values variant"]
215 #[inline(always)]
216 pub fn variant(&self) -> WARMTIME_A {
217 match self.bits {
218 0 => WARMTIME_A::_4CYCLES,
219 1 => WARMTIME_A::_8CYCLES,
220 2 => WARMTIME_A::_16CYCLES,
221 3 => WARMTIME_A::_32CYCLES,
222 4 => WARMTIME_A::_64CYCLES,
223 5 => WARMTIME_A::_128CYCLES,
224 6 => WARMTIME_A::_256CYCLES,
225 7 => WARMTIME_A::_512CYCLES,
226 _ => unreachable!(),
227 }
228 }
229 #[doc = "Checks if the value of the field is `_4CYCLES`"]
230 #[inline(always)]
231 pub fn is_4cycles(&self) -> bool {
232 *self == WARMTIME_A::_4CYCLES
233 }
234 #[doc = "Checks if the value of the field is `_8CYCLES`"]
235 #[inline(always)]
236 pub fn is_8cycles(&self) -> bool {
237 *self == WARMTIME_A::_8CYCLES
238 }
239 #[doc = "Checks if the value of the field is `_16CYCLES`"]
240 #[inline(always)]
241 pub fn is_16cycles(&self) -> bool {
242 *self == WARMTIME_A::_16CYCLES
243 }
244 #[doc = "Checks if the value of the field is `_32CYCLES`"]
245 #[inline(always)]
246 pub fn is_32cycles(&self) -> bool {
247 *self == WARMTIME_A::_32CYCLES
248 }
249 #[doc = "Checks if the value of the field is `_64CYCLES`"]
250 #[inline(always)]
251 pub fn is_64cycles(&self) -> bool {
252 *self == WARMTIME_A::_64CYCLES
253 }
254 #[doc = "Checks if the value of the field is `_128CYCLES`"]
255 #[inline(always)]
256 pub fn is_128cycles(&self) -> bool {
257 *self == WARMTIME_A::_128CYCLES
258 }
259 #[doc = "Checks if the value of the field is `_256CYCLES`"]
260 #[inline(always)]
261 pub fn is_256cycles(&self) -> bool {
262 *self == WARMTIME_A::_256CYCLES
263 }
264 #[doc = "Checks if the value of the field is `_512CYCLES`"]
265 #[inline(always)]
266 pub fn is_512cycles(&self) -> bool {
267 *self == WARMTIME_A::_512CYCLES
268 }
269}
270#[doc = "Field `WARMTIME` writer - Warm-up Time"]
271pub type WARMTIME_W<'a, const O: u8> =
272 crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, WARMTIME_A, 3, O>;
273impl<'a, const O: u8> WARMTIME_W<'a, O> {
274 #[doc = "4 HFPERCLK cycles."]
275 #[inline(always)]
276 pub fn _4cycles(self) -> &'a mut W {
277 self.variant(WARMTIME_A::_4CYCLES)
278 }
279 #[doc = "8 HFPERCLK cycles."]
280 #[inline(always)]
281 pub fn _8cycles(self) -> &'a mut W {
282 self.variant(WARMTIME_A::_8CYCLES)
283 }
284 #[doc = "16 HFPERCLK cycles."]
285 #[inline(always)]
286 pub fn _16cycles(self) -> &'a mut W {
287 self.variant(WARMTIME_A::_16CYCLES)
288 }
289 #[doc = "32 HFPERCLK cycles."]
290 #[inline(always)]
291 pub fn _32cycles(self) -> &'a mut W {
292 self.variant(WARMTIME_A::_32CYCLES)
293 }
294 #[doc = "64 HFPERCLK cycles."]
295 #[inline(always)]
296 pub fn _64cycles(self) -> &'a mut W {
297 self.variant(WARMTIME_A::_64CYCLES)
298 }
299 #[doc = "128 HFPERCLK cycles."]
300 #[inline(always)]
301 pub fn _128cycles(self) -> &'a mut W {
302 self.variant(WARMTIME_A::_128CYCLES)
303 }
304 #[doc = "256 HFPERCLK cycles."]
305 #[inline(always)]
306 pub fn _256cycles(self) -> &'a mut W {
307 self.variant(WARMTIME_A::_256CYCLES)
308 }
309 #[doc = "512 HFPERCLK cycles."]
310 #[inline(always)]
311 pub fn _512cycles(self) -> &'a mut W {
312 self.variant(WARMTIME_A::_512CYCLES)
313 }
314}
315#[doc = "Field `IRISE` reader - Rising Edge Interrupt Sense"]
316pub type IRISE_R = crate::BitReader<bool>;
317#[doc = "Field `IRISE` writer - Rising Edge Interrupt Sense"]
318pub type IRISE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
319#[doc = "Field `IFALL` reader - Falling Edge Interrupt Sense"]
320pub type IFALL_R = crate::BitReader<bool>;
321#[doc = "Field `IFALL` writer - Falling Edge Interrupt Sense"]
322pub type IFALL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
323#[doc = "Field `BIASPROG` reader - Bias Configuration"]
324pub type BIASPROG_R = crate::FieldReader<u8, u8>;
325#[doc = "Field `BIASPROG` writer - Bias Configuration"]
326pub type BIASPROG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 4, O>;
327#[doc = "Field `HALFBIAS` reader - Half Bias Current"]
328pub type HALFBIAS_R = crate::BitReader<bool>;
329#[doc = "Field `HALFBIAS` writer - Half Bias Current"]
330pub type HALFBIAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
331#[doc = "Field `FULLBIAS` reader - Full Bias Current"]
332pub type FULLBIAS_R = crate::BitReader<bool>;
333#[doc = "Field `FULLBIAS` writer - Full Bias Current"]
334pub type FULLBIAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
335impl R {
336 #[doc = "Bit 0 - Analog Comparator Enable"]
337 #[inline(always)]
338 pub fn en(&self) -> EN_R {
339 EN_R::new((self.bits & 1) != 0)
340 }
341 #[doc = "Bit 1 - Input Mux Enable"]
342 #[inline(always)]
343 pub fn muxen(&self) -> MUXEN_R {
344 MUXEN_R::new(((self.bits >> 1) & 1) != 0)
345 }
346 #[doc = "Bit 2 - Inactive Value"]
347 #[inline(always)]
348 pub fn inactval(&self) -> INACTVAL_R {
349 INACTVAL_R::new(((self.bits >> 2) & 1) != 0)
350 }
351 #[doc = "Bit 3 - Comparator GPIO Output Invert"]
352 #[inline(always)]
353 pub fn gpioinv(&self) -> GPIOINV_R {
354 GPIOINV_R::new(((self.bits >> 3) & 1) != 0)
355 }
356 #[doc = "Bits 4:6 - Hysteresis Select"]
357 #[inline(always)]
358 pub fn hystsel(&self) -> HYSTSEL_R {
359 HYSTSEL_R::new(((self.bits >> 4) & 7) as u8)
360 }
361 #[doc = "Bits 8:10 - Warm-up Time"]
362 #[inline(always)]
363 pub fn warmtime(&self) -> WARMTIME_R {
364 WARMTIME_R::new(((self.bits >> 8) & 7) as u8)
365 }
366 #[doc = "Bit 16 - Rising Edge Interrupt Sense"]
367 #[inline(always)]
368 pub fn irise(&self) -> IRISE_R {
369 IRISE_R::new(((self.bits >> 16) & 1) != 0)
370 }
371 #[doc = "Bit 17 - Falling Edge Interrupt Sense"]
372 #[inline(always)]
373 pub fn ifall(&self) -> IFALL_R {
374 IFALL_R::new(((self.bits >> 17) & 1) != 0)
375 }
376 #[doc = "Bits 24:27 - Bias Configuration"]
377 #[inline(always)]
378 pub fn biasprog(&self) -> BIASPROG_R {
379 BIASPROG_R::new(((self.bits >> 24) & 0x0f) as u8)
380 }
381 #[doc = "Bit 30 - Half Bias Current"]
382 #[inline(always)]
383 pub fn halfbias(&self) -> HALFBIAS_R {
384 HALFBIAS_R::new(((self.bits >> 30) & 1) != 0)
385 }
386 #[doc = "Bit 31 - Full Bias Current"]
387 #[inline(always)]
388 pub fn fullbias(&self) -> FULLBIAS_R {
389 FULLBIAS_R::new(((self.bits >> 31) & 1) != 0)
390 }
391}
392impl W {
393 #[doc = "Bit 0 - Analog Comparator Enable"]
394 #[inline(always)]
395 #[must_use]
396 pub fn en(&mut self) -> EN_W<0> {
397 EN_W::new(self)
398 }
399 #[doc = "Bit 1 - Input Mux Enable"]
400 #[inline(always)]
401 #[must_use]
402 pub fn muxen(&mut self) -> MUXEN_W<1> {
403 MUXEN_W::new(self)
404 }
405 #[doc = "Bit 2 - Inactive Value"]
406 #[inline(always)]
407 #[must_use]
408 pub fn inactval(&mut self) -> INACTVAL_W<2> {
409 INACTVAL_W::new(self)
410 }
411 #[doc = "Bit 3 - Comparator GPIO Output Invert"]
412 #[inline(always)]
413 #[must_use]
414 pub fn gpioinv(&mut self) -> GPIOINV_W<3> {
415 GPIOINV_W::new(self)
416 }
417 #[doc = "Bits 4:6 - Hysteresis Select"]
418 #[inline(always)]
419 #[must_use]
420 pub fn hystsel(&mut self) -> HYSTSEL_W<4> {
421 HYSTSEL_W::new(self)
422 }
423 #[doc = "Bits 8:10 - Warm-up Time"]
424 #[inline(always)]
425 #[must_use]
426 pub fn warmtime(&mut self) -> WARMTIME_W<8> {
427 WARMTIME_W::new(self)
428 }
429 #[doc = "Bit 16 - Rising Edge Interrupt Sense"]
430 #[inline(always)]
431 #[must_use]
432 pub fn irise(&mut self) -> IRISE_W<16> {
433 IRISE_W::new(self)
434 }
435 #[doc = "Bit 17 - Falling Edge Interrupt Sense"]
436 #[inline(always)]
437 #[must_use]
438 pub fn ifall(&mut self) -> IFALL_W<17> {
439 IFALL_W::new(self)
440 }
441 #[doc = "Bits 24:27 - Bias Configuration"]
442 #[inline(always)]
443 #[must_use]
444 pub fn biasprog(&mut self) -> BIASPROG_W<24> {
445 BIASPROG_W::new(self)
446 }
447 #[doc = "Bit 30 - Half Bias Current"]
448 #[inline(always)]
449 #[must_use]
450 pub fn halfbias(&mut self) -> HALFBIAS_W<30> {
451 HALFBIAS_W::new(self)
452 }
453 #[doc = "Bit 31 - Full Bias Current"]
454 #[inline(always)]
455 #[must_use]
456 pub fn fullbias(&mut self) -> FULLBIAS_W<31> {
457 FULLBIAS_W::new(self)
458 }
459 #[doc = "Writes raw bits to the register."]
460 #[inline(always)]
461 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
462 self.0.bits(bits);
463 self
464 }
465}
466#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
467pub struct CTRL_SPEC;
468impl crate::RegisterSpec for CTRL_SPEC {
469 type Ux = u32;
470}
471#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
472impl crate::Readable for CTRL_SPEC {
473 type Reader = R;
474}
475#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
476impl crate::Writable for CTRL_SPEC {
477 type Writer = W;
478 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
479 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
480}
481#[doc = "`reset()` method sets CTRL to value 0x4700_0000"]
482impl crate::Resettable for CTRL_SPEC {
483 const RESET_VALUE: Self::Ux = 0x4700_0000;
484}