efm32tg11b540_pac/wdog0/
pch1_prsctrl.rs

1#[doc = "Register `PCH1_PRSCTRL` reader"]
2pub struct R(crate::R<PCH1_PRSCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PCH1_PRSCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PCH1_PRSCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PCH1_PRSCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PCH1_PRSCTRL` writer"]
17pub struct W(crate::W<PCH1_PRSCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PCH1_PRSCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PCH1_PRSCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PCH1_PRSCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "PRS Channel PRS Select\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum PRSSEL_A {
41    #[doc = "0: PRS Channel 0 selected as input"]
42    PRSCH0 = 0,
43    #[doc = "1: PRS Channel 1 selected as input"]
44    PRSCH1 = 1,
45    #[doc = "2: PRS Channel 2 selected as input"]
46    PRSCH2 = 2,
47    #[doc = "3: PRS Channel 3 selected as input"]
48    PRSCH3 = 3,
49    #[doc = "4: PRS Channel 4 selected as input"]
50    PRSCH4 = 4,
51    #[doc = "5: PRS Channel 5 selected as input"]
52    PRSCH5 = 5,
53    #[doc = "6: PRS Channel 6 selected as input"]
54    PRSCH6 = 6,
55    #[doc = "7: PRS Channel 7 selected as input"]
56    PRSCH7 = 7,
57}
58impl From<PRSSEL_A> for u8 {
59    #[inline(always)]
60    fn from(variant: PRSSEL_A) -> Self {
61        variant as _
62    }
63}
64#[doc = "Field `PRSSEL` reader - PRS Channel PRS Select"]
65pub type PRSSEL_R = crate::FieldReader<u8, PRSSEL_A>;
66impl PRSSEL_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> PRSSEL_A {
70        match self.bits {
71            0 => PRSSEL_A::PRSCH0,
72            1 => PRSSEL_A::PRSCH1,
73            2 => PRSSEL_A::PRSCH2,
74            3 => PRSSEL_A::PRSCH3,
75            4 => PRSSEL_A::PRSCH4,
76            5 => PRSSEL_A::PRSCH5,
77            6 => PRSSEL_A::PRSCH6,
78            7 => PRSSEL_A::PRSCH7,
79            _ => unreachable!(),
80        }
81    }
82    #[doc = "Checks if the value of the field is `PRSCH0`"]
83    #[inline(always)]
84    pub fn is_prsch0(&self) -> bool {
85        *self == PRSSEL_A::PRSCH0
86    }
87    #[doc = "Checks if the value of the field is `PRSCH1`"]
88    #[inline(always)]
89    pub fn is_prsch1(&self) -> bool {
90        *self == PRSSEL_A::PRSCH1
91    }
92    #[doc = "Checks if the value of the field is `PRSCH2`"]
93    #[inline(always)]
94    pub fn is_prsch2(&self) -> bool {
95        *self == PRSSEL_A::PRSCH2
96    }
97    #[doc = "Checks if the value of the field is `PRSCH3`"]
98    #[inline(always)]
99    pub fn is_prsch3(&self) -> bool {
100        *self == PRSSEL_A::PRSCH3
101    }
102    #[doc = "Checks if the value of the field is `PRSCH4`"]
103    #[inline(always)]
104    pub fn is_prsch4(&self) -> bool {
105        *self == PRSSEL_A::PRSCH4
106    }
107    #[doc = "Checks if the value of the field is `PRSCH5`"]
108    #[inline(always)]
109    pub fn is_prsch5(&self) -> bool {
110        *self == PRSSEL_A::PRSCH5
111    }
112    #[doc = "Checks if the value of the field is `PRSCH6`"]
113    #[inline(always)]
114    pub fn is_prsch6(&self) -> bool {
115        *self == PRSSEL_A::PRSCH6
116    }
117    #[doc = "Checks if the value of the field is `PRSCH7`"]
118    #[inline(always)]
119    pub fn is_prsch7(&self) -> bool {
120        *self == PRSSEL_A::PRSCH7
121    }
122}
123#[doc = "Field `PRSSEL` writer - PRS Channel PRS Select"]
124pub type PRSSEL_W<'a> = crate::FieldWriterSafe<'a, u32, PCH1_PRSCTRL_SPEC, u8, PRSSEL_A, 3, 0>;
125impl<'a> PRSSEL_W<'a> {
126    #[doc = "PRS Channel 0 selected as input"]
127    #[inline(always)]
128    pub fn prsch0(self) -> &'a mut W {
129        self.variant(PRSSEL_A::PRSCH0)
130    }
131    #[doc = "PRS Channel 1 selected as input"]
132    #[inline(always)]
133    pub fn prsch1(self) -> &'a mut W {
134        self.variant(PRSSEL_A::PRSCH1)
135    }
136    #[doc = "PRS Channel 2 selected as input"]
137    #[inline(always)]
138    pub fn prsch2(self) -> &'a mut W {
139        self.variant(PRSSEL_A::PRSCH2)
140    }
141    #[doc = "PRS Channel 3 selected as input"]
142    #[inline(always)]
143    pub fn prsch3(self) -> &'a mut W {
144        self.variant(PRSSEL_A::PRSCH3)
145    }
146    #[doc = "PRS Channel 4 selected as input"]
147    #[inline(always)]
148    pub fn prsch4(self) -> &'a mut W {
149        self.variant(PRSSEL_A::PRSCH4)
150    }
151    #[doc = "PRS Channel 5 selected as input"]
152    #[inline(always)]
153    pub fn prsch5(self) -> &'a mut W {
154        self.variant(PRSSEL_A::PRSCH5)
155    }
156    #[doc = "PRS Channel 6 selected as input"]
157    #[inline(always)]
158    pub fn prsch6(self) -> &'a mut W {
159        self.variant(PRSSEL_A::PRSCH6)
160    }
161    #[doc = "PRS Channel 7 selected as input"]
162    #[inline(always)]
163    pub fn prsch7(self) -> &'a mut W {
164        self.variant(PRSSEL_A::PRSCH7)
165    }
166}
167#[doc = "Field `PRSMISSRSTEN` reader - PRS Missing Event Will Trigger a Watchdog Reset"]
168pub type PRSMISSRSTEN_R = crate::BitReader<bool>;
169#[doc = "Field `PRSMISSRSTEN` writer - PRS Missing Event Will Trigger a Watchdog Reset"]
170pub type PRSMISSRSTEN_W<'a> = crate::BitWriter<'a, u32, PCH1_PRSCTRL_SPEC, bool, 8>;
171impl R {
172    #[doc = "Bits 0:2 - PRS Channel PRS Select"]
173    #[inline(always)]
174    pub fn prssel(&self) -> PRSSEL_R {
175        PRSSEL_R::new((self.bits & 7) as u8)
176    }
177    #[doc = "Bit 8 - PRS Missing Event Will Trigger a Watchdog Reset"]
178    #[inline(always)]
179    pub fn prsmissrsten(&self) -> PRSMISSRSTEN_R {
180        PRSMISSRSTEN_R::new(((self.bits >> 8) & 1) != 0)
181    }
182}
183impl W {
184    #[doc = "Bits 0:2 - PRS Channel PRS Select"]
185    #[inline(always)]
186    pub fn prssel(&mut self) -> PRSSEL_W {
187        PRSSEL_W::new(self)
188    }
189    #[doc = "Bit 8 - PRS Missing Event Will Trigger a Watchdog Reset"]
190    #[inline(always)]
191    pub fn prsmissrsten(&mut self) -> PRSMISSRSTEN_W {
192        PRSMISSRSTEN_W::new(self)
193    }
194    #[doc = "Writes raw bits to the register."]
195    #[inline(always)]
196    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
197        self.0.bits(bits);
198        self
199    }
200}
201#[doc = "PRS Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pch1_prsctrl](index.html) module"]
202pub struct PCH1_PRSCTRL_SPEC;
203impl crate::RegisterSpec for PCH1_PRSCTRL_SPEC {
204    type Ux = u32;
205}
206#[doc = "`read()` method returns [pch1_prsctrl::R](R) reader structure"]
207impl crate::Readable for PCH1_PRSCTRL_SPEC {
208    type Reader = R;
209}
210#[doc = "`write(|w| ..)` method takes [pch1_prsctrl::W](W) writer structure"]
211impl crate::Writable for PCH1_PRSCTRL_SPEC {
212    type Writer = W;
213}
214#[doc = "`reset()` method sets PCH1_PRSCTRL to value 0"]
215impl crate::Resettable for PCH1_PRSCTRL_SPEC {
216    #[inline(always)]
217    fn reset_value() -> Self::Ux {
218        0
219    }
220}
efm32tg11b540_pac/wdog0/pch1_prsctrl.rs

efm32tg11b540_pac/wdog0/
pch1_prsctrl.rs
