efm32tg11b540_pac/gpio/
extilevel.rs

1#[doc = "Register `EXTILEVEL` reader"]
2pub struct R(crate::R<EXTILEVEL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<EXTILEVEL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<EXTILEVEL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<EXTILEVEL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `EXTILEVEL` writer"]
17pub struct W(crate::W<EXTILEVEL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<EXTILEVEL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<EXTILEVEL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<EXTILEVEL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EM4WU0` reader - EM4 Wake Up Level for EM4WU0 Pin"]
38pub type EM4WU0_R = crate::BitReader<bool>;
39#[doc = "Field `EM4WU0` writer - EM4 Wake Up Level for EM4WU0 Pin"]
40pub type EM4WU0_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 16>;
41#[doc = "Field `EM4WU1` reader - EM4 Wake Up Level for EM4WU1 Pin"]
42pub type EM4WU1_R = crate::BitReader<bool>;
43#[doc = "Field `EM4WU1` writer - EM4 Wake Up Level for EM4WU1 Pin"]
44pub type EM4WU1_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 17>;
45#[doc = "Field `EM4WU2` reader - EM4 Wake Up Level for EM4WU2 Pin"]
46pub type EM4WU2_R = crate::BitReader<bool>;
47#[doc = "Field `EM4WU2` writer - EM4 Wake Up Level for EM4WU2 Pin"]
48pub type EM4WU2_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 18>;
49#[doc = "Field `EM4WU3` reader - EM4 Wake Up Level for EM4WU3 Pin"]
50pub type EM4WU3_R = crate::BitReader<bool>;
51#[doc = "Field `EM4WU3` writer - EM4 Wake Up Level for EM4WU3 Pin"]
52pub type EM4WU3_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 19>;
53#[doc = "Field `EM4WU4` reader - EM4 Wake Up Level for EM4WU4 Pin"]
54pub type EM4WU4_R = crate::BitReader<bool>;
55#[doc = "Field `EM4WU4` writer - EM4 Wake Up Level for EM4WU4 Pin"]
56pub type EM4WU4_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 20>;
57#[doc = "Field `EM4WU5` reader - EM4 Wake Up Level for EM4WU5 Pin"]
58pub type EM4WU5_R = crate::BitReader<bool>;
59#[doc = "Field `EM4WU5` writer - EM4 Wake Up Level for EM4WU5 Pin"]
60pub type EM4WU5_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 21>;
61#[doc = "Field `EM4WU6` reader - EM4 Wake Up Level for EM4WU6 Pin"]
62pub type EM4WU6_R = crate::BitReader<bool>;
63#[doc = "Field `EM4WU6` writer - EM4 Wake Up Level for EM4WU6 Pin"]
64pub type EM4WU6_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 22>;
65#[doc = "Field `EM4WU7` reader - EM4 Wake Up Level for EM4WU7 Pin"]
66pub type EM4WU7_R = crate::BitReader<bool>;
67#[doc = "Field `EM4WU7` writer - EM4 Wake Up Level for EM4WU7 Pin"]
68pub type EM4WU7_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 23>;
69#[doc = "Field `EM4WU9` reader - EM4 Wake Up Level for EM4WU9 Pin"]
70pub type EM4WU9_R = crate::BitReader<bool>;
71#[doc = "Field `EM4WU9` writer - EM4 Wake Up Level for EM4WU9 Pin"]
72pub type EM4WU9_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 25>;
73impl R {
74    #[doc = "Bit 16 - EM4 Wake Up Level for EM4WU0 Pin"]
75    #[inline(always)]
76    pub fn em4wu0(&self) -> EM4WU0_R {
77        EM4WU0_R::new(((self.bits >> 16) & 1) != 0)
78    }
79    #[doc = "Bit 17 - EM4 Wake Up Level for EM4WU1 Pin"]
80    #[inline(always)]
81    pub fn em4wu1(&self) -> EM4WU1_R {
82        EM4WU1_R::new(((self.bits >> 17) & 1) != 0)
83    }
84    #[doc = "Bit 18 - EM4 Wake Up Level for EM4WU2 Pin"]
85    #[inline(always)]
86    pub fn em4wu2(&self) -> EM4WU2_R {
87        EM4WU2_R::new(((self.bits >> 18) & 1) != 0)
88    }
89    #[doc = "Bit 19 - EM4 Wake Up Level for EM4WU3 Pin"]
90    #[inline(always)]
91    pub fn em4wu3(&self) -> EM4WU3_R {
92        EM4WU3_R::new(((self.bits >> 19) & 1) != 0)
93    }
94    #[doc = "Bit 20 - EM4 Wake Up Level for EM4WU4 Pin"]
95    #[inline(always)]
96    pub fn em4wu4(&self) -> EM4WU4_R {
97        EM4WU4_R::new(((self.bits >> 20) & 1) != 0)
98    }
99    #[doc = "Bit 21 - EM4 Wake Up Level for EM4WU5 Pin"]
100    #[inline(always)]
101    pub fn em4wu5(&self) -> EM4WU5_R {
102        EM4WU5_R::new(((self.bits >> 21) & 1) != 0)
103    }
104    #[doc = "Bit 22 - EM4 Wake Up Level for EM4WU6 Pin"]
105    #[inline(always)]
106    pub fn em4wu6(&self) -> EM4WU6_R {
107        EM4WU6_R::new(((self.bits >> 22) & 1) != 0)
108    }
109    #[doc = "Bit 23 - EM4 Wake Up Level for EM4WU7 Pin"]
110    #[inline(always)]
111    pub fn em4wu7(&self) -> EM4WU7_R {
112        EM4WU7_R::new(((self.bits >> 23) & 1) != 0)
113    }
114    #[doc = "Bit 25 - EM4 Wake Up Level for EM4WU9 Pin"]
115    #[inline(always)]
116    pub fn em4wu9(&self) -> EM4WU9_R {
117        EM4WU9_R::new(((self.bits >> 25) & 1) != 0)
118    }
119}
120impl W {
121    #[doc = "Bit 16 - EM4 Wake Up Level for EM4WU0 Pin"]
122    #[inline(always)]
123    pub fn em4wu0(&mut self) -> EM4WU0_W {
124        EM4WU0_W::new(self)
125    }
126    #[doc = "Bit 17 - EM4 Wake Up Level for EM4WU1 Pin"]
127    #[inline(always)]
128    pub fn em4wu1(&mut self) -> EM4WU1_W {
129        EM4WU1_W::new(self)
130    }
131    #[doc = "Bit 18 - EM4 Wake Up Level for EM4WU2 Pin"]
132    #[inline(always)]
133    pub fn em4wu2(&mut self) -> EM4WU2_W {
134        EM4WU2_W::new(self)
135    }
136    #[doc = "Bit 19 - EM4 Wake Up Level for EM4WU3 Pin"]
137    #[inline(always)]
138    pub fn em4wu3(&mut self) -> EM4WU3_W {
139        EM4WU3_W::new(self)
140    }
141    #[doc = "Bit 20 - EM4 Wake Up Level for EM4WU4 Pin"]
142    #[inline(always)]
143    pub fn em4wu4(&mut self) -> EM4WU4_W {
144        EM4WU4_W::new(self)
145    }
146    #[doc = "Bit 21 - EM4 Wake Up Level for EM4WU5 Pin"]
147    #[inline(always)]
148    pub fn em4wu5(&mut self) -> EM4WU5_W {
149        EM4WU5_W::new(self)
150    }
151    #[doc = "Bit 22 - EM4 Wake Up Level for EM4WU6 Pin"]
152    #[inline(always)]
153    pub fn em4wu6(&mut self) -> EM4WU6_W {
154        EM4WU6_W::new(self)
155    }
156    #[doc = "Bit 23 - EM4 Wake Up Level for EM4WU7 Pin"]
157    #[inline(always)]
158    pub fn em4wu7(&mut self) -> EM4WU7_W {
159        EM4WU7_W::new(self)
160    }
161    #[doc = "Bit 25 - EM4 Wake Up Level for EM4WU9 Pin"]
162    #[inline(always)]
163    pub fn em4wu9(&mut self) -> EM4WU9_W {
164        EM4WU9_W::new(self)
165    }
166    #[doc = "Writes raw bits to the register."]
167    #[inline(always)]
168    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
169        self.0.bits(bits);
170        self
171    }
172}
173#[doc = "External Interrupt Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extilevel](index.html) module"]
174pub struct EXTILEVEL_SPEC;
175impl crate::RegisterSpec for EXTILEVEL_SPEC {
176    type Ux = u32;
177}
178#[doc = "`read()` method returns [extilevel::R](R) reader structure"]
179impl crate::Readable for EXTILEVEL_SPEC {
180    type Reader = R;
181}
182#[doc = "`write(|w| ..)` method takes [extilevel::W](W) writer structure"]
183impl crate::Writable for EXTILEVEL_SPEC {
184    type Writer = W;
185}
186#[doc = "`reset()` method sets EXTILEVEL to value 0"]
187impl crate::Resettable for EXTILEVEL_SPEC {
188    #[inline(always)]
189    fn reset_value() -> Self::Ux {
190        0
191    }
192}
efm32tg11b540_pac/gpio/extilevel.rs

efm32tg11b540_pac/gpio/
extilevel.rs
