efm32tg11b540_pac/can0/
status.rs1#[doc = "Register `STATUS` reader"]
2pub struct R(crate::R<STATUS_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<STATUS_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<STATUS_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<STATUS_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `STATUS` writer"]
17pub struct W(crate::W<STATUS_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<STATUS_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<STATUS_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<STATUS_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Last Error Code\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum LEC_A {
41 #[doc = "0: No error occurred during last CAN bus event."]
42 NONE = 0,
43 #[doc = "1: More than 5 equal bits in a sequence have occurred in a part of a received message where this is not allowed."]
44 STUFF = 1,
45 #[doc = "2: A fixed format part of a received frame has the wrong format."]
46 FORM = 2,
47 #[doc = "3: The message this CAN Core transmitted was not acknowledged by another node."]
48 ACK = 3,
49 #[doc = "4: During the transmission of a message (with the exception of the arbitration field), the device wanted to send a recessive level (bit of logical value 1), but the monitored bus value was dominant."]
50 BIT1 = 4,
51 #[doc = "5: During the transmission of a message (or acknowledge bit, or active error flag, or overload flag), the device wanted to send a dominant level (data or identifier bit logical value 0), but the monitored Bus value was recessive. During Bus Off recovery this status is set each time a sequence of 11 recessive bits has been monitored. This enables the CPU to monitor the proceeding of the Bus Off recovery sequence (indicating the bus is not stuck at dominant or continuously disturbed)."]
52 BIT0 = 5,
53 #[doc = "6: The CRC check sum was incorrect in the message received; the CRC received for an incoming message does not match with the calculated CRC for the received data."]
54 CRC = 6,
55 #[doc = "7: When the LEC shows the value '7', no CAN bus event was detected since the CPU wrote this value to the LEC."]
56 UNUSED = 7,
57}
58impl From<LEC_A> for u8 {
59 #[inline(always)]
60 fn from(variant: LEC_A) -> Self {
61 variant as _
62 }
63}
64#[doc = "Field `LEC` reader - Last Error Code"]
65pub type LEC_R = crate::FieldReader<u8, LEC_A>;
66impl LEC_R {
67 #[doc = "Get enumerated values variant"]
68 #[inline(always)]
69 pub fn variant(&self) -> LEC_A {
70 match self.bits {
71 0 => LEC_A::NONE,
72 1 => LEC_A::STUFF,
73 2 => LEC_A::FORM,
74 3 => LEC_A::ACK,
75 4 => LEC_A::BIT1,
76 5 => LEC_A::BIT0,
77 6 => LEC_A::CRC,
78 7 => LEC_A::UNUSED,
79 _ => unreachable!(),
80 }
81 }
82 #[doc = "Checks if the value of the field is `NONE`"]
83 #[inline(always)]
84 pub fn is_none(&self) -> bool {
85 *self == LEC_A::NONE
86 }
87 #[doc = "Checks if the value of the field is `STUFF`"]
88 #[inline(always)]
89 pub fn is_stuff(&self) -> bool {
90 *self == LEC_A::STUFF
91 }
92 #[doc = "Checks if the value of the field is `FORM`"]
93 #[inline(always)]
94 pub fn is_form(&self) -> bool {
95 *self == LEC_A::FORM
96 }
97 #[doc = "Checks if the value of the field is `ACK`"]
98 #[inline(always)]
99 pub fn is_ack(&self) -> bool {
100 *self == LEC_A::ACK
101 }
102 #[doc = "Checks if the value of the field is `BIT1`"]
103 #[inline(always)]
104 pub fn is_bit1(&self) -> bool {
105 *self == LEC_A::BIT1
106 }
107 #[doc = "Checks if the value of the field is `BIT0`"]
108 #[inline(always)]
109 pub fn is_bit0(&self) -> bool {
110 *self == LEC_A::BIT0
111 }
112 #[doc = "Checks if the value of the field is `CRC`"]
113 #[inline(always)]
114 pub fn is_crc(&self) -> bool {
115 *self == LEC_A::CRC
116 }
117 #[doc = "Checks if the value of the field is `UNUSED`"]
118 #[inline(always)]
119 pub fn is_unused(&self) -> bool {
120 *self == LEC_A::UNUSED
121 }
122}
123#[doc = "Field `LEC` writer - Last Error Code"]
124pub type LEC_W<'a> = crate::FieldWriterSafe<'a, u32, STATUS_SPEC, u8, LEC_A, 3, 0>;
125impl<'a> LEC_W<'a> {
126 #[doc = "No error occurred during last CAN bus event."]
127 #[inline(always)]
128 pub fn none(self) -> &'a mut W {
129 self.variant(LEC_A::NONE)
130 }
131 #[doc = "More than 5 equal bits in a sequence have occurred in a part of a received message where this is not allowed."]
132 #[inline(always)]
133 pub fn stuff(self) -> &'a mut W {
134 self.variant(LEC_A::STUFF)
135 }
136 #[doc = "A fixed format part of a received frame has the wrong format."]
137 #[inline(always)]
138 pub fn form(self) -> &'a mut W {
139 self.variant(LEC_A::FORM)
140 }
141 #[doc = "The message this CAN Core transmitted was not acknowledged by another node."]
142 #[inline(always)]
143 pub fn ack(self) -> &'a mut W {
144 self.variant(LEC_A::ACK)
145 }
146 #[doc = "During the transmission of a message (with the exception of the arbitration field), the device wanted to send a recessive level (bit of logical value 1), but the monitored bus value was dominant."]
147 #[inline(always)]
148 pub fn bit1(self) -> &'a mut W {
149 self.variant(LEC_A::BIT1)
150 }
151 #[doc = "During the transmission of a message (or acknowledge bit, or active error flag, or overload flag), the device wanted to send a dominant level (data or identifier bit logical value 0), but the monitored Bus value was recessive. During Bus Off recovery this status is set each time a sequence of 11 recessive bits has been monitored. This enables the CPU to monitor the proceeding of the Bus Off recovery sequence (indicating the bus is not stuck at dominant or continuously disturbed)."]
152 #[inline(always)]
153 pub fn bit0(self) -> &'a mut W {
154 self.variant(LEC_A::BIT0)
155 }
156 #[doc = "The CRC check sum was incorrect in the message received; the CRC received for an incoming message does not match with the calculated CRC for the received data."]
157 #[inline(always)]
158 pub fn crc(self) -> &'a mut W {
159 self.variant(LEC_A::CRC)
160 }
161 #[doc = "When the LEC shows the value '7', no CAN bus event was detected since the CPU wrote this value to the LEC."]
162 #[inline(always)]
163 pub fn unused(self) -> &'a mut W {
164 self.variant(LEC_A::UNUSED)
165 }
166}
167#[doc = "Field `TXOK` reader - Transmitted a Message Successfully"]
168pub type TXOK_R = crate::BitReader<bool>;
169#[doc = "Field `TXOK` writer - Transmitted a Message Successfully"]
170pub type TXOK_W<'a> = crate::BitWriter<'a, u32, STATUS_SPEC, bool, 3>;
171#[doc = "Field `RXOK` reader - Received a Message Successfully"]
172pub type RXOK_R = crate::BitReader<bool>;
173#[doc = "Field `RXOK` writer - Received a Message Successfully"]
174pub type RXOK_W<'a> = crate::BitWriter<'a, u32, STATUS_SPEC, bool, 4>;
175#[doc = "Field `EPASS` reader - Error Passive"]
176pub type EPASS_R = crate::BitReader<bool>;
177#[doc = "Field `EWARN` reader - Warning Status"]
178pub type EWARN_R = crate::BitReader<bool>;
179#[doc = "Field `BOFF` reader - Bus Off Status"]
180pub type BOFF_R = crate::BitReader<bool>;
181impl R {
182 #[doc = "Bits 0:2 - Last Error Code"]
183 #[inline(always)]
184 pub fn lec(&self) -> LEC_R {
185 LEC_R::new((self.bits & 7) as u8)
186 }
187 #[doc = "Bit 3 - Transmitted a Message Successfully"]
188 #[inline(always)]
189 pub fn txok(&self) -> TXOK_R {
190 TXOK_R::new(((self.bits >> 3) & 1) != 0)
191 }
192 #[doc = "Bit 4 - Received a Message Successfully"]
193 #[inline(always)]
194 pub fn rxok(&self) -> RXOK_R {
195 RXOK_R::new(((self.bits >> 4) & 1) != 0)
196 }
197 #[doc = "Bit 5 - Error Passive"]
198 #[inline(always)]
199 pub fn epass(&self) -> EPASS_R {
200 EPASS_R::new(((self.bits >> 5) & 1) != 0)
201 }
202 #[doc = "Bit 6 - Warning Status"]
203 #[inline(always)]
204 pub fn ewarn(&self) -> EWARN_R {
205 EWARN_R::new(((self.bits >> 6) & 1) != 0)
206 }
207 #[doc = "Bit 7 - Bus Off Status"]
208 #[inline(always)]
209 pub fn boff(&self) -> BOFF_R {
210 BOFF_R::new(((self.bits >> 7) & 1) != 0)
211 }
212}
213impl W {
214 #[doc = "Bits 0:2 - Last Error Code"]
215 #[inline(always)]
216 pub fn lec(&mut self) -> LEC_W {
217 LEC_W::new(self)
218 }
219 #[doc = "Bit 3 - Transmitted a Message Successfully"]
220 #[inline(always)]
221 pub fn txok(&mut self) -> TXOK_W {
222 TXOK_W::new(self)
223 }
224 #[doc = "Bit 4 - Received a Message Successfully"]
225 #[inline(always)]
226 pub fn rxok(&mut self) -> RXOK_W {
227 RXOK_W::new(self)
228 }
229 #[doc = "Writes raw bits to the register."]
230 #[inline(always)]
231 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
232 self.0.bits(bits);
233 self
234 }
235}
236#[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
237pub struct STATUS_SPEC;
238impl crate::RegisterSpec for STATUS_SPEC {
239 type Ux = u32;
240}
241#[doc = "`read()` method returns [status::R](R) reader structure"]
242impl crate::Readable for STATUS_SPEC {
243 type Reader = R;
244}
245#[doc = "`write(|w| ..)` method takes [status::W](W) writer structure"]
246impl crate::Writable for STATUS_SPEC {
247 type Writer = W;
248}
249#[doc = "`reset()` method sets STATUS to value 0"]
250impl crate::Resettable for STATUS_SPEC {
251 #[inline(always)]
252 fn reset_value() -> Self::Ux {
253 0
254 }
255}