1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Mode Select\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum MODE_A {
41 #[doc = "0: The module is disabled."]
42 DISABLE = 0,
43 #[doc = "1: Single input LFACLK oversampling mode (available in EM0-EM3)."]
44 OVSSINGLE = 1,
45 #[doc = "2: Externally clocked single input counter mode (available in EM0-EM3)."]
46 EXTCLKSINGLE = 2,
47 #[doc = "3: Externally clocked quadrature decoder mode (available in EM0-EM3)."]
48 EXTCLKQUAD = 3,
49 #[doc = "4: LFACLK oversampling quadrature decoder 1X mode (available in EM0-EM3)."]
50 OVSQUAD1X = 4,
51 #[doc = "5: LFACLK oversampling quadrature decoder 2X mode (available in EM0-EM3)."]
52 OVSQUAD2X = 5,
53 #[doc = "6: LFACLK oversampling quadrature decoder 4X mode (available in EM0-EM3)."]
54 OVSQUAD4X = 6,
55}
56impl From<MODE_A> for u8 {
57 #[inline(always)]
58 fn from(variant: MODE_A) -> Self {
59 variant as _
60 }
61}
62#[doc = "Field `MODE` reader - Mode Select"]
63pub type MODE_R = crate::FieldReader<u8, MODE_A>;
64impl MODE_R {
65 #[doc = "Get enumerated values variant"]
66 #[inline(always)]
67 pub fn variant(&self) -> Option<MODE_A> {
68 match self.bits {
69 0 => Some(MODE_A::DISABLE),
70 1 => Some(MODE_A::OVSSINGLE),
71 2 => Some(MODE_A::EXTCLKSINGLE),
72 3 => Some(MODE_A::EXTCLKQUAD),
73 4 => Some(MODE_A::OVSQUAD1X),
74 5 => Some(MODE_A::OVSQUAD2X),
75 6 => Some(MODE_A::OVSQUAD4X),
76 _ => None,
77 }
78 }
79 #[doc = "Checks if the value of the field is `DISABLE`"]
80 #[inline(always)]
81 pub fn is_disable(&self) -> bool {
82 *self == MODE_A::DISABLE
83 }
84 #[doc = "Checks if the value of the field is `OVSSINGLE`"]
85 #[inline(always)]
86 pub fn is_ovssingle(&self) -> bool {
87 *self == MODE_A::OVSSINGLE
88 }
89 #[doc = "Checks if the value of the field is `EXTCLKSINGLE`"]
90 #[inline(always)]
91 pub fn is_extclksingle(&self) -> bool {
92 *self == MODE_A::EXTCLKSINGLE
93 }
94 #[doc = "Checks if the value of the field is `EXTCLKQUAD`"]
95 #[inline(always)]
96 pub fn is_extclkquad(&self) -> bool {
97 *self == MODE_A::EXTCLKQUAD
98 }
99 #[doc = "Checks if the value of the field is `OVSQUAD1X`"]
100 #[inline(always)]
101 pub fn is_ovsquad1x(&self) -> bool {
102 *self == MODE_A::OVSQUAD1X
103 }
104 #[doc = "Checks if the value of the field is `OVSQUAD2X`"]
105 #[inline(always)]
106 pub fn is_ovsquad2x(&self) -> bool {
107 *self == MODE_A::OVSQUAD2X
108 }
109 #[doc = "Checks if the value of the field is `OVSQUAD4X`"]
110 #[inline(always)]
111 pub fn is_ovsquad4x(&self) -> bool {
112 *self == MODE_A::OVSQUAD4X
113 }
114}
115#[doc = "Field `MODE` writer - Mode Select"]
116pub type MODE_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, MODE_A, 3, 0>;
117impl<'a> MODE_W<'a> {
118 #[doc = "The module is disabled."]
119 #[inline(always)]
120 pub fn disable(self) -> &'a mut W {
121 self.variant(MODE_A::DISABLE)
122 }
123 #[doc = "Single input LFACLK oversampling mode (available in EM0-EM3)."]
124 #[inline(always)]
125 pub fn ovssingle(self) -> &'a mut W {
126 self.variant(MODE_A::OVSSINGLE)
127 }
128 #[doc = "Externally clocked single input counter mode (available in EM0-EM3)."]
129 #[inline(always)]
130 pub fn extclksingle(self) -> &'a mut W {
131 self.variant(MODE_A::EXTCLKSINGLE)
132 }
133 #[doc = "Externally clocked quadrature decoder mode (available in EM0-EM3)."]
134 #[inline(always)]
135 pub fn extclkquad(self) -> &'a mut W {
136 self.variant(MODE_A::EXTCLKQUAD)
137 }
138 #[doc = "LFACLK oversampling quadrature decoder 1X mode (available in EM0-EM3)."]
139 #[inline(always)]
140 pub fn ovsquad1x(self) -> &'a mut W {
141 self.variant(MODE_A::OVSQUAD1X)
142 }
143 #[doc = "LFACLK oversampling quadrature decoder 2X mode (available in EM0-EM3)."]
144 #[inline(always)]
145 pub fn ovsquad2x(self) -> &'a mut W {
146 self.variant(MODE_A::OVSQUAD2X)
147 }
148 #[doc = "LFACLK oversampling quadrature decoder 4X mode (available in EM0-EM3)."]
149 #[inline(always)]
150 pub fn ovsquad4x(self) -> &'a mut W {
151 self.variant(MODE_A::OVSQUAD4X)
152 }
153}
154#[doc = "Field `FILT` reader - Enable Digital Pulse Width Filter"]
155pub type FILT_R = crate::BitReader<bool>;
156#[doc = "Field `FILT` writer - Enable Digital Pulse Width Filter"]
157pub type FILT_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 3>;
158#[doc = "Field `RSTEN` reader - Enable PCNT Clock Domain Reset"]
159pub type RSTEN_R = crate::BitReader<bool>;
160#[doc = "Field `RSTEN` writer - Enable PCNT Clock Domain Reset"]
161pub type RSTEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 4>;
162#[doc = "Field `CNTRSTEN` reader - Enable CNT Reset"]
163pub type CNTRSTEN_R = crate::BitReader<bool>;
164#[doc = "Field `CNTRSTEN` writer - Enable CNT Reset"]
165pub type CNTRSTEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 5>;
166#[doc = "Field `AUXCNTRSTEN` reader - Enable AUXCNT Reset"]
167pub type AUXCNTRSTEN_R = crate::BitReader<bool>;
168#[doc = "Field `AUXCNTRSTEN` writer - Enable AUXCNT Reset"]
169pub type AUXCNTRSTEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 6>;
170#[doc = "Field `DEBUGHALT` reader - Debug Mode Halt Enable"]
171pub type DEBUGHALT_R = crate::BitReader<bool>;
172#[doc = "Field `DEBUGHALT` writer - Debug Mode Halt Enable"]
173pub type DEBUGHALT_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 7>;
174#[doc = "Field `HYST` reader - Enable Hysteresis"]
175pub type HYST_R = crate::BitReader<bool>;
176#[doc = "Field `HYST` writer - Enable Hysteresis"]
177pub type HYST_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 8>;
178#[doc = "Field `S1CDIR` reader - Count Direction Determined By S1"]
179pub type S1CDIR_R = crate::BitReader<bool>;
180#[doc = "Field `S1CDIR` writer - Count Direction Determined By S1"]
181pub type S1CDIR_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 9>;
182#[doc = "Controls When the Counter Counts\n\nValue on reset: 0"]
183#[derive(Clone, Copy, Debug, PartialEq)]
184#[repr(u8)]
185pub enum CNTEV_A {
186 #[doc = "0: Counts up on up-count and down on down-count events."]
187 BOTH = 0,
188 #[doc = "1: Only counts up on up-count events."]
189 UP = 1,
190 #[doc = "2: Only counts down on down-count events."]
191 DOWN = 2,
192 #[doc = "3: Never counts."]
193 NONE = 3,
194}
195impl From<CNTEV_A> for u8 {
196 #[inline(always)]
197 fn from(variant: CNTEV_A) -> Self {
198 variant as _
199 }
200}
201#[doc = "Field `CNTEV` reader - Controls When the Counter Counts"]
202pub type CNTEV_R = crate::FieldReader<u8, CNTEV_A>;
203impl CNTEV_R {
204 #[doc = "Get enumerated values variant"]
205 #[inline(always)]
206 pub fn variant(&self) -> CNTEV_A {
207 match self.bits {
208 0 => CNTEV_A::BOTH,
209 1 => CNTEV_A::UP,
210 2 => CNTEV_A::DOWN,
211 3 => CNTEV_A::NONE,
212 _ => unreachable!(),
213 }
214 }
215 #[doc = "Checks if the value of the field is `BOTH`"]
216 #[inline(always)]
217 pub fn is_both(&self) -> bool {
218 *self == CNTEV_A::BOTH
219 }
220 #[doc = "Checks if the value of the field is `UP`"]
221 #[inline(always)]
222 pub fn is_up(&self) -> bool {
223 *self == CNTEV_A::UP
224 }
225 #[doc = "Checks if the value of the field is `DOWN`"]
226 #[inline(always)]
227 pub fn is_down(&self) -> bool {
228 *self == CNTEV_A::DOWN
229 }
230 #[doc = "Checks if the value of the field is `NONE`"]
231 #[inline(always)]
232 pub fn is_none(&self) -> bool {
233 *self == CNTEV_A::NONE
234 }
235}
236#[doc = "Field `CNTEV` writer - Controls When the Counter Counts"]
237pub type CNTEV_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, CNTEV_A, 2, 10>;
238impl<'a> CNTEV_W<'a> {
239 #[doc = "Counts up on up-count and down on down-count events."]
240 #[inline(always)]
241 pub fn both(self) -> &'a mut W {
242 self.variant(CNTEV_A::BOTH)
243 }
244 #[doc = "Only counts up on up-count events."]
245 #[inline(always)]
246 pub fn up(self) -> &'a mut W {
247 self.variant(CNTEV_A::UP)
248 }
249 #[doc = "Only counts down on down-count events."]
250 #[inline(always)]
251 pub fn down(self) -> &'a mut W {
252 self.variant(CNTEV_A::DOWN)
253 }
254 #[doc = "Never counts."]
255 #[inline(always)]
256 pub fn none(self) -> &'a mut W {
257 self.variant(CNTEV_A::NONE)
258 }
259}
260#[doc = "Controls When the Auxiliary Counter Counts\n\nValue on reset: 0"]
261#[derive(Clone, Copy, Debug, PartialEq)]
262#[repr(u8)]
263pub enum AUXCNTEV_A {
264 #[doc = "0: Never counts."]
265 NONE = 0,
266 #[doc = "1: Counts up on up-count events."]
267 UP = 1,
268 #[doc = "2: Counts up on down-count events."]
269 DOWN = 2,
270 #[doc = "3: Counts up on both up-count and down-count events."]
271 BOTH = 3,
272}
273impl From<AUXCNTEV_A> for u8 {
274 #[inline(always)]
275 fn from(variant: AUXCNTEV_A) -> Self {
276 variant as _
277 }
278}
279#[doc = "Field `AUXCNTEV` reader - Controls When the Auxiliary Counter Counts"]
280pub type AUXCNTEV_R = crate::FieldReader<u8, AUXCNTEV_A>;
281impl AUXCNTEV_R {
282 #[doc = "Get enumerated values variant"]
283 #[inline(always)]
284 pub fn variant(&self) -> AUXCNTEV_A {
285 match self.bits {
286 0 => AUXCNTEV_A::NONE,
287 1 => AUXCNTEV_A::UP,
288 2 => AUXCNTEV_A::DOWN,
289 3 => AUXCNTEV_A::BOTH,
290 _ => unreachable!(),
291 }
292 }
293 #[doc = "Checks if the value of the field is `NONE`"]
294 #[inline(always)]
295 pub fn is_none(&self) -> bool {
296 *self == AUXCNTEV_A::NONE
297 }
298 #[doc = "Checks if the value of the field is `UP`"]
299 #[inline(always)]
300 pub fn is_up(&self) -> bool {
301 *self == AUXCNTEV_A::UP
302 }
303 #[doc = "Checks if the value of the field is `DOWN`"]
304 #[inline(always)]
305 pub fn is_down(&self) -> bool {
306 *self == AUXCNTEV_A::DOWN
307 }
308 #[doc = "Checks if the value of the field is `BOTH`"]
309 #[inline(always)]
310 pub fn is_both(&self) -> bool {
311 *self == AUXCNTEV_A::BOTH
312 }
313}
314#[doc = "Field `AUXCNTEV` writer - Controls When the Auxiliary Counter Counts"]
315pub type AUXCNTEV_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, AUXCNTEV_A, 2, 12>;
316impl<'a> AUXCNTEV_W<'a> {
317 #[doc = "Never counts."]
318 #[inline(always)]
319 pub fn none(self) -> &'a mut W {
320 self.variant(AUXCNTEV_A::NONE)
321 }
322 #[doc = "Counts up on up-count events."]
323 #[inline(always)]
324 pub fn up(self) -> &'a mut W {
325 self.variant(AUXCNTEV_A::UP)
326 }
327 #[doc = "Counts up on down-count events."]
328 #[inline(always)]
329 pub fn down(self) -> &'a mut W {
330 self.variant(AUXCNTEV_A::DOWN)
331 }
332 #[doc = "Counts up on both up-count and down-count events."]
333 #[inline(always)]
334 pub fn both(self) -> &'a mut W {
335 self.variant(AUXCNTEV_A::BOTH)
336 }
337}
338#[doc = "Field `CNTDIR` reader - Non-Quadrature Mode Counter Direction Control"]
339pub type CNTDIR_R = crate::BitReader<bool>;
340#[doc = "Field `CNTDIR` writer - Non-Quadrature Mode Counter Direction Control"]
341pub type CNTDIR_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 14>;
342#[doc = "Field `EDGE` reader - Edge Select"]
343pub type EDGE_R = crate::BitReader<bool>;
344#[doc = "Field `EDGE` writer - Edge Select"]
345pub type EDGE_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 15>;
346#[doc = "Sets the Mode for Triggered Compare and Clear\n\nValue on reset: 0"]
347#[derive(Clone, Copy, Debug, PartialEq)]
348#[repr(u8)]
349pub enum TCCMODE_A {
350 #[doc = "0: Triggered compare and clear not enabled."]
351 DISABLED = 0,
352 #[doc = "1: Compare and clear performed on each (optionally prescaled) LFA clock cycle."]
353 LFA = 1,
354 #[doc = "2: Compare and clear performed on positive PRS edges."]
355 PRS = 2,
356}
357impl From<TCCMODE_A> for u8 {
358 #[inline(always)]
359 fn from(variant: TCCMODE_A) -> Self {
360 variant as _
361 }
362}
363#[doc = "Field `TCCMODE` reader - Sets the Mode for Triggered Compare and Clear"]
364pub type TCCMODE_R = crate::FieldReader<u8, TCCMODE_A>;
365impl TCCMODE_R {
366 #[doc = "Get enumerated values variant"]
367 #[inline(always)]
368 pub fn variant(&self) -> Option<TCCMODE_A> {
369 match self.bits {
370 0 => Some(TCCMODE_A::DISABLED),
371 1 => Some(TCCMODE_A::LFA),
372 2 => Some(TCCMODE_A::PRS),
373 _ => None,
374 }
375 }
376 #[doc = "Checks if the value of the field is `DISABLED`"]
377 #[inline(always)]
378 pub fn is_disabled(&self) -> bool {
379 *self == TCCMODE_A::DISABLED
380 }
381 #[doc = "Checks if the value of the field is `LFA`"]
382 #[inline(always)]
383 pub fn is_lfa(&self) -> bool {
384 *self == TCCMODE_A::LFA
385 }
386 #[doc = "Checks if the value of the field is `PRS`"]
387 #[inline(always)]
388 pub fn is_prs(&self) -> bool {
389 *self == TCCMODE_A::PRS
390 }
391}
392#[doc = "Field `TCCMODE` writer - Sets the Mode for Triggered Compare and Clear"]
393pub type TCCMODE_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, TCCMODE_A, 2, 16>;
394impl<'a> TCCMODE_W<'a> {
395 #[doc = "Triggered compare and clear not enabled."]
396 #[inline(always)]
397 pub fn disabled(self) -> &'a mut W {
398 self.variant(TCCMODE_A::DISABLED)
399 }
400 #[doc = "Compare and clear performed on each (optionally prescaled) LFA clock cycle."]
401 #[inline(always)]
402 pub fn lfa(self) -> &'a mut W {
403 self.variant(TCCMODE_A::LFA)
404 }
405 #[doc = "Compare and clear performed on positive PRS edges."]
406 #[inline(always)]
407 pub fn prs(self) -> &'a mut W {
408 self.variant(TCCMODE_A::PRS)
409 }
410}
411#[doc = "Set the LFA Prescaler for Triggered Compare and Clear\n\nValue on reset: 0"]
412#[derive(Clone, Copy, Debug, PartialEq)]
413#[repr(u8)]
414pub enum TCCPRESC_A {
415 #[doc = "0: Compare and clear event each LFA cycle."]
416 DIV1 = 0,
417 #[doc = "1: Compare and clear performed on every other LFA cycle."]
418 DIV2 = 1,
419 #[doc = "2: Compare and clear performed on every 4th LFA cycle."]
420 DIV4 = 2,
421 #[doc = "3: Compare and clear performed on every 8th LFA cycle."]
422 DIV8 = 3,
423}
424impl From<TCCPRESC_A> for u8 {
425 #[inline(always)]
426 fn from(variant: TCCPRESC_A) -> Self {
427 variant as _
428 }
429}
430#[doc = "Field `TCCPRESC` reader - Set the LFA Prescaler for Triggered Compare and Clear"]
431pub type TCCPRESC_R = crate::FieldReader<u8, TCCPRESC_A>;
432impl TCCPRESC_R {
433 #[doc = "Get enumerated values variant"]
434 #[inline(always)]
435 pub fn variant(&self) -> TCCPRESC_A {
436 match self.bits {
437 0 => TCCPRESC_A::DIV1,
438 1 => TCCPRESC_A::DIV2,
439 2 => TCCPRESC_A::DIV4,
440 3 => TCCPRESC_A::DIV8,
441 _ => unreachable!(),
442 }
443 }
444 #[doc = "Checks if the value of the field is `DIV1`"]
445 #[inline(always)]
446 pub fn is_div1(&self) -> bool {
447 *self == TCCPRESC_A::DIV1
448 }
449 #[doc = "Checks if the value of the field is `DIV2`"]
450 #[inline(always)]
451 pub fn is_div2(&self) -> bool {
452 *self == TCCPRESC_A::DIV2
453 }
454 #[doc = "Checks if the value of the field is `DIV4`"]
455 #[inline(always)]
456 pub fn is_div4(&self) -> bool {
457 *self == TCCPRESC_A::DIV4
458 }
459 #[doc = "Checks if the value of the field is `DIV8`"]
460 #[inline(always)]
461 pub fn is_div8(&self) -> bool {
462 *self == TCCPRESC_A::DIV8
463 }
464}
465#[doc = "Field `TCCPRESC` writer - Set the LFA Prescaler for Triggered Compare and Clear"]
466pub type TCCPRESC_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, TCCPRESC_A, 2, 19>;
467impl<'a> TCCPRESC_W<'a> {
468 #[doc = "Compare and clear event each LFA cycle."]
469 #[inline(always)]
470 pub fn div1(self) -> &'a mut W {
471 self.variant(TCCPRESC_A::DIV1)
472 }
473 #[doc = "Compare and clear performed on every other LFA cycle."]
474 #[inline(always)]
475 pub fn div2(self) -> &'a mut W {
476 self.variant(TCCPRESC_A::DIV2)
477 }
478 #[doc = "Compare and clear performed on every 4th LFA cycle."]
479 #[inline(always)]
480 pub fn div4(self) -> &'a mut W {
481 self.variant(TCCPRESC_A::DIV4)
482 }
483 #[doc = "Compare and clear performed on every 8th LFA cycle."]
484 #[inline(always)]
485 pub fn div8(self) -> &'a mut W {
486 self.variant(TCCPRESC_A::DIV8)
487 }
488}
489#[doc = "Triggered Compare and Clear Compare Mode\n\nValue on reset: 0"]
490#[derive(Clone, Copy, Debug, PartialEq)]
491#[repr(u8)]
492pub enum TCCCOMP_A {
493 #[doc = "0: Compare match if PCNT_CNT is less than, or equal to PCNT_TOP."]
494 LTOE = 0,
495 #[doc = "1: Compare match if PCNT_CNT is greater than or equal to PCNT_TOP."]
496 GTOE = 1,
497 #[doc = "2: Compare match if PCNT_CNT is less than, or equal to PCNT_TOP\\[15:8\\]\\], and greater than, or equal to PCNT_TOP\\[7:0\\]."]
498 RANGE = 2,
499}
500impl From<TCCCOMP_A> for u8 {
501 #[inline(always)]
502 fn from(variant: TCCCOMP_A) -> Self {
503 variant as _
504 }
505}
506#[doc = "Field `TCCCOMP` reader - Triggered Compare and Clear Compare Mode"]
507pub type TCCCOMP_R = crate::FieldReader<u8, TCCCOMP_A>;
508impl TCCCOMP_R {
509 #[doc = "Get enumerated values variant"]
510 #[inline(always)]
511 pub fn variant(&self) -> Option<TCCCOMP_A> {
512 match self.bits {
513 0 => Some(TCCCOMP_A::LTOE),
514 1 => Some(TCCCOMP_A::GTOE),
515 2 => Some(TCCCOMP_A::RANGE),
516 _ => None,
517 }
518 }
519 #[doc = "Checks if the value of the field is `LTOE`"]
520 #[inline(always)]
521 pub fn is_ltoe(&self) -> bool {
522 *self == TCCCOMP_A::LTOE
523 }
524 #[doc = "Checks if the value of the field is `GTOE`"]
525 #[inline(always)]
526 pub fn is_gtoe(&self) -> bool {
527 *self == TCCCOMP_A::GTOE
528 }
529 #[doc = "Checks if the value of the field is `RANGE`"]
530 #[inline(always)]
531 pub fn is_range(&self) -> bool {
532 *self == TCCCOMP_A::RANGE
533 }
534}
535#[doc = "Field `TCCCOMP` writer - Triggered Compare and Clear Compare Mode"]
536pub type TCCCOMP_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, TCCCOMP_A, 2, 22>;
537impl<'a> TCCCOMP_W<'a> {
538 #[doc = "Compare match if PCNT_CNT is less than, or equal to PCNT_TOP."]
539 #[inline(always)]
540 pub fn ltoe(self) -> &'a mut W {
541 self.variant(TCCCOMP_A::LTOE)
542 }
543 #[doc = "Compare match if PCNT_CNT is greater than or equal to PCNT_TOP."]
544 #[inline(always)]
545 pub fn gtoe(self) -> &'a mut W {
546 self.variant(TCCCOMP_A::GTOE)
547 }
548 #[doc = "Compare match if PCNT_CNT is less than, or equal to PCNT_TOP\\[15:8\\]\\], and greater than, or equal to PCNT_TOP\\[7:0\\]."]
549 #[inline(always)]
550 pub fn range(self) -> &'a mut W {
551 self.variant(TCCCOMP_A::RANGE)
552 }
553}
554#[doc = "Field `PRSGATEEN` reader - PRS Gate Enable"]
555pub type PRSGATEEN_R = crate::BitReader<bool>;
556#[doc = "Field `PRSGATEEN` writer - PRS Gate Enable"]
557pub type PRSGATEEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 24>;
558#[doc = "Field `TCCPRSPOL` reader - TCC PRS Polarity Select"]
559pub type TCCPRSPOL_R = crate::BitReader<bool>;
560#[doc = "Field `TCCPRSPOL` writer - TCC PRS Polarity Select"]
561pub type TCCPRSPOL_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 25>;
562#[doc = "TCC PRS Channel Select\n\nValue on reset: 0"]
563#[derive(Clone, Copy, Debug, PartialEq)]
564#[repr(u8)]
565pub enum TCCPRSSEL_A {
566 #[doc = "0: PRS Channel 0 selected."]
567 PRSCH0 = 0,
568 #[doc = "1: PRS Channel 1 selected."]
569 PRSCH1 = 1,
570 #[doc = "2: PRS Channel 2 selected."]
571 PRSCH2 = 2,
572 #[doc = "3: PRS Channel 3 selected."]
573 PRSCH3 = 3,
574 #[doc = "4: PRS Channel 4 selected."]
575 PRSCH4 = 4,
576 #[doc = "5: PRS Channel 5 selected."]
577 PRSCH5 = 5,
578 #[doc = "6: PRS Channel 6 selected."]
579 PRSCH6 = 6,
580 #[doc = "7: PRS Channel 7 selected."]
581 PRSCH7 = 7,
582}
583impl From<TCCPRSSEL_A> for u8 {
584 #[inline(always)]
585 fn from(variant: TCCPRSSEL_A) -> Self {
586 variant as _
587 }
588}
589#[doc = "Field `TCCPRSSEL` reader - TCC PRS Channel Select"]
590pub type TCCPRSSEL_R = crate::FieldReader<u8, TCCPRSSEL_A>;
591impl TCCPRSSEL_R {
592 #[doc = "Get enumerated values variant"]
593 #[inline(always)]
594 pub fn variant(&self) -> TCCPRSSEL_A {
595 match self.bits {
596 0 => TCCPRSSEL_A::PRSCH0,
597 1 => TCCPRSSEL_A::PRSCH1,
598 2 => TCCPRSSEL_A::PRSCH2,
599 3 => TCCPRSSEL_A::PRSCH3,
600 4 => TCCPRSSEL_A::PRSCH4,
601 5 => TCCPRSSEL_A::PRSCH5,
602 6 => TCCPRSSEL_A::PRSCH6,
603 7 => TCCPRSSEL_A::PRSCH7,
604 _ => unreachable!(),
605 }
606 }
607 #[doc = "Checks if the value of the field is `PRSCH0`"]
608 #[inline(always)]
609 pub fn is_prsch0(&self) -> bool {
610 *self == TCCPRSSEL_A::PRSCH0
611 }
612 #[doc = "Checks if the value of the field is `PRSCH1`"]
613 #[inline(always)]
614 pub fn is_prsch1(&self) -> bool {
615 *self == TCCPRSSEL_A::PRSCH1
616 }
617 #[doc = "Checks if the value of the field is `PRSCH2`"]
618 #[inline(always)]
619 pub fn is_prsch2(&self) -> bool {
620 *self == TCCPRSSEL_A::PRSCH2
621 }
622 #[doc = "Checks if the value of the field is `PRSCH3`"]
623 #[inline(always)]
624 pub fn is_prsch3(&self) -> bool {
625 *self == TCCPRSSEL_A::PRSCH3
626 }
627 #[doc = "Checks if the value of the field is `PRSCH4`"]
628 #[inline(always)]
629 pub fn is_prsch4(&self) -> bool {
630 *self == TCCPRSSEL_A::PRSCH4
631 }
632 #[doc = "Checks if the value of the field is `PRSCH5`"]
633 #[inline(always)]
634 pub fn is_prsch5(&self) -> bool {
635 *self == TCCPRSSEL_A::PRSCH5
636 }
637 #[doc = "Checks if the value of the field is `PRSCH6`"]
638 #[inline(always)]
639 pub fn is_prsch6(&self) -> bool {
640 *self == TCCPRSSEL_A::PRSCH6
641 }
642 #[doc = "Checks if the value of the field is `PRSCH7`"]
643 #[inline(always)]
644 pub fn is_prsch7(&self) -> bool {
645 *self == TCCPRSSEL_A::PRSCH7
646 }
647}
648#[doc = "Field `TCCPRSSEL` writer - TCC PRS Channel Select"]
649pub type TCCPRSSEL_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, TCCPRSSEL_A, 3, 26>;
650impl<'a> TCCPRSSEL_W<'a> {
651 #[doc = "PRS Channel 0 selected."]
652 #[inline(always)]
653 pub fn prsch0(self) -> &'a mut W {
654 self.variant(TCCPRSSEL_A::PRSCH0)
655 }
656 #[doc = "PRS Channel 1 selected."]
657 #[inline(always)]
658 pub fn prsch1(self) -> &'a mut W {
659 self.variant(TCCPRSSEL_A::PRSCH1)
660 }
661 #[doc = "PRS Channel 2 selected."]
662 #[inline(always)]
663 pub fn prsch2(self) -> &'a mut W {
664 self.variant(TCCPRSSEL_A::PRSCH2)
665 }
666 #[doc = "PRS Channel 3 selected."]
667 #[inline(always)]
668 pub fn prsch3(self) -> &'a mut W {
669 self.variant(TCCPRSSEL_A::PRSCH3)
670 }
671 #[doc = "PRS Channel 4 selected."]
672 #[inline(always)]
673 pub fn prsch4(self) -> &'a mut W {
674 self.variant(TCCPRSSEL_A::PRSCH4)
675 }
676 #[doc = "PRS Channel 5 selected."]
677 #[inline(always)]
678 pub fn prsch5(self) -> &'a mut W {
679 self.variant(TCCPRSSEL_A::PRSCH5)
680 }
681 #[doc = "PRS Channel 6 selected."]
682 #[inline(always)]
683 pub fn prsch6(self) -> &'a mut W {
684 self.variant(TCCPRSSEL_A::PRSCH6)
685 }
686 #[doc = "PRS Channel 7 selected."]
687 #[inline(always)]
688 pub fn prsch7(self) -> &'a mut W {
689 self.variant(TCCPRSSEL_A::PRSCH7)
690 }
691}
692#[doc = "Field `TOPBHFSEL` reader - TOPB High Frequency Value Select"]
693pub type TOPBHFSEL_R = crate::BitReader<bool>;
694#[doc = "Field `TOPBHFSEL` writer - TOPB High Frequency Value Select"]
695pub type TOPBHFSEL_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 31>;
696impl R {
697 #[doc = "Bits 0:2 - Mode Select"]
698 #[inline(always)]
699 pub fn mode(&self) -> MODE_R {
700 MODE_R::new((self.bits & 7) as u8)
701 }
702 #[doc = "Bit 3 - Enable Digital Pulse Width Filter"]
703 #[inline(always)]
704 pub fn filt(&self) -> FILT_R {
705 FILT_R::new(((self.bits >> 3) & 1) != 0)
706 }
707 #[doc = "Bit 4 - Enable PCNT Clock Domain Reset"]
708 #[inline(always)]
709 pub fn rsten(&self) -> RSTEN_R {
710 RSTEN_R::new(((self.bits >> 4) & 1) != 0)
711 }
712 #[doc = "Bit 5 - Enable CNT Reset"]
713 #[inline(always)]
714 pub fn cntrsten(&self) -> CNTRSTEN_R {
715 CNTRSTEN_R::new(((self.bits >> 5) & 1) != 0)
716 }
717 #[doc = "Bit 6 - Enable AUXCNT Reset"]
718 #[inline(always)]
719 pub fn auxcntrsten(&self) -> AUXCNTRSTEN_R {
720 AUXCNTRSTEN_R::new(((self.bits >> 6) & 1) != 0)
721 }
722 #[doc = "Bit 7 - Debug Mode Halt Enable"]
723 #[inline(always)]
724 pub fn debughalt(&self) -> DEBUGHALT_R {
725 DEBUGHALT_R::new(((self.bits >> 7) & 1) != 0)
726 }
727 #[doc = "Bit 8 - Enable Hysteresis"]
728 #[inline(always)]
729 pub fn hyst(&self) -> HYST_R {
730 HYST_R::new(((self.bits >> 8) & 1) != 0)
731 }
732 #[doc = "Bit 9 - Count Direction Determined By S1"]
733 #[inline(always)]
734 pub fn s1cdir(&self) -> S1CDIR_R {
735 S1CDIR_R::new(((self.bits >> 9) & 1) != 0)
736 }
737 #[doc = "Bits 10:11 - Controls When the Counter Counts"]
738 #[inline(always)]
739 pub fn cntev(&self) -> CNTEV_R {
740 CNTEV_R::new(((self.bits >> 10) & 3) as u8)
741 }
742 #[doc = "Bits 12:13 - Controls When the Auxiliary Counter Counts"]
743 #[inline(always)]
744 pub fn auxcntev(&self) -> AUXCNTEV_R {
745 AUXCNTEV_R::new(((self.bits >> 12) & 3) as u8)
746 }
747 #[doc = "Bit 14 - Non-Quadrature Mode Counter Direction Control"]
748 #[inline(always)]
749 pub fn cntdir(&self) -> CNTDIR_R {
750 CNTDIR_R::new(((self.bits >> 14) & 1) != 0)
751 }
752 #[doc = "Bit 15 - Edge Select"]
753 #[inline(always)]
754 pub fn edge(&self) -> EDGE_R {
755 EDGE_R::new(((self.bits >> 15) & 1) != 0)
756 }
757 #[doc = "Bits 16:17 - Sets the Mode for Triggered Compare and Clear"]
758 #[inline(always)]
759 pub fn tccmode(&self) -> TCCMODE_R {
760 TCCMODE_R::new(((self.bits >> 16) & 3) as u8)
761 }
762 #[doc = "Bits 19:20 - Set the LFA Prescaler for Triggered Compare and Clear"]
763 #[inline(always)]
764 pub fn tccpresc(&self) -> TCCPRESC_R {
765 TCCPRESC_R::new(((self.bits >> 19) & 3) as u8)
766 }
767 #[doc = "Bits 22:23 - Triggered Compare and Clear Compare Mode"]
768 #[inline(always)]
769 pub fn tcccomp(&self) -> TCCCOMP_R {
770 TCCCOMP_R::new(((self.bits >> 22) & 3) as u8)
771 }
772 #[doc = "Bit 24 - PRS Gate Enable"]
773 #[inline(always)]
774 pub fn prsgateen(&self) -> PRSGATEEN_R {
775 PRSGATEEN_R::new(((self.bits >> 24) & 1) != 0)
776 }
777 #[doc = "Bit 25 - TCC PRS Polarity Select"]
778 #[inline(always)]
779 pub fn tccprspol(&self) -> TCCPRSPOL_R {
780 TCCPRSPOL_R::new(((self.bits >> 25) & 1) != 0)
781 }
782 #[doc = "Bits 26:28 - TCC PRS Channel Select"]
783 #[inline(always)]
784 pub fn tccprssel(&self) -> TCCPRSSEL_R {
785 TCCPRSSEL_R::new(((self.bits >> 26) & 7) as u8)
786 }
787 #[doc = "Bit 31 - TOPB High Frequency Value Select"]
788 #[inline(always)]
789 pub fn topbhfsel(&self) -> TOPBHFSEL_R {
790 TOPBHFSEL_R::new(((self.bits >> 31) & 1) != 0)
791 }
792}
793impl W {
794 #[doc = "Bits 0:2 - Mode Select"]
795 #[inline(always)]
796 pub fn mode(&mut self) -> MODE_W {
797 MODE_W::new(self)
798 }
799 #[doc = "Bit 3 - Enable Digital Pulse Width Filter"]
800 #[inline(always)]
801 pub fn filt(&mut self) -> FILT_W {
802 FILT_W::new(self)
803 }
804 #[doc = "Bit 4 - Enable PCNT Clock Domain Reset"]
805 #[inline(always)]
806 pub fn rsten(&mut self) -> RSTEN_W {
807 RSTEN_W::new(self)
808 }
809 #[doc = "Bit 5 - Enable CNT Reset"]
810 #[inline(always)]
811 pub fn cntrsten(&mut self) -> CNTRSTEN_W {
812 CNTRSTEN_W::new(self)
813 }
814 #[doc = "Bit 6 - Enable AUXCNT Reset"]
815 #[inline(always)]
816 pub fn auxcntrsten(&mut self) -> AUXCNTRSTEN_W {
817 AUXCNTRSTEN_W::new(self)
818 }
819 #[doc = "Bit 7 - Debug Mode Halt Enable"]
820 #[inline(always)]
821 pub fn debughalt(&mut self) -> DEBUGHALT_W {
822 DEBUGHALT_W::new(self)
823 }
824 #[doc = "Bit 8 - Enable Hysteresis"]
825 #[inline(always)]
826 pub fn hyst(&mut self) -> HYST_W {
827 HYST_W::new(self)
828 }
829 #[doc = "Bit 9 - Count Direction Determined By S1"]
830 #[inline(always)]
831 pub fn s1cdir(&mut self) -> S1CDIR_W {
832 S1CDIR_W::new(self)
833 }
834 #[doc = "Bits 10:11 - Controls When the Counter Counts"]
835 #[inline(always)]
836 pub fn cntev(&mut self) -> CNTEV_W {
837 CNTEV_W::new(self)
838 }
839 #[doc = "Bits 12:13 - Controls When the Auxiliary Counter Counts"]
840 #[inline(always)]
841 pub fn auxcntev(&mut self) -> AUXCNTEV_W {
842 AUXCNTEV_W::new(self)
843 }
844 #[doc = "Bit 14 - Non-Quadrature Mode Counter Direction Control"]
845 #[inline(always)]
846 pub fn cntdir(&mut self) -> CNTDIR_W {
847 CNTDIR_W::new(self)
848 }
849 #[doc = "Bit 15 - Edge Select"]
850 #[inline(always)]
851 pub fn edge(&mut self) -> EDGE_W {
852 EDGE_W::new(self)
853 }
854 #[doc = "Bits 16:17 - Sets the Mode for Triggered Compare and Clear"]
855 #[inline(always)]
856 pub fn tccmode(&mut self) -> TCCMODE_W {
857 TCCMODE_W::new(self)
858 }
859 #[doc = "Bits 19:20 - Set the LFA Prescaler for Triggered Compare and Clear"]
860 #[inline(always)]
861 pub fn tccpresc(&mut self) -> TCCPRESC_W {
862 TCCPRESC_W::new(self)
863 }
864 #[doc = "Bits 22:23 - Triggered Compare and Clear Compare Mode"]
865 #[inline(always)]
866 pub fn tcccomp(&mut self) -> TCCCOMP_W {
867 TCCCOMP_W::new(self)
868 }
869 #[doc = "Bit 24 - PRS Gate Enable"]
870 #[inline(always)]
871 pub fn prsgateen(&mut self) -> PRSGATEEN_W {
872 PRSGATEEN_W::new(self)
873 }
874 #[doc = "Bit 25 - TCC PRS Polarity Select"]
875 #[inline(always)]
876 pub fn tccprspol(&mut self) -> TCCPRSPOL_W {
877 TCCPRSPOL_W::new(self)
878 }
879 #[doc = "Bits 26:28 - TCC PRS Channel Select"]
880 #[inline(always)]
881 pub fn tccprssel(&mut self) -> TCCPRSSEL_W {
882 TCCPRSSEL_W::new(self)
883 }
884 #[doc = "Bit 31 - TOPB High Frequency Value Select"]
885 #[inline(always)]
886 pub fn topbhfsel(&mut self) -> TOPBHFSEL_W {
887 TOPBHFSEL_W::new(self)
888 }
889 #[doc = "Writes raw bits to the register."]
890 #[inline(always)]
891 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
892 self.0.bits(bits);
893 self
894 }
895}
896#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
897pub struct CTRL_SPEC;
898impl crate::RegisterSpec for CTRL_SPEC {
899 type Ux = u32;
900}
901#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
902impl crate::Readable for CTRL_SPEC {
903 type Reader = R;
904}
905#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
906impl crate::Writable for CTRL_SPEC {
907 type Writer = W;
908}
909#[doc = "`reset()` method sets CTRL to value 0"]
910impl crate::Resettable for CTRL_SPEC {
911 #[inline(always)]
912 fn reset_value() -> Self::Ux {
913 0
914 }
915}