efm32tg11b540_pac/msc/
if_.rs

1#[doc = "Register `IF` reader"]
2pub struct R(crate::R<IF_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IF_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IF_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IF_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `ERASE` reader - Erase Done Interrupt Read Flag"]
17pub type ERASE_R = crate::BitReader<bool>;
18#[doc = "Field `WRITE` reader - Write Done Interrupt Read Flag"]
19pub type WRITE_R = crate::BitReader<bool>;
20#[doc = "Field `CHOF` reader - Cache Hits Overflow Interrupt Flag"]
21pub type CHOF_R = crate::BitReader<bool>;
22#[doc = "Field `CMOF` reader - Cache Misses Overflow Interrupt Flag"]
23pub type CMOF_R = crate::BitReader<bool>;
24#[doc = "Field `PWRUPF` reader - Flash Power Up Sequence Complete Flag"]
25pub type PWRUPF_R = crate::BitReader<bool>;
26#[doc = "Field `ICACHERR` reader - ICache RAM Parity Error Flag"]
27pub type ICACHERR_R = crate::BitReader<bool>;
28#[doc = "Field `WDATAOV` reader - Flash Controller Write Buffer Overflow"]
29pub type WDATAOV_R = crate::BitReader<bool>;
30#[doc = "Field `LVEWRITE` reader - Flash LVE Write Error Flag"]
31pub type LVEWRITE_R = crate::BitReader<bool>;
32impl R {
33    #[doc = "Bit 0 - Erase Done Interrupt Read Flag"]
34    #[inline(always)]
35    pub fn erase(&self) -> ERASE_R {
36        ERASE_R::new((self.bits & 1) != 0)
37    }
38    #[doc = "Bit 1 - Write Done Interrupt Read Flag"]
39    #[inline(always)]
40    pub fn write(&self) -> WRITE_R {
41        WRITE_R::new(((self.bits >> 1) & 1) != 0)
42    }
43    #[doc = "Bit 2 - Cache Hits Overflow Interrupt Flag"]
44    #[inline(always)]
45    pub fn chof(&self) -> CHOF_R {
46        CHOF_R::new(((self.bits >> 2) & 1) != 0)
47    }
48    #[doc = "Bit 3 - Cache Misses Overflow Interrupt Flag"]
49    #[inline(always)]
50    pub fn cmof(&self) -> CMOF_R {
51        CMOF_R::new(((self.bits >> 3) & 1) != 0)
52    }
53    #[doc = "Bit 4 - Flash Power Up Sequence Complete Flag"]
54    #[inline(always)]
55    pub fn pwrupf(&self) -> PWRUPF_R {
56        PWRUPF_R::new(((self.bits >> 4) & 1) != 0)
57    }
58    #[doc = "Bit 5 - ICache RAM Parity Error Flag"]
59    #[inline(always)]
60    pub fn icacherr(&self) -> ICACHERR_R {
61        ICACHERR_R::new(((self.bits >> 5) & 1) != 0)
62    }
63    #[doc = "Bit 6 - Flash Controller Write Buffer Overflow"]
64    #[inline(always)]
65    pub fn wdataov(&self) -> WDATAOV_R {
66        WDATAOV_R::new(((self.bits >> 6) & 1) != 0)
67    }
68    #[doc = "Bit 8 - Flash LVE Write Error Flag"]
69    #[inline(always)]
70    pub fn lvewrite(&self) -> LVEWRITE_R {
71        LVEWRITE_R::new(((self.bits >> 8) & 1) != 0)
72    }
73}
74#[doc = "Interrupt Flag Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"]
75pub struct IF_SPEC;
76impl crate::RegisterSpec for IF_SPEC {
77    type Ux = u32;
78}
79#[doc = "`read()` method returns [if_::R](R) reader structure"]
80impl crate::Readable for IF_SPEC {
81    type Reader = R;
82}
83#[doc = "`reset()` method sets IF to value 0"]
84impl crate::Resettable for IF_SPEC {
85    #[inline(always)]
86    fn reset_value() -> Self::Ux {
87        0
88    }
89}
efm32tg11b540_pac/msc/if_.rs

efm32tg11b540_pac/msc/
if_.rs
