efm32tg11b540_pac/cmu/
if_.rs

1#[doc = "Register `IF` reader"]
2pub struct R(crate::R<IF_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IF_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IF_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IF_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `HFRCORDY` reader - HFRCO Ready Interrupt Flag"]
17pub type HFRCORDY_R = crate::BitReader<bool>;
18#[doc = "Field `HFXORDY` reader - HFXO Ready Interrupt Flag"]
19pub type HFXORDY_R = crate::BitReader<bool>;
20#[doc = "Field `LFRCORDY` reader - LFRCO Ready Interrupt Flag"]
21pub type LFRCORDY_R = crate::BitReader<bool>;
22#[doc = "Field `LFXORDY` reader - LFXO Ready Interrupt Flag"]
23pub type LFXORDY_R = crate::BitReader<bool>;
24#[doc = "Field `AUXHFRCORDY` reader - AUXHFRCO Ready Interrupt Flag"]
25pub type AUXHFRCORDY_R = crate::BitReader<bool>;
26#[doc = "Field `CALRDY` reader - Calibration Ready Interrupt Flag"]
27pub type CALRDY_R = crate::BitReader<bool>;
28#[doc = "Field `CALOF` reader - Calibration Overflow Interrupt Flag"]
29pub type CALOF_R = crate::BitReader<bool>;
30#[doc = "Field `HFXODISERR` reader - HFXO Disable Error Interrupt Flag"]
31pub type HFXODISERR_R = crate::BitReader<bool>;
32#[doc = "Field `HFXOAUTOSW` reader - HFXO Automatic Switch Interrupt Flag"]
33pub type HFXOAUTOSW_R = crate::BitReader<bool>;
34#[doc = "Field `HFXOPEAKDETRDY` reader - HFXO Automatic Peak Detection Ready Interrupt Flag"]
35pub type HFXOPEAKDETRDY_R = crate::BitReader<bool>;
36#[doc = "Field `HFRCODIS` reader - HFRCO Disable Interrupt Flag"]
37pub type HFRCODIS_R = crate::BitReader<bool>;
38#[doc = "Field `LFTIMEOUTERR` reader - Low Frequency Timeout Error Interrupt Flag"]
39pub type LFTIMEOUTERR_R = crate::BitReader<bool>;
40#[doc = "Field `DPLLRDY` reader - DPLL Lock Interrupt Flag"]
41pub type DPLLRDY_R = crate::BitReader<bool>;
42#[doc = "Field `DPLLLOCKFAILLOW` reader - DPLL Lock Failure Low Interrupt Flag"]
43pub type DPLLLOCKFAILLOW_R = crate::BitReader<bool>;
44#[doc = "Field `DPLLLOCKFAILHIGH` reader - DPLL Lock Failure Low Interrupt Flag"]
45pub type DPLLLOCKFAILHIGH_R = crate::BitReader<bool>;
46#[doc = "Field `LFXOEDGE` reader - LFXO Clock Edge Detected Interrupt Flag"]
47pub type LFXOEDGE_R = crate::BitReader<bool>;
48#[doc = "Field `LFRCOEDGE` reader - LFRCO Clock Edge Detected Interrupt Flag"]
49pub type LFRCOEDGE_R = crate::BitReader<bool>;
50#[doc = "Field `ULFRCOEDGE` reader - ULFRCO Clock Edge Detected Interrupt Flag"]
51pub type ULFRCOEDGE_R = crate::BitReader<bool>;
52#[doc = "Field `CMUERR` reader - CMU Error Interrupt Flag"]
53pub type CMUERR_R = crate::BitReader<bool>;
54impl R {
55    #[doc = "Bit 0 - HFRCO Ready Interrupt Flag"]
56    #[inline(always)]
57    pub fn hfrcordy(&self) -> HFRCORDY_R {
58        HFRCORDY_R::new((self.bits & 1) != 0)
59    }
60    #[doc = "Bit 1 - HFXO Ready Interrupt Flag"]
61    #[inline(always)]
62    pub fn hfxordy(&self) -> HFXORDY_R {
63        HFXORDY_R::new(((self.bits >> 1) & 1) != 0)
64    }
65    #[doc = "Bit 2 - LFRCO Ready Interrupt Flag"]
66    #[inline(always)]
67    pub fn lfrcordy(&self) -> LFRCORDY_R {
68        LFRCORDY_R::new(((self.bits >> 2) & 1) != 0)
69    }
70    #[doc = "Bit 3 - LFXO Ready Interrupt Flag"]
71    #[inline(always)]
72    pub fn lfxordy(&self) -> LFXORDY_R {
73        LFXORDY_R::new(((self.bits >> 3) & 1) != 0)
74    }
75    #[doc = "Bit 4 - AUXHFRCO Ready Interrupt Flag"]
76    #[inline(always)]
77    pub fn auxhfrcordy(&self) -> AUXHFRCORDY_R {
78        AUXHFRCORDY_R::new(((self.bits >> 4) & 1) != 0)
79    }
80    #[doc = "Bit 5 - Calibration Ready Interrupt Flag"]
81    #[inline(always)]
82    pub fn calrdy(&self) -> CALRDY_R {
83        CALRDY_R::new(((self.bits >> 5) & 1) != 0)
84    }
85    #[doc = "Bit 6 - Calibration Overflow Interrupt Flag"]
86    #[inline(always)]
87    pub fn calof(&self) -> CALOF_R {
88        CALOF_R::new(((self.bits >> 6) & 1) != 0)
89    }
90    #[doc = "Bit 8 - HFXO Disable Error Interrupt Flag"]
91    #[inline(always)]
92    pub fn hfxodiserr(&self) -> HFXODISERR_R {
93        HFXODISERR_R::new(((self.bits >> 8) & 1) != 0)
94    }
95    #[doc = "Bit 9 - HFXO Automatic Switch Interrupt Flag"]
96    #[inline(always)]
97    pub fn hfxoautosw(&self) -> HFXOAUTOSW_R {
98        HFXOAUTOSW_R::new(((self.bits >> 9) & 1) != 0)
99    }
100    #[doc = "Bit 11 - HFXO Automatic Peak Detection Ready Interrupt Flag"]
101    #[inline(always)]
102    pub fn hfxopeakdetrdy(&self) -> HFXOPEAKDETRDY_R {
103        HFXOPEAKDETRDY_R::new(((self.bits >> 11) & 1) != 0)
104    }
105    #[doc = "Bit 13 - HFRCO Disable Interrupt Flag"]
106    #[inline(always)]
107    pub fn hfrcodis(&self) -> HFRCODIS_R {
108        HFRCODIS_R::new(((self.bits >> 13) & 1) != 0)
109    }
110    #[doc = "Bit 14 - Low Frequency Timeout Error Interrupt Flag"]
111    #[inline(always)]
112    pub fn lftimeouterr(&self) -> LFTIMEOUTERR_R {
113        LFTIMEOUTERR_R::new(((self.bits >> 14) & 1) != 0)
114    }
115    #[doc = "Bit 15 - DPLL Lock Interrupt Flag"]
116    #[inline(always)]
117    pub fn dpllrdy(&self) -> DPLLRDY_R {
118        DPLLRDY_R::new(((self.bits >> 15) & 1) != 0)
119    }
120    #[doc = "Bit 16 - DPLL Lock Failure Low Interrupt Flag"]
121    #[inline(always)]
122    pub fn dplllockfaillow(&self) -> DPLLLOCKFAILLOW_R {
123        DPLLLOCKFAILLOW_R::new(((self.bits >> 16) & 1) != 0)
124    }
125    #[doc = "Bit 17 - DPLL Lock Failure Low Interrupt Flag"]
126    #[inline(always)]
127    pub fn dplllockfailhigh(&self) -> DPLLLOCKFAILHIGH_R {
128        DPLLLOCKFAILHIGH_R::new(((self.bits >> 17) & 1) != 0)
129    }
130    #[doc = "Bit 27 - LFXO Clock Edge Detected Interrupt Flag"]
131    #[inline(always)]
132    pub fn lfxoedge(&self) -> LFXOEDGE_R {
133        LFXOEDGE_R::new(((self.bits >> 27) & 1) != 0)
134    }
135    #[doc = "Bit 28 - LFRCO Clock Edge Detected Interrupt Flag"]
136    #[inline(always)]
137    pub fn lfrcoedge(&self) -> LFRCOEDGE_R {
138        LFRCOEDGE_R::new(((self.bits >> 28) & 1) != 0)
139    }
140    #[doc = "Bit 29 - ULFRCO Clock Edge Detected Interrupt Flag"]
141    #[inline(always)]
142    pub fn ulfrcoedge(&self) -> ULFRCOEDGE_R {
143        ULFRCOEDGE_R::new(((self.bits >> 29) & 1) != 0)
144    }
145    #[doc = "Bit 31 - CMU Error Interrupt Flag"]
146    #[inline(always)]
147    pub fn cmuerr(&self) -> CMUERR_R {
148        CMUERR_R::new(((self.bits >> 31) & 1) != 0)
149    }
150}
151#[doc = "Interrupt Flag Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"]
152pub struct IF_SPEC;
153impl crate::RegisterSpec for IF_SPEC {
154    type Ux = u32;
155}
156#[doc = "`read()` method returns [if_::R](R) reader structure"]
157impl crate::Readable for IF_SPEC {
158    type Reader = R;
159}
160#[doc = "`reset()` method sets IF to value 0x01"]
161impl crate::Resettable for IF_SPEC {
162    #[inline(always)]
163    fn reset_value() -> Self::Ux {
164        0x01
165    }
166}
efm32tg11b540_pac/cmu/if_.rs

efm32tg11b540_pac/cmu/
if_.rs
