efm32tg11b540_pac/cmu/
hfxoctrl.rs

1#[doc = "Register `HFXOCTRL` reader"]
2pub struct R(crate::R<HFXOCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<HFXOCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<HFXOCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<HFXOCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `HFXOCTRL` writer"]
17pub struct W(crate::W<HFXOCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<HFXOCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<HFXOCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<HFXOCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "HFXO Mode\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum MODE_A {
41    #[doc = "0: 4 MHz - 48 MHz crystal oscillator"]
42    XTAL = 0,
43    #[doc = "1: An AC coupled buffer is coupled in series with HFXTAL_N pin, suitable for external sinus wave."]
44    ACBUFEXTCLK = 1,
45    #[doc = "2: A DC coupled buffer is coupled in series with HFXTAL_N pin, suitable for external sinus wave."]
46    DCBUFEXTCLK = 2,
47    #[doc = "3: Digital external clock can be supplied on HFXTAL_N pin."]
48    DIGEXTCLK = 3,
49}
50impl From<MODE_A> for u8 {
51    #[inline(always)]
52    fn from(variant: MODE_A) -> Self {
53        variant as _
54    }
55}
56#[doc = "Field `MODE` reader - HFXO Mode"]
57pub type MODE_R = crate::FieldReader<u8, MODE_A>;
58impl MODE_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> MODE_A {
62        match self.bits {
63            0 => MODE_A::XTAL,
64            1 => MODE_A::ACBUFEXTCLK,
65            2 => MODE_A::DCBUFEXTCLK,
66            3 => MODE_A::DIGEXTCLK,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `XTAL`"]
71    #[inline(always)]
72    pub fn is_xtal(&self) -> bool {
73        *self == MODE_A::XTAL
74    }
75    #[doc = "Checks if the value of the field is `ACBUFEXTCLK`"]
76    #[inline(always)]
77    pub fn is_acbufextclk(&self) -> bool {
78        *self == MODE_A::ACBUFEXTCLK
79    }
80    #[doc = "Checks if the value of the field is `DCBUFEXTCLK`"]
81    #[inline(always)]
82    pub fn is_dcbufextclk(&self) -> bool {
83        *self == MODE_A::DCBUFEXTCLK
84    }
85    #[doc = "Checks if the value of the field is `DIGEXTCLK`"]
86    #[inline(always)]
87    pub fn is_digextclk(&self) -> bool {
88        *self == MODE_A::DIGEXTCLK
89    }
90}
91#[doc = "Field `MODE` writer - HFXO Mode"]
92pub type MODE_W<'a> = crate::FieldWriterSafe<'a, u32, HFXOCTRL_SPEC, u8, MODE_A, 2, 0>;
93impl<'a> MODE_W<'a> {
94    #[doc = "4 MHz - 48 MHz crystal oscillator"]
95    #[inline(always)]
96    pub fn xtal(self) -> &'a mut W {
97        self.variant(MODE_A::XTAL)
98    }
99    #[doc = "An AC coupled buffer is coupled in series with HFXTAL_N pin, suitable for external sinus wave."]
100    #[inline(always)]
101    pub fn acbufextclk(self) -> &'a mut W {
102        self.variant(MODE_A::ACBUFEXTCLK)
103    }
104    #[doc = "A DC coupled buffer is coupled in series with HFXTAL_N pin, suitable for external sinus wave."]
105    #[inline(always)]
106    pub fn dcbufextclk(self) -> &'a mut W {
107        self.variant(MODE_A::DCBUFEXTCLK)
108    }
109    #[doc = "Digital external clock can be supplied on HFXTAL_N pin."]
110    #[inline(always)]
111    pub fn digextclk(self) -> &'a mut W {
112        self.variant(MODE_A::DIGEXTCLK)
113    }
114}
115#[doc = "HFXO Automatic Peak Detection Mode\n\nValue on reset: 0"]
116#[derive(Clone, Copy, Debug, PartialEq)]
117#[repr(u8)]
118pub enum PEAKDETMODE_A {
119    #[doc = "0: Automatic control of HFXO peak detection sequence. Only performs peak detection on initial HFXO startup. CMU_CMD HFXOPEAKDETSTART allowed to be used after HFXORDY=1."]
120    ONCECMD = 0,
121    #[doc = "1: Automatic control of HFXO peak detection sequence. CMU_CMD HFXOPEAKDETSTART allowed to be used after HFXORDY=1."]
122    AUTOCMD = 1,
123    #[doc = "2: CMU_CMD HFXOPEAKDETSTART can be used to trigger the peak detection sequence after HFXORDY=1."]
124    CMD = 2,
125    #[doc = "3: CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready."]
126    MANUAL = 3,
127}
128impl From<PEAKDETMODE_A> for u8 {
129    #[inline(always)]
130    fn from(variant: PEAKDETMODE_A) -> Self {
131        variant as _
132    }
133}
134#[doc = "Field `PEAKDETMODE` reader - HFXO Automatic Peak Detection Mode"]
135pub type PEAKDETMODE_R = crate::FieldReader<u8, PEAKDETMODE_A>;
136impl PEAKDETMODE_R {
137    #[doc = "Get enumerated values variant"]
138    #[inline(always)]
139    pub fn variant(&self) -> PEAKDETMODE_A {
140        match self.bits {
141            0 => PEAKDETMODE_A::ONCECMD,
142            1 => PEAKDETMODE_A::AUTOCMD,
143            2 => PEAKDETMODE_A::CMD,
144            3 => PEAKDETMODE_A::MANUAL,
145            _ => unreachable!(),
146        }
147    }
148    #[doc = "Checks if the value of the field is `ONCECMD`"]
149    #[inline(always)]
150    pub fn is_oncecmd(&self) -> bool {
151        *self == PEAKDETMODE_A::ONCECMD
152    }
153    #[doc = "Checks if the value of the field is `AUTOCMD`"]
154    #[inline(always)]
155    pub fn is_autocmd(&self) -> bool {
156        *self == PEAKDETMODE_A::AUTOCMD
157    }
158    #[doc = "Checks if the value of the field is `CMD`"]
159    #[inline(always)]
160    pub fn is_cmd(&self) -> bool {
161        *self == PEAKDETMODE_A::CMD
162    }
163    #[doc = "Checks if the value of the field is `MANUAL`"]
164    #[inline(always)]
165    pub fn is_manual(&self) -> bool {
166        *self == PEAKDETMODE_A::MANUAL
167    }
168}
169#[doc = "Field `PEAKDETMODE` writer - HFXO Automatic Peak Detection Mode"]
170pub type PEAKDETMODE_W<'a> =
171    crate::FieldWriterSafe<'a, u32, HFXOCTRL_SPEC, u8, PEAKDETMODE_A, 2, 4>;
172impl<'a> PEAKDETMODE_W<'a> {
173    #[doc = "Automatic control of HFXO peak detection sequence. Only performs peak detection on initial HFXO startup. CMU_CMD HFXOPEAKDETSTART allowed to be used after HFXORDY=1."]
174    #[inline(always)]
175    pub fn oncecmd(self) -> &'a mut W {
176        self.variant(PEAKDETMODE_A::ONCECMD)
177    }
178    #[doc = "Automatic control of HFXO peak detection sequence. CMU_CMD HFXOPEAKDETSTART allowed to be used after HFXORDY=1."]
179    #[inline(always)]
180    pub fn autocmd(self) -> &'a mut W {
181        self.variant(PEAKDETMODE_A::AUTOCMD)
182    }
183    #[doc = "CMU_CMD HFXOPEAKDETSTART can be used to trigger the peak detection sequence after HFXORDY=1."]
184    #[inline(always)]
185    pub fn cmd(self) -> &'a mut W {
186        self.variant(PEAKDETMODE_A::CMD)
187    }
188    #[doc = "CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready."]
189    #[inline(always)]
190    pub fn manual(self) -> &'a mut W {
191        self.variant(PEAKDETMODE_A::MANUAL)
192    }
193}
194#[doc = "HFXO Low Frequency Timeout\n\nValue on reset: 0"]
195#[derive(Clone, Copy, Debug, PartialEq)]
196#[repr(u8)]
197pub enum LFTIMEOUT_A {
198    #[doc = "0: Timeout period of 0 cycles (disabled)"]
199    _0CYCLES = 0,
200    #[doc = "1: Timeout period of 2 cycles"]
201    _2CYCLES = 1,
202    #[doc = "2: Timeout period of 4 cycles"]
203    _4CYCLES = 2,
204    #[doc = "3: Timeout period of 16 cycles"]
205    _16CYCLES = 3,
206    #[doc = "4: Timeout period of 32 cycles"]
207    _32CYCLES = 4,
208    #[doc = "5: Timeout period of 64 cycles"]
209    _64CYCLES = 5,
210    #[doc = "6: Timeout period of 1024 cycles"]
211    _1KCYCLES = 6,
212    #[doc = "7: Timeout period of 4096 cycles"]
213    _4KCYCLES = 7,
214}
215impl From<LFTIMEOUT_A> for u8 {
216    #[inline(always)]
217    fn from(variant: LFTIMEOUT_A) -> Self {
218        variant as _
219    }
220}
221#[doc = "Field `LFTIMEOUT` reader - HFXO Low Frequency Timeout"]
222pub type LFTIMEOUT_R = crate::FieldReader<u8, LFTIMEOUT_A>;
223impl LFTIMEOUT_R {
224    #[doc = "Get enumerated values variant"]
225    #[inline(always)]
226    pub fn variant(&self) -> LFTIMEOUT_A {
227        match self.bits {
228            0 => LFTIMEOUT_A::_0CYCLES,
229            1 => LFTIMEOUT_A::_2CYCLES,
230            2 => LFTIMEOUT_A::_4CYCLES,
231            3 => LFTIMEOUT_A::_16CYCLES,
232            4 => LFTIMEOUT_A::_32CYCLES,
233            5 => LFTIMEOUT_A::_64CYCLES,
234            6 => LFTIMEOUT_A::_1KCYCLES,
235            7 => LFTIMEOUT_A::_4KCYCLES,
236            _ => unreachable!(),
237        }
238    }
239    #[doc = "Checks if the value of the field is `_0CYCLES`"]
240    #[inline(always)]
241    pub fn is_0cycles(&self) -> bool {
242        *self == LFTIMEOUT_A::_0CYCLES
243    }
244    #[doc = "Checks if the value of the field is `_2CYCLES`"]
245    #[inline(always)]
246    pub fn is_2cycles(&self) -> bool {
247        *self == LFTIMEOUT_A::_2CYCLES
248    }
249    #[doc = "Checks if the value of the field is `_4CYCLES`"]
250    #[inline(always)]
251    pub fn is_4cycles(&self) -> bool {
252        *self == LFTIMEOUT_A::_4CYCLES
253    }
254    #[doc = "Checks if the value of the field is `_16CYCLES`"]
255    #[inline(always)]
256    pub fn is_16cycles(&self) -> bool {
257        *self == LFTIMEOUT_A::_16CYCLES
258    }
259    #[doc = "Checks if the value of the field is `_32CYCLES`"]
260    #[inline(always)]
261    pub fn is_32cycles(&self) -> bool {
262        *self == LFTIMEOUT_A::_32CYCLES
263    }
264    #[doc = "Checks if the value of the field is `_64CYCLES`"]
265    #[inline(always)]
266    pub fn is_64cycles(&self) -> bool {
267        *self == LFTIMEOUT_A::_64CYCLES
268    }
269    #[doc = "Checks if the value of the field is `_1KCYCLES`"]
270    #[inline(always)]
271    pub fn is_1kcycles(&self) -> bool {
272        *self == LFTIMEOUT_A::_1KCYCLES
273    }
274    #[doc = "Checks if the value of the field is `_4KCYCLES`"]
275    #[inline(always)]
276    pub fn is_4kcycles(&self) -> bool {
277        *self == LFTIMEOUT_A::_4KCYCLES
278    }
279}
280#[doc = "Field `LFTIMEOUT` writer - HFXO Low Frequency Timeout"]
281pub type LFTIMEOUT_W<'a> = crate::FieldWriterSafe<'a, u32, HFXOCTRL_SPEC, u8, LFTIMEOUT_A, 3, 24>;
282impl<'a> LFTIMEOUT_W<'a> {
283    #[doc = "Timeout period of 0 cycles (disabled)"]
284    #[inline(always)]
285    pub fn _0cycles(self) -> &'a mut W {
286        self.variant(LFTIMEOUT_A::_0CYCLES)
287    }
288    #[doc = "Timeout period of 2 cycles"]
289    #[inline(always)]
290    pub fn _2cycles(self) -> &'a mut W {
291        self.variant(LFTIMEOUT_A::_2CYCLES)
292    }
293    #[doc = "Timeout period of 4 cycles"]
294    #[inline(always)]
295    pub fn _4cycles(self) -> &'a mut W {
296        self.variant(LFTIMEOUT_A::_4CYCLES)
297    }
298    #[doc = "Timeout period of 16 cycles"]
299    #[inline(always)]
300    pub fn _16cycles(self) -> &'a mut W {
301        self.variant(LFTIMEOUT_A::_16CYCLES)
302    }
303    #[doc = "Timeout period of 32 cycles"]
304    #[inline(always)]
305    pub fn _32cycles(self) -> &'a mut W {
306        self.variant(LFTIMEOUT_A::_32CYCLES)
307    }
308    #[doc = "Timeout period of 64 cycles"]
309    #[inline(always)]
310    pub fn _64cycles(self) -> &'a mut W {
311        self.variant(LFTIMEOUT_A::_64CYCLES)
312    }
313    #[doc = "Timeout period of 1024 cycles"]
314    #[inline(always)]
315    pub fn _1kcycles(self) -> &'a mut W {
316        self.variant(LFTIMEOUT_A::_1KCYCLES)
317    }
318    #[doc = "Timeout period of 4096 cycles"]
319    #[inline(always)]
320    pub fn _4kcycles(self) -> &'a mut W {
321        self.variant(LFTIMEOUT_A::_4KCYCLES)
322    }
323}
324#[doc = "Field `AUTOSTARTEM0EM1` reader - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
325pub type AUTOSTARTEM0EM1_R = crate::BitReader<bool>;
326#[doc = "Field `AUTOSTARTEM0EM1` writer - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
327pub type AUTOSTARTEM0EM1_W<'a> = crate::BitWriter<'a, u32, HFXOCTRL_SPEC, bool, 28>;
328#[doc = "Field `AUTOSTARTSELEM0EM1` reader - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
329pub type AUTOSTARTSELEM0EM1_R = crate::BitReader<bool>;
330#[doc = "Field `AUTOSTARTSELEM0EM1` writer - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
331pub type AUTOSTARTSELEM0EM1_W<'a> = crate::BitWriter<'a, u32, HFXOCTRL_SPEC, bool, 29>;
332impl R {
333    #[doc = "Bits 0:1 - HFXO Mode"]
334    #[inline(always)]
335    pub fn mode(&self) -> MODE_R {
336        MODE_R::new((self.bits & 3) as u8)
337    }
338    #[doc = "Bits 4:5 - HFXO Automatic Peak Detection Mode"]
339    #[inline(always)]
340    pub fn peakdetmode(&self) -> PEAKDETMODE_R {
341        PEAKDETMODE_R::new(((self.bits >> 4) & 3) as u8)
342    }
343    #[doc = "Bits 24:26 - HFXO Low Frequency Timeout"]
344    #[inline(always)]
345    pub fn lftimeout(&self) -> LFTIMEOUT_R {
346        LFTIMEOUT_R::new(((self.bits >> 24) & 7) as u8)
347    }
348    #[doc = "Bit 28 - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
349    #[inline(always)]
350    pub fn autostartem0em1(&self) -> AUTOSTARTEM0EM1_R {
351        AUTOSTARTEM0EM1_R::new(((self.bits >> 28) & 1) != 0)
352    }
353    #[doc = "Bit 29 - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
354    #[inline(always)]
355    pub fn autostartselem0em1(&self) -> AUTOSTARTSELEM0EM1_R {
356        AUTOSTARTSELEM0EM1_R::new(((self.bits >> 29) & 1) != 0)
357    }
358}
359impl W {
360    #[doc = "Bits 0:1 - HFXO Mode"]
361    #[inline(always)]
362    pub fn mode(&mut self) -> MODE_W {
363        MODE_W::new(self)
364    }
365    #[doc = "Bits 4:5 - HFXO Automatic Peak Detection Mode"]
366    #[inline(always)]
367    pub fn peakdetmode(&mut self) -> PEAKDETMODE_W {
368        PEAKDETMODE_W::new(self)
369    }
370    #[doc = "Bits 24:26 - HFXO Low Frequency Timeout"]
371    #[inline(always)]
372    pub fn lftimeout(&mut self) -> LFTIMEOUT_W {
373        LFTIMEOUT_W::new(self)
374    }
375    #[doc = "Bit 28 - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
376    #[inline(always)]
377    pub fn autostartem0em1(&mut self) -> AUTOSTARTEM0EM1_W {
378        AUTOSTARTEM0EM1_W::new(self)
379    }
380    #[doc = "Bit 29 - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
381    #[inline(always)]
382    pub fn autostartselem0em1(&mut self) -> AUTOSTARTSELEM0EM1_W {
383        AUTOSTARTSELEM0EM1_W::new(self)
384    }
385    #[doc = "Writes raw bits to the register."]
386    #[inline(always)]
387    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
388        self.0.bits(bits);
389        self
390    }
391}
392#[doc = "HFXO Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfxoctrl](index.html) module"]
393pub struct HFXOCTRL_SPEC;
394impl crate::RegisterSpec for HFXOCTRL_SPEC {
395    type Ux = u32;
396}
397#[doc = "`read()` method returns [hfxoctrl::R](R) reader structure"]
398impl crate::Readable for HFXOCTRL_SPEC {
399    type Reader = R;
400}
401#[doc = "`write(|w| ..)` method takes [hfxoctrl::W](W) writer structure"]
402impl crate::Writable for HFXOCTRL_SPEC {
403    type Writer = W;
404}
405#[doc = "`reset()` method sets HFXOCTRL to value 0"]
406impl crate::Resettable for HFXOCTRL_SPEC {
407    #[inline(always)]
408    fn reset_value() -> Self::Ux {
409        0
410    }
411}
efm32tg11b540_pac/cmu/hfxoctrl.rs

efm32tg11b540_pac/cmu/
hfxoctrl.rs
